Lines Matching refs:tilcdc_write
106 tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, in tilcdc_crtc_load_palette()
108 tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, in tilcdc_crtc_load_palette()
121 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_PL_INT_ENA); in tilcdc_crtc_load_palette()
137 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA); in tilcdc_crtc_load_palette()
151 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, in tilcdc_crtc_enable_irqs()
169 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_disable_irqs()
257 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) | in tilcdc_crtc_set_clk()
311 tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); in tilcdc_crtc_set_mode()
340 tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg); in tilcdc_crtc_set_mode()
348 tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg); in tilcdc_crtc_set_mode()
354 tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg); in tilcdc_crtc_set_mode()
398 tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); in tilcdc_crtc_set_mode()
742 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_FRAME_DONE); in tilcdc_crtc_reset()
965 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
989 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
1010 tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); in tilcdc_crtc_irq()