Lines Matching refs:VC5_CSC_REG
145 #define VC5_CSC_REG(reg, offset) _VC4_REG(VC5_CSC, reg, offset) macro
285 VC5_CSC_REG(HDMI_CSC_CTL, 0x000),
286 VC5_CSC_REG(HDMI_CSC_12_11, 0x004),
287 VC5_CSC_REG(HDMI_CSC_14_13, 0x008),
288 VC5_CSC_REG(HDMI_CSC_22_21, 0x00c),
289 VC5_CSC_REG(HDMI_CSC_24_23, 0x010),
290 VC5_CSC_REG(HDMI_CSC_32_31, 0x014),
291 VC5_CSC_REG(HDMI_CSC_34_33, 0x018),
366 VC5_CSC_REG(HDMI_CSC_CTL, 0x000),
367 VC5_CSC_REG(HDMI_CSC_12_11, 0x004),
368 VC5_CSC_REG(HDMI_CSC_14_13, 0x008),
369 VC5_CSC_REG(HDMI_CSC_22_21, 0x00c),
370 VC5_CSC_REG(HDMI_CSC_24_23, 0x010),
371 VC5_CSC_REG(HDMI_CSC_32_31, 0x014),
372 VC5_CSC_REG(HDMI_CSC_34_33, 0x018),