473 				       struct io_pgtable_cfg *pgtbl_cfg)  in arm_smmu_init_context_bank()  argument
484 			cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr;  in arm_smmu_init_context_bank()
486 			cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg);  in arm_smmu_init_context_bank()
487 			cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg);  in arm_smmu_init_context_bank()
494 		cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg);  in arm_smmu_init_context_bank()
500 			cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr;  in arm_smmu_init_context_bank()
508 			if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1)  in arm_smmu_init_context_bank()
509 				cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;  in arm_smmu_init_context_bank()
511 				cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;  in arm_smmu_init_context_bank()
514 		cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr;  in arm_smmu_init_context_bank()
520 			cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr;  in arm_smmu_init_context_bank()
521 			cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr;  in arm_smmu_init_context_bank()
523 			cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair;  in arm_smmu_init_context_bank()
524 			cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair >> 32;  in arm_smmu_init_context_bank()
635 	struct io_pgtable_cfg pgtbl_cfg;  in arm_smmu_init_domain_context()  local
766 	pgtbl_cfg = (struct io_pgtable_cfg) {  in arm_smmu_init_domain_context()
776 		ret = smmu->impl->init_context(smmu_domain, &pgtbl_cfg, dev);  in arm_smmu_init_domain_context()
782 		pgtbl_cfg.quirks |= smmu_domain->pgtbl_quirks;  in arm_smmu_init_domain_context()
784 	pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain);  in arm_smmu_init_domain_context()
791 	domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;  in arm_smmu_init_domain_context()
793 	if (pgtbl_cfg.quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) {  in arm_smmu_init_domain_context()
803 	arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg);  in arm_smmu_init_domain_context()