Lines Matching refs:smmu
73 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument
75 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get()
76 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get()
81 static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) in arm_smmu_rpm_put() argument
83 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_put()
84 pm_runtime_put_autosuspend(smmu->dev); in arm_smmu_rpm_put()
134 struct arm_smmu_device **smmu) in arm_smmu_register_legacy_master() argument
177 *smmu = dev_get_drvdata(smmu_dev); in arm_smmu_register_legacy_master()
199 struct arm_smmu_device **smmu) in arm_smmu_register_legacy_master() argument
211 static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, int page, in __arm_smmu_tlb_sync() argument
217 if (smmu->impl && unlikely(smmu->impl->tlb_sync)) in __arm_smmu_tlb_sync()
218 return smmu->impl->tlb_sync(smmu, page, sync, status); in __arm_smmu_tlb_sync()
220 arm_smmu_writel(smmu, page, sync, QCOM_DUMMY_VAL); in __arm_smmu_tlb_sync()
223 reg = arm_smmu_readl(smmu, page, status); in __arm_smmu_tlb_sync()
230 dev_err_ratelimited(smmu->dev, in __arm_smmu_tlb_sync()
234 static void arm_smmu_tlb_sync_global(struct arm_smmu_device *smmu) in arm_smmu_tlb_sync_global() argument
238 spin_lock_irqsave(&smmu->global_sync_lock, flags); in arm_smmu_tlb_sync_global()
239 __arm_smmu_tlb_sync(smmu, ARM_SMMU_GR0, ARM_SMMU_GR0_sTLBGSYNC, in arm_smmu_tlb_sync_global()
241 spin_unlock_irqrestore(&smmu->global_sync_lock, flags); in arm_smmu_tlb_sync_global()
246 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_tlb_sync_context() local
250 __arm_smmu_tlb_sync(smmu, ARM_SMMU_CB(smmu, smmu_domain->cfg.cbndx), in arm_smmu_tlb_sync_context()
263 arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, in arm_smmu_tlb_inv_context_s1()
271 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_tlb_inv_context_s2() local
275 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_inv_context_s2()
276 arm_smmu_tlb_sync_global(smmu); in arm_smmu_tlb_inv_context_s2()
283 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_tlb_inv_range_s1() local
287 if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) in arm_smmu_tlb_inv_range_s1()
294 arm_smmu_cb_write(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s1()
301 arm_smmu_cb_writeq(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s1()
311 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_tlb_inv_range_s2() local
314 if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) in arm_smmu_tlb_inv_range_s2()
320 arm_smmu_cb_writeq(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s2()
322 arm_smmu_cb_write(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s2()
383 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_tlb_add_page_s2_v1() local
385 if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) in arm_smmu_tlb_add_page_s2_v1()
388 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_add_page_s2_v1()
415 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_context_fault() local
419 fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); in arm_smmu_context_fault()
423 fsynr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSYNR0); in arm_smmu_context_fault()
424 iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR); in arm_smmu_context_fault()
425 cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx)); in arm_smmu_context_fault()
431 dev_err_ratelimited(smmu->dev, in arm_smmu_context_fault()
435 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); in arm_smmu_context_fault()
442 struct arm_smmu_device *smmu = dev; in arm_smmu_global_fault() local
446 gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_global_fault()
447 gfsynr0 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR0); in arm_smmu_global_fault()
448 gfsynr1 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR1); in arm_smmu_global_fault()
449 gfsynr2 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR2); in arm_smmu_global_fault()
457 dev_err(smmu->dev, in arm_smmu_global_fault()
461 dev_err(smmu->dev, in arm_smmu_global_fault()
463 dev_err(smmu->dev, in arm_smmu_global_fault()
468 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
476 struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; in arm_smmu_init_context_bank()
529 void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) in arm_smmu_write_context_bank() argument
533 struct arm_smmu_cb *cb = &smmu->cbs[idx]; in arm_smmu_write_context_bank()
538 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, 0); in arm_smmu_write_context_bank()
545 if (smmu->version > ARM_SMMU_V1) { in arm_smmu_write_context_bank()
551 if (smmu->features & ARM_SMMU_FEAT_VMID16) in arm_smmu_write_context_bank()
554 arm_smmu_gr1_write(smmu, ARM_SMMU_GR1_CBA2R(idx), reg); in arm_smmu_write_context_bank()
559 if (smmu->version < ARM_SMMU_V2) in arm_smmu_write_context_bank()
571 } else if (!(smmu->features & ARM_SMMU_FEAT_VMID16)) { in arm_smmu_write_context_bank()
575 arm_smmu_gr1_write(smmu, ARM_SMMU_GR1_CBAR(idx), reg); in arm_smmu_write_context_bank()
582 if (stage1 && smmu->version > ARM_SMMU_V1) in arm_smmu_write_context_bank()
583 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR2, cb->tcr[1]); in arm_smmu_write_context_bank()
584 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR, cb->tcr[0]); in arm_smmu_write_context_bank()
588 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_CONTEXTIDR, cfg->asid); in arm_smmu_write_context_bank()
589 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
590 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR1, cb->ttbr[1]); in arm_smmu_write_context_bank()
592 arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
594 arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR1, in arm_smmu_write_context_bank()
600 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_S1_MAIR0, cb->mair[0]); in arm_smmu_write_context_bank()
601 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_S1_MAIR1, cb->mair[1]); in arm_smmu_write_context_bank()
612 if (smmu->impl && smmu->impl->write_sctlr) in arm_smmu_write_context_bank()
613 smmu->impl->write_sctlr(smmu, idx, reg); in arm_smmu_write_context_bank()
615 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); in arm_smmu_write_context_bank()
619 struct arm_smmu_device *smmu, in arm_smmu_alloc_context_bank() argument
622 if (smmu->impl && smmu->impl->alloc_context_bank) in arm_smmu_alloc_context_bank()
623 return smmu->impl->alloc_context_bank(smmu_domain, smmu, dev, start); in arm_smmu_alloc_context_bank()
625 return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); in arm_smmu_alloc_context_bank()
629 struct arm_smmu_device *smmu, in arm_smmu_init_domain_context() argument
642 if (smmu_domain->smmu) in arm_smmu_init_domain_context()
647 smmu_domain->smmu = smmu; in arm_smmu_init_domain_context()
669 if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) in arm_smmu_init_domain_context()
671 if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) in arm_smmu_init_domain_context()
682 if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) in arm_smmu_init_domain_context()
686 (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && in arm_smmu_init_domain_context()
690 (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | in arm_smmu_init_domain_context()
703 start = smmu->num_s2_context_banks; in arm_smmu_init_domain_context()
704 ias = smmu->va_size; in arm_smmu_init_domain_context()
705 oas = smmu->ipa_size; in arm_smmu_init_domain_context()
727 ias = smmu->ipa_size; in arm_smmu_init_domain_context()
728 oas = smmu->pa_size; in arm_smmu_init_domain_context()
736 if (smmu->version == ARM_SMMU_V2) in arm_smmu_init_domain_context()
746 ret = arm_smmu_alloc_context_bank(smmu_domain, smmu, dev, start); in arm_smmu_init_domain_context()
751 smmu_domain->smmu = smmu; in arm_smmu_init_domain_context()
754 if (smmu->version < ARM_SMMU_V2) { in arm_smmu_init_domain_context()
755 cfg->irptndx = atomic_inc_return(&smmu->irptndx); in arm_smmu_init_domain_context()
756 cfg->irptndx %= smmu->num_context_irqs; in arm_smmu_init_domain_context()
767 .pgsize_bitmap = smmu->pgsize_bitmap, in arm_smmu_init_domain_context()
770 .coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK, in arm_smmu_init_domain_context()
772 .iommu_dev = smmu->dev, in arm_smmu_init_domain_context()
775 if (smmu->impl && smmu->impl->init_context) { in arm_smmu_init_domain_context()
776 ret = smmu->impl->init_context(smmu_domain, &pgtbl_cfg, dev); in arm_smmu_init_domain_context()
804 arm_smmu_write_context_bank(smmu, cfg->cbndx); in arm_smmu_init_domain_context()
810 irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; in arm_smmu_init_domain_context()
812 if (smmu->impl && smmu->impl->context_fault) in arm_smmu_init_domain_context()
813 context_fault = smmu->impl->context_fault; in arm_smmu_init_domain_context()
817 ret = devm_request_irq(smmu->dev, irq, context_fault, in arm_smmu_init_domain_context()
820 dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n", in arm_smmu_init_domain_context()
832 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); in arm_smmu_init_domain_context()
833 smmu_domain->smmu = NULL; in arm_smmu_init_domain_context()
842 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_destroy_domain_context() local
846 if (!smmu || domain->type == IOMMU_DOMAIN_IDENTITY) in arm_smmu_destroy_domain_context()
849 ret = arm_smmu_rpm_get(smmu); in arm_smmu_destroy_domain_context()
857 smmu->cbs[cfg->cbndx].cfg = NULL; in arm_smmu_destroy_domain_context()
858 arm_smmu_write_context_bank(smmu, cfg->cbndx); in arm_smmu_destroy_domain_context()
861 irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; in arm_smmu_destroy_domain_context()
862 devm_free_irq(smmu->dev, irq, domain); in arm_smmu_destroy_domain_context()
866 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); in arm_smmu_destroy_domain_context()
868 arm_smmu_rpm_put(smmu); in arm_smmu_destroy_domain_context()
907 static void arm_smmu_write_smr(struct arm_smmu_device *smmu, int idx) in arm_smmu_write_smr() argument
909 struct arm_smmu_smr *smr = smmu->smrs + idx; in arm_smmu_write_smr()
913 if (!(smmu->features & ARM_SMMU_FEAT_EXIDS) && smr->valid) in arm_smmu_write_smr()
915 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(idx), reg); in arm_smmu_write_smr()
918 static void arm_smmu_write_s2cr(struct arm_smmu_device *smmu, int idx) in arm_smmu_write_s2cr() argument
920 struct arm_smmu_s2cr *s2cr = smmu->s2crs + idx; in arm_smmu_write_s2cr()
923 if (smmu->impl && smmu->impl->write_s2cr) { in arm_smmu_write_s2cr()
924 smmu->impl->write_s2cr(smmu, idx); in arm_smmu_write_s2cr()
932 if (smmu->features & ARM_SMMU_FEAT_EXIDS && smmu->smrs && in arm_smmu_write_s2cr()
933 smmu->smrs[idx].valid) in arm_smmu_write_s2cr()
935 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); in arm_smmu_write_s2cr()
938 static void arm_smmu_write_sme(struct arm_smmu_device *smmu, int idx) in arm_smmu_write_sme() argument
940 arm_smmu_write_s2cr(smmu, idx); in arm_smmu_write_sme()
941 if (smmu->smrs) in arm_smmu_write_sme()
942 arm_smmu_write_smr(smmu, idx); in arm_smmu_write_sme()
949 static void arm_smmu_test_smr_masks(struct arm_smmu_device *smmu) in arm_smmu_test_smr_masks() argument
954 if (!smmu->smrs) in arm_smmu_test_smr_masks()
964 for (i = 0; i < smmu->num_mapping_groups; i++) in arm_smmu_test_smr_masks()
965 if (!smmu->smrs[i].valid) in arm_smmu_test_smr_masks()
974 smr = FIELD_PREP(ARM_SMMU_SMR_ID, smmu->streamid_mask); in arm_smmu_test_smr_masks()
975 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
976 smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); in arm_smmu_test_smr_masks()
977 smmu->streamid_mask = FIELD_GET(ARM_SMMU_SMR_ID, smr); in arm_smmu_test_smr_masks()
979 smr = FIELD_PREP(ARM_SMMU_SMR_MASK, smmu->streamid_mask); in arm_smmu_test_smr_masks()
980 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
981 smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); in arm_smmu_test_smr_masks()
982 smmu->smr_mask_mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); in arm_smmu_test_smr_masks()
985 static int arm_smmu_find_sme(struct arm_smmu_device *smmu, u16 id, u16 mask) in arm_smmu_find_sme() argument
987 struct arm_smmu_smr *smrs = smmu->smrs; in arm_smmu_find_sme()
995 for (i = 0; i < smmu->num_mapping_groups; ++i) { in arm_smmu_find_sme()
1027 static bool arm_smmu_free_sme(struct arm_smmu_device *smmu, int idx) in arm_smmu_free_sme() argument
1029 if (--smmu->s2crs[idx].count) in arm_smmu_free_sme()
1032 smmu->s2crs[idx] = s2cr_init_val; in arm_smmu_free_sme()
1033 if (smmu->smrs) in arm_smmu_free_sme()
1034 smmu->smrs[idx].valid = false; in arm_smmu_free_sme()
1043 struct arm_smmu_device *smmu = cfg->smmu; in arm_smmu_master_alloc_smes() local
1044 struct arm_smmu_smr *smrs = smmu->smrs; in arm_smmu_master_alloc_smes()
1047 mutex_lock(&smmu->stream_map_mutex); in arm_smmu_master_alloc_smes()
1058 ret = arm_smmu_find_sme(smmu, sid, mask); in arm_smmu_master_alloc_smes()
1063 if (smrs && smmu->s2crs[idx].count == 0) { in arm_smmu_master_alloc_smes()
1068 smmu->s2crs[idx].count++; in arm_smmu_master_alloc_smes()
1074 arm_smmu_write_sme(smmu, idx); in arm_smmu_master_alloc_smes()
1076 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_master_alloc_smes()
1081 arm_smmu_free_sme(smmu, cfg->smendx[i]); in arm_smmu_master_alloc_smes()
1084 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_master_alloc_smes()
1091 struct arm_smmu_device *smmu = cfg->smmu; in arm_smmu_master_free_smes() local
1094 mutex_lock(&smmu->stream_map_mutex); in arm_smmu_master_free_smes()
1096 if (arm_smmu_free_sme(smmu, idx)) in arm_smmu_master_free_smes()
1097 arm_smmu_write_sme(smmu, idx); in arm_smmu_master_free_smes()
1100 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_master_free_smes()
1107 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_domain_add_master() local
1108 struct arm_smmu_s2cr *s2cr = smmu->s2crs; in arm_smmu_domain_add_master()
1125 arm_smmu_write_s2cr(smmu, idx); in arm_smmu_domain_add_master()
1135 struct arm_smmu_device *smmu; in arm_smmu_attach_dev() local
1154 smmu = cfg->smmu; in arm_smmu_attach_dev()
1156 ret = arm_smmu_rpm_get(smmu); in arm_smmu_attach_dev()
1161 ret = arm_smmu_init_domain_context(domain, smmu, dev); in arm_smmu_attach_dev()
1169 if (smmu_domain->smmu != smmu) { in arm_smmu_attach_dev()
1172 dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev)); in arm_smmu_attach_dev()
1191 pm_runtime_set_autosuspend_delay(smmu->dev, 20); in arm_smmu_attach_dev()
1192 pm_runtime_use_autosuspend(smmu->dev); in arm_smmu_attach_dev()
1195 arm_smmu_rpm_put(smmu); in arm_smmu_attach_dev()
1204 struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; in arm_smmu_map_pages() local
1210 arm_smmu_rpm_get(smmu); in arm_smmu_map_pages()
1212 arm_smmu_rpm_put(smmu); in arm_smmu_map_pages()
1222 struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; in arm_smmu_unmap_pages() local
1228 arm_smmu_rpm_get(smmu); in arm_smmu_unmap_pages()
1230 arm_smmu_rpm_put(smmu); in arm_smmu_unmap_pages()
1238 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_flush_iotlb_all() local
1241 arm_smmu_rpm_get(smmu); in arm_smmu_flush_iotlb_all()
1243 arm_smmu_rpm_put(smmu); in arm_smmu_flush_iotlb_all()
1251 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_iotlb_sync() local
1253 if (!smmu) in arm_smmu_iotlb_sync()
1256 arm_smmu_rpm_get(smmu); in arm_smmu_iotlb_sync()
1257 if (smmu->version == ARM_SMMU_V2 || in arm_smmu_iotlb_sync()
1261 arm_smmu_tlb_sync_global(smmu); in arm_smmu_iotlb_sync()
1262 arm_smmu_rpm_put(smmu); in arm_smmu_iotlb_sync()
1269 struct arm_smmu_device *smmu = smmu_domain->smmu; in arm_smmu_iova_to_phys_hard() local
1272 struct device *dev = smmu->dev; in arm_smmu_iova_to_phys_hard()
1280 ret = arm_smmu_rpm_get(smmu); in arm_smmu_iova_to_phys_hard()
1287 arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_ATS1PR, va); in arm_smmu_iova_to_phys_hard()
1289 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_ATS1PR, va); in arm_smmu_iova_to_phys_hard()
1291 reg = arm_smmu_page(smmu, ARM_SMMU_CB(smmu, idx)) + ARM_SMMU_CB_ATSR; in arm_smmu_iova_to_phys_hard()
1298 arm_smmu_rpm_put(smmu); in arm_smmu_iova_to_phys_hard()
1302 phys = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_PAR); in arm_smmu_iova_to_phys_hard()
1312 arm_smmu_rpm_put(smmu); in arm_smmu_iova_to_phys_hard()
1326 if (smmu_domain->smmu->features & ARM_SMMU_FEAT_TRANS_OPS && in arm_smmu_iova_to_phys()
1360 struct arm_smmu_device *smmu = NULL; in arm_smmu_probe_device() local
1366 ret = arm_smmu_register_legacy_master(dev, &smmu); in arm_smmu_probe_device()
1377 smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); in arm_smmu_probe_device()
1387 if (sid & ~smmu->streamid_mask) { in arm_smmu_probe_device()
1389 sid, smmu->streamid_mask); in arm_smmu_probe_device()
1392 if (mask & ~smmu->smr_mask_mask) { in arm_smmu_probe_device()
1394 mask, smmu->smr_mask_mask); in arm_smmu_probe_device()
1405 cfg->smmu = smmu; in arm_smmu_probe_device()
1410 ret = arm_smmu_rpm_get(smmu); in arm_smmu_probe_device()
1415 arm_smmu_rpm_put(smmu); in arm_smmu_probe_device()
1420 device_link_add(dev, smmu->dev, in arm_smmu_probe_device()
1423 return &smmu->iommu; in arm_smmu_probe_device()
1436 struct arm_smmu_device *smmu; in arm_smmu_release_device() local
1443 smmu = cfg->smmu; in arm_smmu_release_device()
1445 ret = arm_smmu_rpm_get(smmu); in arm_smmu_release_device()
1451 arm_smmu_rpm_put(smmu); in arm_smmu_release_device()
1461 struct arm_smmu_device *smmu; in arm_smmu_probe_finalize() local
1464 smmu = cfg->smmu; in arm_smmu_probe_finalize()
1466 if (smmu->impl && smmu->impl->probe_finalize) in arm_smmu_probe_finalize()
1467 smmu->impl->probe_finalize(smmu, dev); in arm_smmu_probe_finalize()
1474 struct arm_smmu_device *smmu = cfg->smmu; in arm_smmu_device_group() local
1478 mutex_lock(&smmu->stream_map_mutex); in arm_smmu_device_group()
1480 if (group && smmu->s2crs[idx].group && in arm_smmu_device_group()
1481 group != smmu->s2crs[idx].group) { in arm_smmu_device_group()
1482 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_device_group()
1486 group = smmu->s2crs[idx].group; in arm_smmu_device_group()
1490 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_device_group()
1504 smmu->s2crs[idx].group = group; in arm_smmu_device_group()
1506 mutex_unlock(&smmu->stream_map_mutex); in arm_smmu_device_group()
1516 if (smmu_domain->smmu) in arm_smmu_enable_nesting()
1532 if (smmu_domain->smmu) in arm_smmu_set_pgtable_quirks()
1575 const struct arm_smmu_impl *impl = cfg->smmu->impl; in arm_smmu_def_domain_type()
1607 static void arm_smmu_device_reset(struct arm_smmu_device *smmu) in arm_smmu_device_reset() argument
1613 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); in arm_smmu_device_reset()
1614 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
1620 for (i = 0; i < smmu->num_mapping_groups; ++i) in arm_smmu_device_reset()
1621 arm_smmu_write_sme(smmu, i); in arm_smmu_device_reset()
1624 for (i = 0; i < smmu->num_context_banks; ++i) { in arm_smmu_device_reset()
1625 arm_smmu_write_context_bank(smmu, i); in arm_smmu_device_reset()
1626 arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_FSR, ARM_SMMU_FSR_FAULT); in arm_smmu_device_reset()
1630 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLH, QCOM_DUMMY_VAL); in arm_smmu_device_reset()
1631 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLNSNH, QCOM_DUMMY_VAL); in arm_smmu_device_reset()
1633 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0); in arm_smmu_device_reset()
1655 if (smmu->features & ARM_SMMU_FEAT_VMID16) in arm_smmu_device_reset()
1658 if (smmu->features & ARM_SMMU_FEAT_EXIDS) in arm_smmu_device_reset()
1661 if (smmu->impl && smmu->impl->reset) in arm_smmu_device_reset()
1662 smmu->impl->reset(smmu); in arm_smmu_device_reset()
1665 arm_smmu_tlb_sync_global(smmu); in arm_smmu_device_reset()
1666 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, reg); in arm_smmu_device_reset()
1688 static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) in arm_smmu_device_cfg_probe() argument
1692 bool cttw_reg, cttw_fw = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK; in arm_smmu_device_cfg_probe()
1695 dev_notice(smmu->dev, "probing hardware configuration...\n"); in arm_smmu_device_cfg_probe()
1696 dev_notice(smmu->dev, "SMMUv%d with:\n", in arm_smmu_device_cfg_probe()
1697 smmu->version == ARM_SMMU_V2 ? 2 : 1); in arm_smmu_device_cfg_probe()
1700 id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID0); in arm_smmu_device_cfg_probe()
1709 smmu->features |= ARM_SMMU_FEAT_TRANS_S1; in arm_smmu_device_cfg_probe()
1710 dev_notice(smmu->dev, "\tstage 1 translation\n"); in arm_smmu_device_cfg_probe()
1714 smmu->features |= ARM_SMMU_FEAT_TRANS_S2; in arm_smmu_device_cfg_probe()
1715 dev_notice(smmu->dev, "\tstage 2 translation\n"); in arm_smmu_device_cfg_probe()
1719 smmu->features |= ARM_SMMU_FEAT_TRANS_NESTED; in arm_smmu_device_cfg_probe()
1720 dev_notice(smmu->dev, "\tnested translation\n"); in arm_smmu_device_cfg_probe()
1723 if (!(smmu->features & in arm_smmu_device_cfg_probe()
1725 dev_err(smmu->dev, "\tno translation support!\n"); in arm_smmu_device_cfg_probe()
1730 ((smmu->version < ARM_SMMU_V2) || !(id & ARM_SMMU_ID0_ATOSNS))) { in arm_smmu_device_cfg_probe()
1731 smmu->features |= ARM_SMMU_FEAT_TRANS_OPS; in arm_smmu_device_cfg_probe()
1732 dev_notice(smmu->dev, "\taddress translation ops\n"); in arm_smmu_device_cfg_probe()
1743 dev_notice(smmu->dev, "\t%scoherent table walk\n", in arm_smmu_device_cfg_probe()
1746 dev_notice(smmu->dev, in arm_smmu_device_cfg_probe()
1750 if (smmu->version == ARM_SMMU_V2 && id & ARM_SMMU_ID0_EXIDS) { in arm_smmu_device_cfg_probe()
1751 smmu->features |= ARM_SMMU_FEAT_EXIDS; in arm_smmu_device_cfg_probe()
1756 smmu->streamid_mask = size - 1; in arm_smmu_device_cfg_probe()
1758 smmu->features |= ARM_SMMU_FEAT_STREAM_MATCH; in arm_smmu_device_cfg_probe()
1761 dev_err(smmu->dev, in arm_smmu_device_cfg_probe()
1767 smmu->smrs = devm_kcalloc(smmu->dev, size, sizeof(*smmu->smrs), in arm_smmu_device_cfg_probe()
1769 if (!smmu->smrs) in arm_smmu_device_cfg_probe()
1772 dev_notice(smmu->dev, in arm_smmu_device_cfg_probe()
1776 smmu->s2crs = devm_kmalloc_array(smmu->dev, size, sizeof(*smmu->s2crs), in arm_smmu_device_cfg_probe()
1778 if (!smmu->s2crs) in arm_smmu_device_cfg_probe()
1781 smmu->s2crs[i] = s2cr_init_val; in arm_smmu_device_cfg_probe()
1783 smmu->num_mapping_groups = size; in arm_smmu_device_cfg_probe()
1784 mutex_init(&smmu->stream_map_mutex); in arm_smmu_device_cfg_probe()
1785 spin_lock_init(&smmu->global_sync_lock); in arm_smmu_device_cfg_probe()
1787 if (smmu->version < ARM_SMMU_V2 || in arm_smmu_device_cfg_probe()
1789 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH32_L; in arm_smmu_device_cfg_probe()
1791 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH32_S; in arm_smmu_device_cfg_probe()
1795 id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID1); in arm_smmu_device_cfg_probe()
1796 smmu->pgshift = (id & ARM_SMMU_ID1_PAGESIZE) ? 16 : 12; in arm_smmu_device_cfg_probe()
1800 if (smmu->numpage != 2 * size << smmu->pgshift) in arm_smmu_device_cfg_probe()
1801 dev_warn(smmu->dev, in arm_smmu_device_cfg_probe()
1803 2 * size << smmu->pgshift, smmu->numpage); in arm_smmu_device_cfg_probe()
1805 smmu->numpage = size; in arm_smmu_device_cfg_probe()
1807 smmu->num_s2_context_banks = FIELD_GET(ARM_SMMU_ID1_NUMS2CB, id); in arm_smmu_device_cfg_probe()
1808 smmu->num_context_banks = FIELD_GET(ARM_SMMU_ID1_NUMCB, id); in arm_smmu_device_cfg_probe()
1809 if (smmu->num_s2_context_banks > smmu->num_context_banks) { in arm_smmu_device_cfg_probe()
1810 dev_err(smmu->dev, "impossible number of S2 context banks!\n"); in arm_smmu_device_cfg_probe()
1813 dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n", in arm_smmu_device_cfg_probe()
1814 smmu->num_context_banks, smmu->num_s2_context_banks); in arm_smmu_device_cfg_probe()
1815 smmu->cbs = devm_kcalloc(smmu->dev, smmu->num_context_banks, in arm_smmu_device_cfg_probe()
1816 sizeof(*smmu->cbs), GFP_KERNEL); in arm_smmu_device_cfg_probe()
1817 if (!smmu->cbs) in arm_smmu_device_cfg_probe()
1821 id = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID2); in arm_smmu_device_cfg_probe()
1823 smmu->ipa_size = size; in arm_smmu_device_cfg_probe()
1827 smmu->pa_size = size; in arm_smmu_device_cfg_probe()
1830 smmu->features |= ARM_SMMU_FEAT_VMID16; in arm_smmu_device_cfg_probe()
1837 if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(size))) in arm_smmu_device_cfg_probe()
1838 dev_warn(smmu->dev, in arm_smmu_device_cfg_probe()
1841 if (smmu->version < ARM_SMMU_V2) { in arm_smmu_device_cfg_probe()
1842 smmu->va_size = smmu->ipa_size; in arm_smmu_device_cfg_probe()
1843 if (smmu->version == ARM_SMMU_V1_64K) in arm_smmu_device_cfg_probe()
1844 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K; in arm_smmu_device_cfg_probe()
1847 smmu->va_size = arm_smmu_id_size_to_bits(size); in arm_smmu_device_cfg_probe()
1849 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_4K; in arm_smmu_device_cfg_probe()
1851 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_16K; in arm_smmu_device_cfg_probe()
1853 smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K; in arm_smmu_device_cfg_probe()
1856 if (smmu->impl && smmu->impl->cfg_probe) { in arm_smmu_device_cfg_probe()
1857 ret = smmu->impl->cfg_probe(smmu); in arm_smmu_device_cfg_probe()
1863 if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) in arm_smmu_device_cfg_probe()
1864 smmu->pgsize_bitmap |= SZ_4K | SZ_64K | SZ_1M | SZ_16M; in arm_smmu_device_cfg_probe()
1865 if (smmu->features & in arm_smmu_device_cfg_probe()
1867 smmu->pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G; in arm_smmu_device_cfg_probe()
1868 if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH64_16K) in arm_smmu_device_cfg_probe()
1869 smmu->pgsize_bitmap |= SZ_16K | SZ_32M; in arm_smmu_device_cfg_probe()
1870 if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH64_64K) in arm_smmu_device_cfg_probe()
1871 smmu->pgsize_bitmap |= SZ_64K | SZ_512M; in arm_smmu_device_cfg_probe()
1874 arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; in arm_smmu_device_cfg_probe()
1876 arm_smmu_ops.pgsize_bitmap |= smmu->pgsize_bitmap; in arm_smmu_device_cfg_probe()
1877 dev_notice(smmu->dev, "\tSupported page sizes: 0x%08lx\n", in arm_smmu_device_cfg_probe()
1878 smmu->pgsize_bitmap); in arm_smmu_device_cfg_probe()
1881 if (smmu->features & ARM_SMMU_FEAT_TRANS_S1) in arm_smmu_device_cfg_probe()
1882 dev_notice(smmu->dev, "\tStage-1: %lu-bit VA -> %lu-bit IPA\n", in arm_smmu_device_cfg_probe()
1883 smmu->va_size, smmu->ipa_size); in arm_smmu_device_cfg_probe()
1885 if (smmu->features & ARM_SMMU_FEAT_TRANS_S2) in arm_smmu_device_cfg_probe()
1886 dev_notice(smmu->dev, "\tStage-2: %lu-bit IPA -> %lu-bit PA\n", in arm_smmu_device_cfg_probe()
1887 smmu->ipa_size, smmu->pa_size); in arm_smmu_device_cfg_probe()
1921 static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) in acpi_smmu_get_data() argument
1928 smmu->version = ARM_SMMU_V1; in acpi_smmu_get_data()
1929 smmu->model = GENERIC_SMMU; in acpi_smmu_get_data()
1932 smmu->version = ARM_SMMU_V1_64K; in acpi_smmu_get_data()
1933 smmu->model = GENERIC_SMMU; in acpi_smmu_get_data()
1936 smmu->version = ARM_SMMU_V2; in acpi_smmu_get_data()
1937 smmu->model = GENERIC_SMMU; in acpi_smmu_get_data()
1940 smmu->version = ARM_SMMU_V2; in acpi_smmu_get_data()
1941 smmu->model = ARM_MMU500; in acpi_smmu_get_data()
1944 smmu->version = ARM_SMMU_V2; in acpi_smmu_get_data()
1945 smmu->model = CAVIUM_SMMUV2; in acpi_smmu_get_data()
1955 struct arm_smmu_device *smmu) in arm_smmu_device_acpi_probe() argument
1957 struct device *dev = smmu->dev; in arm_smmu_device_acpi_probe()
1966 ret = acpi_smmu_get_data(iort_smmu->model, smmu); in arm_smmu_device_acpi_probe()
1971 smmu->num_global_irqs = 1; in arm_smmu_device_acpi_probe()
1974 smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK; in arm_smmu_device_acpi_probe()
1980 struct arm_smmu_device *smmu) in arm_smmu_device_acpi_probe() argument
1987 struct arm_smmu_device *smmu) in arm_smmu_device_dt_probe() argument
1994 &smmu->num_global_irqs)) { in arm_smmu_device_dt_probe()
2000 smmu->version = data->version; in arm_smmu_device_dt_probe()
2001 smmu->model = data->model; in arm_smmu_device_dt_probe()
2018 smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK; in arm_smmu_device_dt_probe()
2073 struct arm_smmu_device *smmu; in arm_smmu_device_probe() local
2078 smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); in arm_smmu_device_probe()
2079 if (!smmu) { in arm_smmu_device_probe()
2083 smmu->dev = dev; in arm_smmu_device_probe()
2086 err = arm_smmu_device_dt_probe(pdev, smmu); in arm_smmu_device_probe()
2088 err = arm_smmu_device_acpi_probe(pdev, smmu); in arm_smmu_device_probe()
2093 smmu->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in arm_smmu_device_probe()
2094 if (IS_ERR(smmu->base)) in arm_smmu_device_probe()
2095 return PTR_ERR(smmu->base); in arm_smmu_device_probe()
2101 smmu->numpage = resource_size(res); in arm_smmu_device_probe()
2103 smmu = arm_smmu_impl_init(smmu); in arm_smmu_device_probe()
2104 if (IS_ERR(smmu)) in arm_smmu_device_probe()
2105 return PTR_ERR(smmu); in arm_smmu_device_probe()
2110 if (num_irqs > smmu->num_global_irqs) in arm_smmu_device_probe()
2111 smmu->num_context_irqs++; in arm_smmu_device_probe()
2114 if (!smmu->num_context_irqs) { in arm_smmu_device_probe()
2116 num_irqs, smmu->num_global_irqs + 1); in arm_smmu_device_probe()
2120 smmu->irqs = devm_kcalloc(dev, num_irqs, sizeof(*smmu->irqs), in arm_smmu_device_probe()
2122 if (!smmu->irqs) { in arm_smmu_device_probe()
2132 smmu->irqs[i] = irq; in arm_smmu_device_probe()
2135 err = devm_clk_bulk_get_all(dev, &smmu->clks); in arm_smmu_device_probe()
2140 smmu->num_clks = err; in arm_smmu_device_probe()
2142 err = clk_bulk_prepare_enable(smmu->num_clks, smmu->clks); in arm_smmu_device_probe()
2146 err = arm_smmu_device_cfg_probe(smmu); in arm_smmu_device_probe()
2150 if (smmu->version == ARM_SMMU_V2) { in arm_smmu_device_probe()
2151 if (smmu->num_context_banks > smmu->num_context_irqs) { in arm_smmu_device_probe()
2154 smmu->num_context_irqs, smmu->num_context_banks); in arm_smmu_device_probe()
2159 smmu->num_context_irqs = smmu->num_context_banks; in arm_smmu_device_probe()
2162 if (smmu->impl && smmu->impl->global_fault) in arm_smmu_device_probe()
2163 global_fault = smmu->impl->global_fault; in arm_smmu_device_probe()
2167 for (i = 0; i < smmu->num_global_irqs; ++i) { in arm_smmu_device_probe()
2168 err = devm_request_irq(smmu->dev, smmu->irqs[i], in arm_smmu_device_probe()
2172 smmu); in arm_smmu_device_probe()
2175 i, smmu->irqs[i]); in arm_smmu_device_probe()
2180 err = iommu_device_sysfs_add(&smmu->iommu, smmu->dev, NULL, in arm_smmu_device_probe()
2187 err = iommu_device_register(&smmu->iommu, &arm_smmu_ops, dev); in arm_smmu_device_probe()
2193 platform_set_drvdata(pdev, smmu); in arm_smmu_device_probe()
2194 arm_smmu_device_reset(smmu); in arm_smmu_device_probe()
2195 arm_smmu_test_smr_masks(smmu); in arm_smmu_device_probe()
2222 iommu_device_unregister(&smmu->iommu); in arm_smmu_device_probe()
2224 iommu_device_sysfs_remove(&smmu->iommu); in arm_smmu_device_probe()
2230 struct arm_smmu_device *smmu = platform_get_drvdata(pdev); in arm_smmu_device_remove() local
2232 if (!smmu) in arm_smmu_device_remove()
2235 if (!bitmap_empty(smmu->context_map, ARM_SMMU_MAX_CBS)) in arm_smmu_device_remove()
2239 iommu_device_unregister(&smmu->iommu); in arm_smmu_device_remove()
2240 iommu_device_sysfs_remove(&smmu->iommu); in arm_smmu_device_remove()
2242 arm_smmu_rpm_get(smmu); in arm_smmu_device_remove()
2244 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, ARM_SMMU_sCR0_CLIENTPD); in arm_smmu_device_remove()
2245 arm_smmu_rpm_put(smmu); in arm_smmu_device_remove()
2247 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_device_remove()
2248 pm_runtime_force_suspend(smmu->dev); in arm_smmu_device_remove()
2250 clk_bulk_disable(smmu->num_clks, smmu->clks); in arm_smmu_device_remove()
2252 clk_bulk_unprepare(smmu->num_clks, smmu->clks); in arm_smmu_device_remove()
2263 struct arm_smmu_device *smmu = dev_get_drvdata(dev); in arm_smmu_runtime_resume() local
2266 ret = clk_bulk_enable(smmu->num_clks, smmu->clks); in arm_smmu_runtime_resume()
2270 arm_smmu_device_reset(smmu); in arm_smmu_runtime_resume()
2277 struct arm_smmu_device *smmu = dev_get_drvdata(dev); in arm_smmu_runtime_suspend() local
2279 clk_bulk_disable(smmu->num_clks, smmu->clks); in arm_smmu_runtime_suspend()
2287 struct arm_smmu_device *smmu = dev_get_drvdata(dev); in arm_smmu_pm_resume() local
2289 ret = clk_bulk_prepare(smmu->num_clks, smmu->clks); in arm_smmu_pm_resume()
2298 clk_bulk_unprepare(smmu->num_clks, smmu->clks); in arm_smmu_pm_resume()
2306 struct arm_smmu_device *smmu = dev_get_drvdata(dev); in arm_smmu_pm_suspend() local
2316 clk_bulk_unprepare(smmu->num_clks, smmu->clks); in arm_smmu_pm_suspend()