263 	void __iomem *sfrbase;		/* our registers */  member
286 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);  in sysmmu_unblock()
293 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);  in sysmmu_block()
294 	while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))  in sysmmu_block()
297 	if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {  in sysmmu_block()
308 		writel(0x1, data->sfrbase + REG_MMU_FLUSH);  in __sysmmu_tlb_invalidate()
310 		writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);  in __sysmmu_tlb_invalidate()
321 				     data->sfrbase + REG_MMU_FLUSH_ENTRY);  in __sysmmu_tlb_invalidate_entry()
327 				     data->sfrbase + REG_V5_MMU_FLUSH_ENTRY);  in __sysmmu_tlb_invalidate_entry()
330 				     data->sfrbase + REG_V5_MMU_FLUSH_START);  in __sysmmu_tlb_invalidate_entry()
332 				     data->sfrbase + REG_V5_MMU_FLUSH_END);  in __sysmmu_tlb_invalidate_entry()
333 			writel(1, data->sfrbase + REG_V5_MMU_FLUSH_RANGE);  in __sysmmu_tlb_invalidate_entry()
341 		writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);  in __sysmmu_set_ptbase()
344 			     data->sfrbase + REG_V5_PT_BASE_PFN);  in __sysmmu_set_ptbase()
371 	ver = readl(data->sfrbase + REG_MMU_VERSION);  in __sysmmu_get_version()
430 	itype = __ffs(readl(data->sfrbase + reg_status));  in exynos_sysmmu_irq()
438 	fault_addr = readl(data->sfrbase + finfo->addr_reg);  in exynos_sysmmu_irq()
447 	writel(1 << itype, data->sfrbase + reg_clear);  in exynos_sysmmu_irq()
465 	writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_disable()
466 	writel(0, data->sfrbase + REG_MMU_CFG);  in __sysmmu_disable()
486 	writel(cfg, data->sfrbase + REG_MMU_CFG);  in __sysmmu_init_config()
496 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_enable()
499 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_enable()
579 	data->sfrbase = devm_ioremap_resource(dev, res);  in exynos_sysmmu_probe()
580 	if (IS_ERR(data->sfrbase))  in exynos_sysmmu_probe()
581 		return PTR_ERR(data->sfrbase);  in exynos_sysmmu_probe()