23 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val)  in mv88e6xxx_g1_write()  function
88 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_01, reg);  in mv88e6xxx_g1_set_switch_mac()
93 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_23, reg);  in mv88e6xxx_g1_set_switch_mac()
98 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_45, reg);  in mv88e6xxx_g1_set_switch_mac()
122 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_reset()
145 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6250_g1_reset()
174 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_ppu_enable()
192 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_ppu_disable()
215 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_set_max_frame_size()
233 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_0, 0x0000);  in mv88e6085_g1_ip_pri_map()
237 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_1, 0x0000);  in mv88e6085_g1_ip_pri_map()
241 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_2, 0x5555);  in mv88e6085_g1_ip_pri_map()
245 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_3, 0x5555);  in mv88e6085_g1_ip_pri_map()
249 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_4, 0xaaaa);  in mv88e6085_g1_ip_pri_map()
253 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_5, 0xaaaa);  in mv88e6085_g1_ip_pri_map()
257 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_6, 0xffff);  in mv88e6085_g1_ip_pri_map()
261 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_7, 0xffff);  in mv88e6085_g1_ip_pri_map()
273 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);  in mv88e6085_g1_ieee_pri_map()
279 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa50);  in mv88e6250_g1_ieee_pri_map()
311 	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);  in mv88e6095_g1_set_egress_port()
330 	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);  in mv88e6095_g1_set_cpu_port()
340 	return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);  in mv88e6390_g1_monitor_write()
422 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL2, reg);  in mv88e6xxx_g1_ctl2_mask()
484 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);  in mv88e6095_g1_stats_set_histogram()
494 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6xxx_g1_stats_snapshot()
519 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6390_g1_stats_snapshot()
537 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6xxx_g1_stats_read()
573 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);  in mv88e6xxx_g1_stats_clear()