Lines Matching refs:mv88e6xxx_chip

271 int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);
272 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
273 int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int
275 int mv88e6xxx_g1_wait_mask(struct mv88e6xxx_chip *chip, int reg,
278 int mv88e6xxx_g1_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);
280 int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip);
281 int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip);
282 int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip);
284 int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);
285 int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
287 int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu);
289 int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
290 int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
291 int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
292 int mv88e6095_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
293 int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
294 void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
295 int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
296 int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
299 int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
302 int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
303 int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
304 int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
306 int mv88e6085_g1_ip_pri_map(struct mv88e6xxx_chip *chip);
308 int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);
309 int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);
311 int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port);
313 int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip);
314 int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip);
315 int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip);
317 int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index);
319 int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all);
320 int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
322 int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,
324 int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,
326 int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all);
327 int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port,
329 int mv88e6xxx_g1_atu_prob_irq_setup(struct mv88e6xxx_chip *chip);
330 void mv88e6xxx_g1_atu_prob_irq_free(struct mv88e6xxx_chip *chip);
331 int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash);
332 int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash);
334 int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
336 int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
338 int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
340 int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
342 int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
344 int mv88e6390_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
346 int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
348 int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip);
349 int mv88e6xxx_g1_vtu_prob_irq_setup(struct mv88e6xxx_chip *chip);
350 void mv88e6xxx_g1_vtu_prob_irq_free(struct mv88e6xxx_chip *chip);
351 int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid);