Lines Matching refs:reg

47 MLXSW_ITEM32(reg, sgcr, llb, 0x04, 0, 1);
70 MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
87 MLXSW_ITEM32(reg, smid, swid, 0x00, 24, 8);
94 MLXSW_ITEM32(reg, smid, mid, 0x00, 0, 16);
100 MLXSW_ITEM_BIT_ARRAY(reg, smid, port, 0x20, 0x20, 1);
106 MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1);
137 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
144 MLXSW_ITEM32(reg, sspr, local_port, 0x00, 16, 8);
152 MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
162 MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
187 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
196 MLXSW_ITEM32(reg, sfdat, age_time, 0x04, 0, 20);
225 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
259 MLXSW_ITEM32(reg, sfd, op, 0x04, 30, 2);
268 MLXSW_ITEM32(reg, sfd, record_locator, 0x04, 0, 30);
277 MLXSW_ITEM32(reg, sfd, num_rec, 0x08, 0, 8);
291 MLXSW_ITEM32_INDEXED(reg, sfd, rec_swid, MLXSW_REG_SFD_BASE_LEN, 24, 8,
305 MLXSW_ITEM32_INDEXED(reg, sfd, rec_type, MLXSW_REG_SFD_BASE_LEN, 20, 4,
323 MLXSW_ITEM32_INDEXED(reg, sfd, rec_policy, MLXSW_REG_SFD_BASE_LEN, 18, 2,
332 MLXSW_ITEM32_INDEXED(reg, sfd, rec_a, MLXSW_REG_SFD_BASE_LEN, 16, 1,
339 MLXSW_ITEM_BUF_INDEXED(reg, sfd, rec_mac, MLXSW_REG_SFD_BASE_LEN, 6,
359 MLXSW_ITEM32_INDEXED(reg, sfd, rec_action, MLXSW_REG_SFD_BASE_LEN, 28, 4,
368 MLXSW_ITEM32_INDEXED(reg, sfd, uc_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
381 MLXSW_ITEM32_INDEXED(reg, sfd, uc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
388 MLXSW_ITEM32_INDEXED(reg, sfd, uc_system_port, MLXSW_REG_SFD_BASE_LEN, 0, 16,
434 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
447 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
454 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_vid, MLXSW_REG_SFD_BASE_LEN, 16, 12,
461 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_id, MLXSW_REG_SFD_BASE_LEN, 0, 10,
497 MLXSW_ITEM32_INDEXED(reg, sfd, mc_pgi, MLXSW_REG_SFD_BASE_LEN, 16, 13,
505 MLXSW_ITEM32_INDEXED(reg, sfd, mc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
514 MLXSW_ITEM32_INDEXED(reg, sfd, mc_mid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
535 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_uip_msb, MLXSW_REG_SFD_BASE_LEN, 24,
542 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_fid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
554 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_protocol, MLXSW_REG_SFD_BASE_LEN, 27,
564 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_uip_lsb, MLXSW_REG_SFD_BASE_LEN, 0,
609 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
615 MLXSW_ITEM32(reg, sfn, end, 0x04, 20, 1);
625 MLXSW_ITEM32(reg, sfn, num_rec, 0x04, 0, 8);
639 MLXSW_ITEM32_INDEXED(reg, sfn, rec_swid, MLXSW_REG_SFN_BASE_LEN, 24, 8,
661 MLXSW_ITEM32_INDEXED(reg, sfn, rec_type, MLXSW_REG_SFN_BASE_LEN, 20, 4,
668 MLXSW_ITEM_BUF_INDEXED(reg, sfn, rec_mac, MLXSW_REG_SFN_BASE_LEN, 6,
676 MLXSW_ITEM32_INDEXED(reg, sfn, mac_sub_port, MLXSW_REG_SFN_BASE_LEN, 16, 8,
683 MLXSW_ITEM32_INDEXED(reg, sfn, mac_fid, MLXSW_REG_SFN_BASE_LEN, 0, 16,
690 MLXSW_ITEM32_INDEXED(reg, sfn, mac_system_port, MLXSW_REG_SFN_BASE_LEN, 0, 16,
706 MLXSW_ITEM32_INDEXED(reg, sfn, mac_lag_lag_id, MLXSW_REG_SFN_BASE_LEN, 0, 10,
724 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_uip_msb, MLXSW_REG_SFN_BASE_LEN, 24,
736 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_protocol, MLXSW_REG_SFN_BASE_LEN, 27,
745 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_uip_lsb, MLXSW_REG_SFN_BASE_LEN, 0,
753 MLXSW_ITEM32_INDEXED(reg, sfn, tunnel_port, MLXSW_REG_SFN_BASE_LEN, 0, 4,
784 MLXSW_ITEM32(reg, spms, local_port, 0x00, 16, 8);
801 MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2);
829 MLXSW_ITEM32(reg, spvid, tport, 0x00, 24, 1);
836 MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
843 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
851 MLXSW_ITEM32(reg, spvid, egr_et_set, 0x04, 24, 1);
863 MLXSW_ITEM32(reg, spvid, et_vlan, 0x04, 16, 2);
869 MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
901 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
908 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
914 MLXSW_ITEM32(reg, spvm, local_port, 0x00, 16, 8);
921 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
927 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
933 MLXSW_ITEM32_INDEXED(reg, spvm, rec_i,
941 MLXSW_ITEM32_INDEXED(reg, spvm, rec_e,
950 MLXSW_ITEM32_INDEXED(reg, spvm, rec_u,
958 MLXSW_ITEM32_INDEXED(reg, spvm, rec_vid,
997 MLXSW_ITEM32(reg, spaft, local_port, 0x00, 16, 8);
1004 MLXSW_ITEM32(reg, spaft, sub_port, 0x00, 8, 8);
1010 MLXSW_ITEM32(reg, spaft, allow_untagged, 0x04, 31, 1);
1016 MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1);
1022 MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1);
1060 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
1072 MLXSW_ITEM32(reg, sfgc, bridge_type, 0x04, 24, 3);
1088 MLXSW_ITEM32(reg, sfgc, table_type, 0x04, 16, 3);
1095 MLXSW_ITEM32(reg, sfgc, flood_table, 0x04, 0, 6);
1101 MLXSW_ITEM32(reg, sfgc, mid, 0x08, 0, 16);
1107 MLXSW_ITEM32(reg, sfgc, counter_set_type, 0x0C, 24, 8);
1113 MLXSW_ITEM32(reg, sfgc, counter_index, 0x0C, 0, 24);
1143 MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
1150 MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
1157 MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
1163 MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
1169 MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
1175 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port, 0x20, 0x20, 1);
1181 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1);
1213 MLXSW_ITEM32(reg, sfdf, swid, 0x00, 24, 8);
1240 MLXSW_ITEM32(reg, sfdf, flush_type, 0x04, 28, 4);
1248 MLXSW_ITEM32(reg, sfdf, flush_static, 0x04, 24, 1);
1262 MLXSW_ITEM32(reg, sfdf, fid, 0x0C, 0, 16);
1268 MLXSW_ITEM32(reg, sfdf, system_port, 0x0C, 0, 16);
1274 MLXSW_ITEM32(reg, sfdf, port_fid_system_port, 0x08, 0, 16);
1280 MLXSW_ITEM32(reg, sfdf, lag_id, 0x0C, 0, 10);
1286 MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
1313 MLXSW_ITEM32(reg, sldr, op, 0x00, 29, 3);
1319 MLXSW_ITEM32(reg, sldr, lag_id, 0x00, 0, 10);
1341 MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8);
1347 MLXSW_ITEM32_INDEXED(reg, sldr, system_port, 0x08, 0, 16, 4, 0, false);
1391 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1400 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1412 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1472 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1478 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1511 MLXSW_ITEM32(reg, slcor, col, 0x00, 30, 2);
1518 MLXSW_ITEM32(reg, slcor, local_port, 0x00, 16, 8);
1524 MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
1531 MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10);
1586 MLXSW_ITEM32(reg, spmlr, local_port, 0x00, 16, 8);
1593 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
1612 MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
1637 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
1645 MLXSW_ITEM32(reg, svfa, local_port, 0x00, 16, 8);
1660 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
1669 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
1675 MLXSW_ITEM32(reg, svfa, fid, 0x04, 16, 16);
1681 MLXSW_ITEM32(reg, svfa, vid, 0x04, 0, 12);
1689 MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
1697 MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
1729 MLXSW_ITEM32(reg, spvtr, tport, 0x00, 24, 1);
1736 MLXSW_ITEM32(reg, spvtr, local_port, 0x00, 16, 8);
1744 MLXSW_ITEM32(reg, spvtr, ippe, 0x04, 31, 1);
1753 MLXSW_ITEM32(reg, spvtr, ipve, 0x04, 30, 1);
1761 MLXSW_ITEM32(reg, spvtr, epve, 0x04, 29, 1);
1773 MLXSW_ITEM32(reg, spvtr, ipprio_mode, 0x04, 20, 4);
1789 MLXSW_ITEM32(reg, spvtr, ipvid_mode, 0x04, 16, 4);
1803 MLXSW_ITEM32(reg, spvtr, epvid_mode, 0x04, 0, 4);
1831 MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
1839 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1869 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1875 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1883 MLXSW_ITEM32(reg, sfmr, fid_offset, 0x08, 0, 16);
1892 MLXSW_ITEM32(reg, sfmr, vtfp, 0x0C, 31, 1);
1900 MLXSW_ITEM32(reg, sfmr, nve_tunnel_flood_ptr, 0x0C, 0, 24);
1909 MLXSW_ITEM32(reg, sfmr, vv, 0x10, 31, 1);
1917 MLXSW_ITEM32(reg, sfmr, vni, 0x10, 0, 24);
1951 MLXSW_ITEM32(reg, spvmlr, local_port, 0x00, 16, 8);
1957 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
1964 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_learn_enable, MLXSW_REG_SPVMLR_BASE_LEN,
1971 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_vid, MLXSW_REG_SPVMLR_BASE_LEN, 0, 12,
2012 MLXSW_ITEM32(reg, spvc, local_port, 0x00, 16, 8);
2023 MLXSW_ITEM32(reg, spvc, inner_et2, 0x08, 17, 1);
2033 MLXSW_ITEM32(reg, spvc, et2, 0x08, 16, 1);
2044 MLXSW_ITEM32(reg, spvc, inner_et1, 0x08, 9, 1);
2054 MLXSW_ITEM32(reg, spvc, et1, 0x08, 8, 1);
2065 MLXSW_ITEM32(reg, spvc, inner_et0, 0x08, 1, 1);
2075 MLXSW_ITEM32(reg, spvc, et0, 0x08, 0, 1);
2107 MLXSW_ITEM32(reg, spevet, local_port, 0x00, 16, 8);
2116 MLXSW_ITEM32(reg, spevet, et_vlan, 0x04, 16, 2);
2142 MLXSW_ITEM32(reg, cwtp, local_port, 0, 16, 8);
2148 MLXSW_ITEM32(reg, cwtp, traffic_class, 32, 0, 8);
2154 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_min, MLXSW_REG_CWTP_BASE_LEN,
2162 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_percent, MLXSW_REG_CWTP_BASE_LEN,
2169 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_max, MLXSW_REG_CWTP_BASE_LEN,
2220 MLXSW_ITEM32(reg, cwtpm, local_port, 0, 16, 8);
2226 MLXSW_ITEM32(reg, cwtpm, traffic_class, 32, 0, 8);
2234 MLXSW_ITEM32(reg, cwtpm, ew, 36, 1, 1);
2242 MLXSW_ITEM32(reg, cwtpm, ee, 36, 0, 1);
2250 MLXSW_ITEM32(reg, cwtpm, tcp_g, 52, 0, 2);
2258 MLXSW_ITEM32(reg, cwtpm, tcp_y, 56, 16, 2);
2266 MLXSW_ITEM32(reg, cwtpm, tcp_r, 56, 0, 2);
2274 MLXSW_ITEM32(reg, cwtpm, ntcp_g, 60, 0, 2);
2282 MLXSW_ITEM32(reg, cwtpm, ntcp_y, 64, 16, 2);
2290 MLXSW_ITEM32(reg, cwtpm, ntcp_r, 64, 0, 2);
2325 MLXSW_ITEM32(reg, pgcr, default_action_pointer_base, 0x1C, 0, 24);
2350 MLXSW_ITEM32(reg, ppbt, e, 0x00, 31, 1);
2360 MLXSW_ITEM32(reg, ppbt, op, 0x00, 28, 3);
2366 MLXSW_ITEM32(reg, ppbt, local_port, 0x00, 16, 8);
2374 MLXSW_ITEM32(reg, ppbt, g, 0x10, 31, 1);
2381 MLXSW_ITEM32(reg, ppbt, acl_info, 0x10, 0, 16);
2409 MLXSW_ITEM32(reg, pacl, v, 0x00, 24, 1);
2416 MLXSW_ITEM32(reg, pacl, acl_id, 0x08, 0, 16);
2425 MLXSW_ITEM_BUF(reg, pacl, tcam_region_info, 0x30,
2459 MLXSW_ITEM32(reg, pagt, size, 0x00, 0, 8);
2466 MLXSW_ITEM32(reg, pagt, acl_group_id, 0x08, 0, 16);
2474 MLXSW_ITEM32_INDEXED(reg, pagt, multi, 0x30, 31, 1, 0x04, 0x00, false);
2480 MLXSW_ITEM32_INDEXED(reg, pagt, acl_id, 0x30, 0, 16, 0x04, 0x00, false);
2527 MLXSW_ITEM32(reg, ptar, op, 0x00, 28, 4);
2534 MLXSW_ITEM32(reg, ptar, action_set_type, 0x00, 16, 8);
2545 MLXSW_ITEM32(reg, ptar, key_type, 0x00, 0, 8);
2555 MLXSW_ITEM32(reg, ptar, region_size, 0x04, 0, 16);
2562 MLXSW_ITEM32(reg, ptar, region_id, 0x08, 0, 16);
2570 MLXSW_ITEM_BUF(reg, ptar, tcam_region_info, 0x10,
2581 MLXSW_ITEM8_INDEXED(reg, ptar, flexible_key_id, 0x20, 0, 8,
2623 MLXSW_ITEM32(reg, ppbs, pbs_ptr, 0x08, 0, 24);
2629 MLXSW_ITEM32(reg, ppbs, system_port, 0x10, 0, 16);
2664 MLXSW_ITEM32(reg, prcr, op, 0x00, 28, 4);
2670 MLXSW_ITEM32(reg, prcr, offset, 0x00, 0, 16);
2676 MLXSW_ITEM32(reg, prcr, size, 0x04, 0, 16);
2682 MLXSW_ITEM_BUF(reg, prcr, tcam_region_info, 0x10,
2689 MLXSW_ITEM32(reg, prcr, dest_offset, 0x20, 0, 16);
2695 MLXSW_ITEM_BUF(reg, prcr, dest_tcam_region_info, 0x30,
2729 MLXSW_ITEM32(reg, pefa, index, 0x00, 0, 24);
2738 MLXSW_ITEM32(reg, pefa, a, 0x04, 29, 1);
2746 MLXSW_ITEM32(reg, pefa, ca, 0x04, 24, 1);
2755 MLXSW_ITEM_BUF(reg, pefa, flex_action_set, 0x08, MLXSW_REG_FLEX_ACTION_SET_LEN);
2792 MLXSW_ITEM32(reg, pemrbt, protocol, 0x00, 0, 1);
2799 MLXSW_ITEM32(reg, pemrbt, group_id, 0x10, 0, 16);
2826 MLXSW_ITEM32(reg, ptce2, v, 0x00, 31, 1);
2833 MLXSW_ITEM32(reg, ptce2, a, 0x00, 30, 1);
2856 MLXSW_ITEM32(reg, ptce2, op, 0x00, 20, 3);
2861 MLXSW_ITEM32(reg, ptce2, offset, 0x00, 0, 16);
2870 MLXSW_ITEM32(reg, ptce2, priority, 0x04, 0, 24);
2876 MLXSW_ITEM_BUF(reg, ptce2, tcam_region_info, 0x10,
2885 MLXSW_ITEM_BUF(reg, ptce2, flex_key_blocks, 0x20,
2894 MLXSW_ITEM_BUF(reg, ptce2, mask, 0x80,
2901 MLXSW_ITEM_BUF(reg, ptce2, flex_action_set, 0xE0,
2931 MLXSW_ITEM32(reg, perpt, erpt_bank, 0x00, 16, 4);
2938 MLXSW_ITEM32(reg, perpt, erpt_index, 0x00, 0, 8);
2950 MLXSW_ITEM32(reg, perpt, key_size, 0x04, 0, 4);
2959 MLXSW_ITEM32(reg, perpt, bf_bypass, 0x08, 8, 1);
2965 MLXSW_ITEM32(reg, perpt, erp_id, 0x08, 0, 4);
2972 MLXSW_ITEM32(reg, perpt, erpt_base_bank, 0x0C, 16, 4);
2979 MLXSW_ITEM32(reg, perpt, erpt_base_index, 0x0C, 0, 8);
2985 MLXSW_ITEM32(reg, perpt, erp_index_in_vector, 0x10, 0, 4);
2991 MLXSW_ITEM_BIT_ARRAY(reg, perpt, erp_vector, 0x14, 4, 1);
2999 MLXSW_ITEM_BUF(reg, perpt, mask, 0x20, MLXSW_REG_PTCEX_FLEX_KEY_BLOCKS_LEN);
3044 MLXSW_ITEM32(reg, perar, region_id, 0x00, 0, 16);
3060 MLXSW_ITEM32(reg, perar, hw_region, 0x04, 0, 16);
3084 MLXSW_ITEM32(reg, ptce3, v, 0x00, 31, 1);
3102 MLXSW_ITEM32(reg, ptce3, op, 0x00, 20, 3);
3110 MLXSW_ITEM32(reg, ptce3, priority, 0x04, 0, 24);
3116 MLXSW_ITEM_BUF(reg, ptce3, tcam_region_info, 0x10,
3124 MLXSW_ITEM_BUF(reg, ptce3, flex2_key_blocks, 0x20,
3131 MLXSW_ITEM32(reg, ptce3, erp_id, 0x80, 0, 4);
3138 MLXSW_ITEM32(reg, ptce3, delta_start, 0x84, 0, 10);
3149 MLXSW_ITEM32(reg, ptce3, delta_mask, 0x88, 16, 8);
3156 MLXSW_ITEM32(reg, ptce3, delta_value, 0x88, 0, 8);
3168 MLXSW_ITEM_BIT_ARRAY(reg, ptce3, prune_vector, 0x90, 4, 1);
3176 MLXSW_ITEM32(reg, ptce3, prune_ctcam, 0x94, 31, 1);
3189 MLXSW_ITEM32(reg, ptce3, large_exists, 0x98, 31, 1);
3199 MLXSW_ITEM32(reg, ptce3, large_entry_key_id, 0x98, 0, 24);
3206 MLXSW_ITEM32(reg, ptce3, action_pointer, 0xA0, 0, 24);
3247 MLXSW_ITEM32(reg, percr, region_id, 0x00, 0, 16);
3253 MLXSW_ITEM32(reg, percr, atcam_ignore_prune, 0x04, 25, 1);
3259 MLXSW_ITEM32(reg, percr, ctcam_ignore_prune, 0x04, 24, 1);
3268 MLXSW_ITEM32(reg, percr, bf_bypass, 0x04, 16, 1);
3276 MLXSW_ITEM_BUF(reg, percr, master_mask, 0x20, 96);
3302 MLXSW_ITEM32(reg, pererp, region_id, 0x00, 0, 16);
3308 MLXSW_ITEM32(reg, pererp, ctcam_le, 0x04, 28, 1);
3314 MLXSW_ITEM32(reg, pererp, erpt_pointer_valid, 0x10, 31, 1);
3321 MLXSW_ITEM32(reg, pererp, erpt_bank_pointer, 0x10, 16, 4);
3330 MLXSW_ITEM32(reg, pererp, erpt_pointer, 0x10, 0, 8);
3339 MLXSW_ITEM_BIT_ARRAY(reg, pererp, erpt_vector, 0x14, 4, 1);
3347 MLXSW_ITEM32(reg, pererp, master_rp_id, 0x18, 0, 4);
3392 MLXSW_ITEM32(reg, peabfe, size, 0x00, 0, 9);
3400 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_state,
3409 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_bank,
3418 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_index,
3459 MLXSW_ITEM32(reg, iedr, num_rec, 0x00, 0, 8);
3465 MLXSW_ITEM32_INDEXED(reg, iedr, rec_type, MLXSW_REG_IEDR_BASE_LEN, 24, 8,
3472 MLXSW_ITEM32_INDEXED(reg, iedr, rec_size, MLXSW_REG_IEDR_BASE_LEN, 0, 13,
3479 MLXSW_ITEM32_INDEXED(reg, iedr, rec_index_start, MLXSW_REG_IEDR_BASE_LEN, 0, 24,
3516 MLXSW_ITEM32(reg, qpts, local_port, 0x00, 16, 8);
3527 MLXSW_ITEM32(reg, qpts, trust_state, 0x04, 0, 3);
3557 MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2);
3563 MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14);
3569 MLXSW_ITEM32(reg, qpcr, clear_counter, 0x04, 31, 1);
3576 MLXSW_ITEM32(reg, qpcr, color_aware, 0x04, 15, 1);
3584 MLXSW_ITEM32(reg, qpcr, bytes, 0x04, 14, 1);
3597 MLXSW_ITEM32(reg, qpcr, ir_units, 0x04, 12, 1);
3610 MLXSW_ITEM32(reg, qpcr, rate_type, 0x04, 8, 2);
3623 MLXSW_ITEM32(reg, qpcr, cbs, 0x08, 24, 6);
3632 MLXSW_ITEM32(reg, qpcr, cir, 0x0C, 0, 32);
3642 MLXSW_ITEM32(reg, qpcr, eir, 0x10, 0, 32);
3650 MLXSW_ITEM32(reg, qpcr, exceed_action, 0x14, 0, 4);
3666 MLXSW_ITEM32(reg, qpcr, violate_action, 0x18, 0, 4);
3672 MLXSW_ITEM64(reg, qpcr, violate_count, 0x20, 0, 64);
3720 MLXSW_ITEM32(reg, qtct, local_port, 0x00, 16, 8);
3727 MLXSW_ITEM32(reg, qtct, sub_port, 0x00, 8, 8);
3733 MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
3743 MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4);
3769 MLXSW_ITEM32(reg, qeec, local_port, 0x00, 16, 8);
3785 MLXSW_ITEM32(reg, qeec, element_hierarchy, 0x04, 16, 4);
3791 MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8);
3799 MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8);
3808 MLXSW_ITEM32(reg, qeec, mise, 0x0C, 31, 1);
3820 MLXSW_ITEM32(reg, qeec, ptps, 0x0C, 29, 1);
3836 MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1);
3847 MLXSW_ITEM32(reg, qeec, min_shaper_rate, 0x0C, 0, 28);
3856 MLXSW_ITEM32(reg, qeec, mase, 0x10, 31, 1);
3867 MLXSW_ITEM32(reg, qeec, max_shaper_rate, 0x10, 0, 31);
3876 MLXSW_ITEM32(reg, qeec, de, 0x18, 31, 1);
3885 MLXSW_ITEM32(reg, qeec, dwrr, 0x18, 15, 1);
3895 MLXSW_ITEM32(reg, qeec, dwrr_weight, 0x18, 0, 8);
3905 MLXSW_ITEM32(reg, qeec, max_shaper_bs, 0x1C, 0, 6);
3947 MLXSW_ITEM32(reg, qrwe, local_port, 0x00, 16, 8);
3953 MLXSW_ITEM32(reg, qrwe, dscp, 0x04, 1, 1);
3959 MLXSW_ITEM32(reg, qrwe, pcp, 0x04, 0, 1);
3988 MLXSW_ITEM32(reg, qpdsm, local_port, 0x00, 16, 8);
3994 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color0_e,
4003 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color0_dscp,
4011 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color1_e,
4020 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color1_dscp,
4028 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_e,
4037 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_dscp,
4074 MLXSW_ITEM32(reg, qpdp, local_port, 0x00, 16, 8);
4080 MLXSW_ITEM32(reg, qpdp, switch_prio, 0x04, 0, 4);
4109 MLXSW_ITEM32(reg, qpdpm, local_port, 0x00, 16, 8);
4117 MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_e, MLXSW_REG_QPDPM_BASE_LEN, 15, 1,
4124 MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_prio,
4160 MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8);
4167 MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1);
4198 MLXSW_ITEM32(reg, qpsc, port_speed, 0x00, 0, 4);
4206 MLXSW_ITEM32(reg, qpsc, shaper_time_exp, 0x04, 16, 4);
4214 MLXSW_ITEM32(reg, qpsc, shaper_time_mantissa, 0x04, 0, 5);
4221 MLXSW_ITEM32(reg, qpsc, shaper_inc, 0x08, 0, 5);
4229 MLXSW_ITEM32(reg, qpsc, shaper_bs, 0x0C, 0, 6);
4235 MLXSW_ITEM32(reg, qpsc, ptsc_we, 0x10, 31, 1);
4243 MLXSW_ITEM32(reg, qpsc, port_to_shaper_credits, 0x10, 0, 8);
4253 MLXSW_ITEM32(reg, qpsc, ing_timestamp_inc, 0x20, 0, 32);
4263 MLXSW_ITEM32(reg, qpsc, egr_timestamp_inc, 0x24, 0, 32);
4297 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
4303 MLXSW_ITEM32(reg, pmlp, local_port, 0x00, 16, 8);
4313 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
4319 MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0x00, false);
4325 MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 4, 0x04, 0x00, false);
4332 MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 4, 0x04, 0x00, false);
4353 MLXSW_ITEM32(reg, pmtu, local_port, 0x00, 16, 8);
4362 MLXSW_ITEM32(reg, pmtu, max_mtu, 0x04, 16, 16);
4370 MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
4379 MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
4409 MLXSW_ITEM32(reg, ptys, an_disable_admin, 0x00, 30, 1);
4415 MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
4427 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
4439 MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);
4458 MLXSW_ITEM32(reg, ptys, ext_eth_proto_cap, 0x08, 0, 32);
4488 MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
4494 MLXSW_ITEM32(reg, ptys, ib_link_width_cap, 0x10, 16, 16);
4507 MLXSW_ITEM32(reg, ptys, ib_proto_cap, 0x10, 0, 16);
4513 MLXSW_ITEM32(reg, ptys, ext_eth_proto_admin, 0x14, 0, 32);
4519 MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
4525 MLXSW_ITEM32(reg, ptys, ib_link_width_admin, 0x1C, 16, 16);
4531 MLXSW_ITEM32(reg, ptys, ib_proto_admin, 0x1C, 0, 16);
4537 MLXSW_ITEM32(reg, ptys, ext_eth_proto_oper, 0x20, 0, 32);
4543 MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
4549 MLXSW_ITEM32(reg, ptys, ib_link_width_oper, 0x28, 16, 16);
4555 MLXSW_ITEM32(reg, ptys, ib_proto_oper, 0x28, 0, 16);
4573 MLXSW_ITEM32(reg, ptys, connector_type, 0x2C, 0, 4);
4669 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
4675 MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
4682 MLXSW_ITEM_BUF(reg, ppad, mac, 0x02, 6);
4708 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
4714 MLXSW_ITEM32(reg, paos, local_port, 0x00, 16, 8);
4725 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
4735 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
4741 MLXSW_ITEM32(reg, paos, ase, 0x04, 31, 1);
4748 MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
4757 MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
4785 MLXSW_ITEM32(reg, pfcc, local_port, 0x00, 16, 8);
4793 MLXSW_ITEM32(reg, pfcc, pnat, 0x00, 14, 2);
4802 MLXSW_ITEM32(reg, pfcc, shl_cap, 0x00, 1, 1);
4811 MLXSW_ITEM32(reg, pfcc, shl_opr, 0x00, 0, 1);
4823 MLXSW_ITEM32(reg, pfcc, ppan, 0x04, 28, 4);
4830 MLXSW_ITEM32(reg, pfcc, prio_mask_tx, 0x04, 16, 8);
4837 MLXSW_ITEM32(reg, pfcc, prio_mask_rx, 0x04, 0, 8);
4845 MLXSW_ITEM32(reg, pfcc, pptx, 0x08, 31, 1);
4853 MLXSW_ITEM32(reg, pfcc, aptx, 0x08, 30, 1);
4865 MLXSW_ITEM32(reg, pfcc, pfctx, 0x08, 16, 8);
4873 MLXSW_ITEM32(reg, pfcc, pprx, 0x0C, 31, 1);
4881 MLXSW_ITEM32(reg, pfcc, aprx, 0x0C, 30, 1);
4890 MLXSW_ITEM32(reg, pfcc, pfcrx, 0x0C, 16, 8);
4927 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
4935 MLXSW_ITEM32(reg, ppcnt, local_port, 0x00, 16, 8);
4943 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
4974 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
4982 MLXSW_ITEM32(reg, ppcnt, clr, 0x04, 31, 1);
4992 MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5);
4999 MLXSW_ITEM64(reg, ppcnt, a_frames_transmitted_ok,
5005 MLXSW_ITEM64(reg, ppcnt, a_frames_received_ok,
5011 MLXSW_ITEM64(reg, ppcnt, a_frame_check_sequence_errors,
5017 MLXSW_ITEM64(reg, ppcnt, a_alignment_errors,
5023 MLXSW_ITEM64(reg, ppcnt, a_octets_transmitted_ok,
5029 MLXSW_ITEM64(reg, ppcnt, a_octets_received_ok,
5035 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_xmitted_ok,
5041 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_xmitted_ok,
5047 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_received_ok,
5053 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_received_ok,
5059 MLXSW_ITEM64(reg, ppcnt, a_in_range_length_errors,
5065 MLXSW_ITEM64(reg, ppcnt, a_out_of_range_length_field,
5071 MLXSW_ITEM64(reg, ppcnt, a_frame_too_long_errors,
5077 MLXSW_ITEM64(reg, ppcnt, a_symbol_error_during_carrier,
5083 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_transmitted,
5089 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_received,
5095 MLXSW_ITEM64(reg, ppcnt, a_unsupported_opcodes_received,
5101 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_received,
5107 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_transmitted,
5115 MLXSW_ITEM64(reg, ppcnt, if_in_discards,
5121 MLXSW_ITEM64(reg, ppcnt, if_out_discards,
5127 MLXSW_ITEM64(reg, ppcnt, if_out_errors,
5135 MLXSW_ITEM64(reg, ppcnt, ether_stats_undersize_pkts,
5141 MLXSW_ITEM64(reg, ppcnt, ether_stats_oversize_pkts,
5147 MLXSW_ITEM64(reg, ppcnt, ether_stats_fragments,
5153 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts64octets,
5159 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts65to127octets,
5165 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts128to255octets,
5171 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts256to511octets,
5177 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts512to1023octets,
5183 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts1024to1518octets,
5189 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts1519to2047octets,
5195 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts2048to4095octets,
5201 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts4096to8191octets,
5207 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts8192to10239octets,
5215 MLXSW_ITEM64(reg, ppcnt, dot3stats_fcs_errors,
5221 MLXSW_ITEM64(reg, ppcnt, dot3stats_symbol_errors,
5227 MLXSW_ITEM64(reg, ppcnt, dot3control_in_unknown_opcodes,
5233 MLXSW_ITEM64(reg, ppcnt, dot3in_pause_frames,
5241 MLXSW_ITEM64(reg, ppcnt, ecn_marked,
5249 MLXSW_ITEM64(reg, ppcnt, ingress_general,
5255 MLXSW_ITEM64(reg, ppcnt, ingress_policy_engine,
5261 MLXSW_ITEM64(reg, ppcnt, ingress_vlan_membership,
5267 MLXSW_ITEM64(reg, ppcnt, ingress_tag_frame_type,
5273 MLXSW_ITEM64(reg, ppcnt, egress_vlan_membership,
5279 MLXSW_ITEM64(reg, ppcnt, loopback_filter,
5285 MLXSW_ITEM64(reg, ppcnt, egress_general,
5291 MLXSW_ITEM64(reg, ppcnt, egress_hoq,
5297 MLXSW_ITEM64(reg, ppcnt, egress_policy_engine,
5303 MLXSW_ITEM64(reg, ppcnt, ingress_tx_link_down,
5309 MLXSW_ITEM64(reg, ppcnt, egress_stp_filter,
5315 MLXSW_ITEM64(reg, ppcnt, egress_sll,
5323 MLXSW_ITEM64(reg, ppcnt, rx_octets,
5329 MLXSW_ITEM64(reg, ppcnt, rx_frames,
5335 MLXSW_ITEM64(reg, ppcnt, tx_octets,
5341 MLXSW_ITEM64(reg, ppcnt, tx_frames,
5347 MLXSW_ITEM64(reg, ppcnt, rx_pause,
5353 MLXSW_ITEM64(reg, ppcnt, rx_pause_duration,
5359 MLXSW_ITEM64(reg, ppcnt, tx_pause,
5365 MLXSW_ITEM64(reg, ppcnt, tx_pause_duration,
5371 MLXSW_ITEM64(reg, ppcnt, tx_pause_transition,
5382 MLXSW_ITEM64(reg, ppcnt, tc_transmit_queue,
5390 MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc,
5398 MLXSW_ITEM64(reg, ppcnt, wred_discard,
5427 MLXSW_ITEM32(reg, plib, local_port, 0x00, 16, 8);
5433 MLXSW_ITEM32(reg, plib, ib_port, 0x00, 0, 8);
5459 MLXSW_ITEM32(reg, pptb, mm, 0x00, 28, 2);
5465 MLXSW_ITEM32(reg, pptb, local_port, 0x00, 16, 8);
5471 MLXSW_ITEM32(reg, pptb, um, 0x00, 8, 1);
5478 MLXSW_ITEM32(reg, pptb, pm, 0x00, 0, 8);
5485 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff, 0x04, 0x04, 4);
5492 MLXSW_ITEM32(reg, pptb, pm_msb, 0x08, 24, 8);
5501 MLXSW_ITEM32(reg, pptb, untagged_buff, 0x08, 0, 4);
5508 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4);
5542 MLXSW_ITEM32(reg, pbmc, local_port, 0x00, 16, 8);
5549 MLXSW_ITEM32(reg, pbmc, xoff_timer_value, 0x04, 16, 16);
5557 MLXSW_ITEM32(reg, pbmc, xoff_refresh, 0x04, 0, 16);
5567 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_lossy, 0x0C, 25, 1, 0x08, 0x00, false);
5576 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_epsb, 0x0C, 24, 1, 0x08, 0x00, false);
5583 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_size, 0x0C, 0, 16, 0x08, 0x00, false);
5594 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xoff_threshold, 0x0C, 16, 16,
5606 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xon_threshold, 0x0C, 0, 16,
5652 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
5658 MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
5665 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
5688 MLXSW_ITEM32(reg, pmaos, slot_index, 0x00, 24, 4);
5694 MLXSW_ITEM32(reg, pmaos, module, 0x00, 16, 8);
5702 MLXSW_ITEM32(reg, pmaos, ase, 0x04, 31, 1);
5710 MLXSW_ITEM32(reg, pmaos, ee, 0x04, 30, 1);
5722 MLXSW_ITEM32(reg, pmaos, e, 0x04, 0, 2);
5746 MLXSW_ITEM32(reg, pplr, local_port, 0x00, 16, 8);
5757 MLXSW_ITEM32(reg, pplr, lb_en, 0x04, 0, 8);
5786 MLXSW_ITEM32(reg, pmpe, slot_index, 0x00, 24, 4);
5792 MLXSW_ITEM32(reg, pmpe, module, 0x00, 16, 8);
5805 MLXSW_ITEM32(reg, pmpe, module_status, 0x00, 0, 4);
5811 MLXSW_ITEM32(reg, pmpe, error_type, 0x04, 8, 4);
5826 MLXSW_ITEM32(reg, pddr, local_port, 0x00, 16, 8);
5836 MLXSW_ITEM32(reg, pddr, page_select, 0x04, 0, 8);
5847 MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16);
5853 MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16);
5876 MLXSW_ITEM32(reg, pmtm, module, 0x00, 16, 8);
5911 MLXSW_ITEM32(reg, pmtm, module_type, 0x04, 0, 4);
5939 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
5947 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
5995 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
6006 MLXSW_ITEM32(reg, htgt, pide, 0x04, 15, 1);
6014 MLXSW_ITEM32(reg, htgt, pid, 0x04, 0, 8);
6027 MLXSW_ITEM32(reg, htgt, mirror_action, 0x08, 8, 2);
6033 MLXSW_ITEM32(reg, htgt, mirroring_agent, 0x08, 0, 3);
6048 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
6056 MLXSW_ITEM32(reg, htgt, local_path_cpu_tclass, 0x10, 16, 6);
6068 MLXSW_ITEM32(reg, htgt, local_path_rdq, 0x10, 0, 6);
6115 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
6143 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
6149 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
6158 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 10);
6174 MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);
6203 MLXSW_ITEM32(reg, rgcr, ipv4_en, 0x00, 31, 1);
6209 MLXSW_ITEM32(reg, rgcr, ipv6_en, 0x00, 30, 1);
6216 MLXSW_ITEM32(reg, rgcr, max_router_interfaces, 0x10, 0, 16);
6226 MLXSW_ITEM32(reg, rgcr, usp, 0x18, 20, 1);
6237 MLXSW_ITEM32(reg, rgcr, pcp_rw, 0x18, 16, 2);
6253 MLXSW_ITEM32(reg, rgcr, activity_dis, 0x20, 0, 8);
6276 MLXSW_ITEM32(reg, ritr, enable, 0x00, 31, 1);
6283 MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
6290 MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
6296 MLXSW_ITEM32(reg, ritr, ipv4_mc, 0x00, 27, 1);
6302 MLXSW_ITEM32(reg, ritr, ipv6_mc, 0x00, 26, 1);
6319 MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
6335 MLXSW_ITEM32(reg, ritr, op, 0x00, 20, 2);
6341 MLXSW_ITEM32(reg, ritr, rif, 0x00, 0, 16);
6350 MLXSW_ITEM32(reg, ritr, ipv4_fe, 0x04, 29, 1);
6359 MLXSW_ITEM32(reg, ritr, ipv6_fe, 0x04, 28, 1);
6367 MLXSW_ITEM32(reg, ritr, ipv4_mc_fe, 0x04, 27, 1);
6375 MLXSW_ITEM32(reg, ritr, ipv6_mc_fe, 0x04, 26, 1);
6384 MLXSW_ITEM32(reg, ritr, lb_en, 0x04, 24, 1);
6390 MLXSW_ITEM32(reg, ritr, virtual_router, 0x04, 0, 16);
6396 MLXSW_ITEM32(reg, ritr, mtu, 0x34, 0, 16);
6402 MLXSW_ITEM32(reg, ritr, if_swid, 0x08, 24, 8);
6409 MLXSW_ITEM_BUF(reg, ritr, if_mac, 0x12, 6);
6416 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv6, 0x1C, 8, 8);
6423 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv4, 0x1C, 0, 8);
6431 MLXSW_ITEM32(reg, ritr, vlan_if_vid, 0x08, 0, 12);
6440 MLXSW_ITEM32(reg, ritr, fid_if_fid, 0x08, 0, 16);
6459 MLXSW_ITEM32(reg, ritr, sp_if_lag, 0x08, 24, 1);
6466 MLXSW_ITEM32(reg, ritr, sp_if_system_port, 0x08, 0, 16);
6472 MLXSW_ITEM32(reg, ritr, sp_if_vid, 0x18, 0, 12);
6488 MLXSW_ITEM32(reg, ritr, loopback_protocol, 0x08, 28, 4);
6503 MLXSW_ITEM32(reg, ritr, loopback_ipip_type, 0x10, 24, 4);
6513 MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4);
6521 MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);
6528 MLXSW_ITEM32(reg, ritr, loopback_ipip_underlay_rif, 0x14, 0, 16);
6534 MLXSW_ITEM_BUF(reg, ritr, loopback_ipip_usip6, 0x18, 16);
6535 MLXSW_ITEM32(reg, ritr, loopback_ipip_usip4, 0x24, 0, 32);
6542 MLXSW_ITEM32(reg, ritr, loopback_ipip_gre_key, 0x28, 0, 32);
6561 MLXSW_ITEM32(reg, ritr, ingress_counter_index, 0x38, 0, 24);
6567 MLXSW_ITEM32(reg, ritr, ingress_counter_set_type, 0x38, 24, 8);
6573 MLXSW_ITEM32(reg, ritr, egress_counter_index, 0x3C, 0, 24);
6579 MLXSW_ITEM32(reg, ritr, egress_counter_set_type, 0x3C, 24, 8);
6685 MLXSW_ITEM32(reg, rtar, op, 0x00, 28, 4);
6696 MLXSW_ITEM32(reg, rtar, key_type, 0x00, 0, 8);
6705 MLXSW_ITEM32(reg, rtar, region_size, 0x04, 0, 16);
6750 MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
6764 MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
6771 MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
6803 MLXSW_ITEM32(reg, ratr, type, 0x04, 28, 4);
6812 MLXSW_ITEM32(reg, ratr, adjacency_index_low, 0x04, 0, 16);
6818 MLXSW_ITEM32(reg, ratr, egress_router_interface, 0x08, 0, 16);
6832 MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
6838 MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
6851 MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
6857 MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
6871 MLXSW_ITEM32(reg, ratr, ipip_type, 0x10, 16, 4);
6878 MLXSW_ITEM32(reg, ratr, ipip_ipv4_udip, 0x18, 0, 32);
6885 MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
6900 MLXSW_ITEM32(reg, ratr, counter_set_type, 0x28, 24, 8);
6906 MLXSW_ITEM32(reg, ratr, counter_index, 0x28, 0, 24);
6968 MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_e, MLXSW_REG_RDPM_LAST_ENTRY, 7, 1,
6975 MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_prio, MLXSW_REG_RDPM_LAST_ENTRY, 0, 4,
6998 MLXSW_ITEM32(reg, ricnt, counter_index, 0x04, 0, 24);
7016 MLXSW_ITEM32(reg, ricnt, counter_set_type, 0x04, 24, 8);
7031 MLXSW_ITEM32(reg, ricnt, op, 0x00, 28, 4);
7037 MLXSW_ITEM64(reg, ricnt, good_unicast_packets, 0x08, 0, 64);
7043 MLXSW_ITEM64(reg, ricnt, good_multicast_packets, 0x10, 0, 64);
7049 MLXSW_ITEM64(reg, ricnt, good_broadcast_packets, 0x18, 0, 64);
7056 MLXSW_ITEM64(reg, ricnt, good_unicast_bytes, 0x20, 0, 64);
7063 MLXSW_ITEM64(reg, ricnt, good_multicast_bytes, 0x28, 0, 64);
7070 MLXSW_ITEM64(reg, ricnt, good_broadcast_bytes, 0x30, 0, 64);
7076 MLXSW_ITEM64(reg, ricnt, error_packets, 0x38, 0, 64);
7082 MLXSW_ITEM64(reg, ricnt, discard_packets, 0x40, 0, 64);
7089 MLXSW_ITEM64(reg, ricnt, error_bytes, 0x48, 0, 64);
7096 MLXSW_ITEM64(reg, ricnt, discard_bytes, 0x50, 0, 64);
7127 MLXSW_ITEM32(reg, rrcr, op, 0x00, 28, 4);
7133 MLXSW_ITEM32(reg, rrcr, offset, 0x00, 0, 16);
7139 MLXSW_ITEM32(reg, rrcr, size, 0x04, 0, 16);
7146 MLXSW_ITEM32(reg, rrcr, table_id, 0x10, 0, 4);
7152 MLXSW_ITEM32(reg, rrcr, dest_offset, 0x20, 0, 16);
7182 MLXSW_ITEM32(reg, ralta, op, 0x00, 28, 2);
7194 MLXSW_ITEM32(reg, ralta, protocol, 0x00, 24, 4);
7202 MLXSW_ITEM32(reg, ralta, tree_id, 0x00, 0, 8);
7234 MLXSW_ITEM32(reg, ralst, root_bin, 0x00, 16, 8);
7240 MLXSW_ITEM32(reg, ralst, tree_id, 0x00, 0, 8);
7252 MLXSW_ITEM16_INDEXED(reg, ralst, left_child_bin, 0x04, 8, 8, 0x02, 0x00, false);
7260 MLXSW_ITEM16_INDEXED(reg, ralst, right_child_bin, 0x04, 0, 8, 0x02, 0x00,
7300 MLXSW_ITEM32(reg, raltb, virtual_router, 0x00, 16, 16);
7306 MLXSW_ITEM32(reg, raltb, protocol, 0x00, 12, 4);
7314 MLXSW_ITEM32(reg, raltb, tree_id, 0x00, 0, 8);
7340 MLXSW_ITEM32(reg, ralue, protocol, 0x00, 24, 4);
7373 MLXSW_ITEM32(reg, ralue, op, 0x00, 20, 3);
7382 MLXSW_ITEM32(reg, ralue, a, 0x00, 16, 1);
7389 MLXSW_ITEM32(reg, ralue, virtual_router, 0x04, 16, 16);
7402 MLXSW_ITEM32(reg, ralue, op_u_mask, 0x04, 8, 3);
7410 MLXSW_ITEM32(reg, ralue, prefix_len, 0x08, 0, 8);
7420 MLXSW_ITEM32(reg, ralue, dip4, 0x18, 0, 32);
7421 MLXSW_ITEM_BUF(reg, ralue, dip6, 0x0C, 16);
7434 MLXSW_ITEM32(reg, ralue, entry_type, 0x1C, 30, 2);
7444 MLXSW_ITEM32(reg, ralue, bmp_len, 0x1C, 16, 8);
7461 MLXSW_ITEM32(reg, ralue, action_type, 0x1C, 0, 2);
7476 MLXSW_ITEM32(reg, ralue, trap_action, 0x20, 28, 4);
7484 MLXSW_ITEM32(reg, ralue, trap_id, 0x20, 0, 9);
7491 MLXSW_ITEM32(reg, ralue, adjacency_index, 0x24, 0, 24);
7501 MLXSW_ITEM32(reg, ralue, ecmp_size, 0x28, 0, 13);
7508 MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
7520 MLXSW_ITEM32(reg, ralue, ip2me_v, 0x24, 31, 1);
7528 MLXSW_ITEM32(reg, ralue, ip2me_tunnel_ptr, 0x24, 0, 24);
7626 MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
7657 MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
7666 MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
7672 MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
7678 MLXSW_ITEM32(reg, rauht, dip4, 0x1C, 0x0, 32);
7679 MLXSW_ITEM_BUF(reg, rauht, dip6, 0x10, 16);
7692 MLXSW_ITEM32(reg, rauht, trap_action, 0x60, 28, 4);
7706 MLXSW_ITEM32(reg, rauht, trap_id, 0x60, 0, 9);
7712 MLXSW_ITEM32(reg, rauht, counter_set_type, 0x68, 24, 8);
7718 MLXSW_ITEM32(reg, rauht, counter_index, 0x68, 0, 24);
7724 MLXSW_ITEM_BUF(reg, rauht, mac, 0x6E, 6);
7776 MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
7783 MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
7789 MLXSW_ITEM32(reg, raleu, adjacency_index, 0x10, 0, 24);
7795 MLXSW_ITEM32(reg, raleu, ecmp_size, 0x14, 0, 13);
7801 MLXSW_ITEM32(reg, raleu, new_adjacency_index, 0x20, 0, 24);
7807 MLXSW_ITEM32(reg, raleu, new_ecmp_size, 0x24, 0, 13);
7854 MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
7864 MLXSW_ITEM32(reg, rauhtd, op, 0x04, 24, 2);
7874 MLXSW_ITEM32(reg, rauhtd, num_rec, 0x04, 0, 8);
7881 MLXSW_ITEM32(reg, rauhtd, entry_a, 0x08, 16, 1);
7894 MLXSW_ITEM32(reg, rauhtd, type, 0x08, 0, 4);
7901 MLXSW_ITEM32(reg, rauhtd, entry_rif, 0x0C, 0, 16);
7922 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_rec_num_entries,
7932 MLXSW_ITEM32_INDEXED(reg, rauhtd, rec_type, MLXSW_REG_RAUHTD_BASE_LEN, 24, 2,
7942 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
7949 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7956 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7966 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv6_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
7973 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv6_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7980 MLXSW_ITEM_BUF_INDEXED(reg, rauhtd, ipv6_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN,
8018 MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);
8025 MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);
8032 MLXSW_ITEM32(reg, rtdp, egress_router_interface, 0x40, 0, 16);
8040 MLXSW_ITEM32(reg, rtdp, ipip_irif, 0x04, 16, 16);
8060 MLXSW_ITEM32(reg, rtdp, ipip_sip_check, 0x04, 0, 3);
8074 MLXSW_ITEM32(reg, rtdp, ipip_type_check, 0x08, 24, 3);
8085 MLXSW_ITEM32(reg, rtdp, ipip_gre_key_check, 0x08, 23, 1);
8092 MLXSW_ITEM32(reg, rtdp, ipip_ipv4_usip, 0x0C, 0, 32);
8101 MLXSW_ITEM32(reg, rtdp, ipip_ipv6_usip_ptr, 0x10, 0, 24);
8108 MLXSW_ITEM32(reg, rtdp, ipip_expected_gre_key, 0x14, 0, 32);
8153 MLXSW_ITEM32(reg, ratrad, op, 0x00, 30, 2);
8162 MLXSW_ITEM32(reg, ratrad, ecmp_size, 0x00, 0, 13);
8168 MLXSW_ITEM32(reg, ratrad, adjacency_index, 0x04, 0, 24);
8175 MLXSW_ITEM_BIT_ARRAY(reg, ratrad, activity_vector, 0x10, 0x200, 1);
8203 MLXSW_ITEM32(reg, rigr2, rigr_index, 0x04, 0, 24);
8209 MLXSW_ITEM32(reg, rigr2, vnext, 0x08, 31, 1);
8216 MLXSW_ITEM32(reg, rigr2, next_rigr_index, 0x08, 0, 24);
8222 MLXSW_ITEM32(reg, rigr2, vrmid, 0x20, 31, 1);
8231 MLXSW_ITEM32(reg, rigr2, rmid_index, 0x20, 0, 16);
8241 MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_v, 0x24, 31, 1, 4, 0, false);
8249 MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_erif, 0x24, 0, 16, 4, 0, false);
8281 MLXSW_ITEM32(reg, recr2, pp, 0x00, 24, 1);
8287 MLXSW_ITEM32(reg, recr2, sh, 0x00, 8, 1);
8293 MLXSW_ITEM32(reg, recr2, seed, 0x08, 0, 32);
8317 MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_enables, 0x10, 0x04, 1);
8352 MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_fields_enable, 0x14, 0x14, 1);
8359 MLXSW_ITEM_BIT_ARRAY(reg, recr2, inner_header_enables, 0x2C, 0x04, 1);
8394 MLXSW_ITEM_BIT_ARRAY(reg, recr2, inner_header_fields_enable, 0x30, 0x08, 1);
8417 MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1);
8427 MLXSW_ITEM32(reg, rmft2, type, 0x00, 28, 2);
8444 MLXSW_ITEM32(reg, rmft2, op, 0x00, 20, 2);
8451 MLXSW_ITEM32(reg, rmft2, a, 0x00, 16, 1);
8457 MLXSW_ITEM32(reg, rmft2, offset, 0x00, 0, 16);
8463 MLXSW_ITEM32(reg, rmft2, virtual_router, 0x04, 0, 16);
8474 MLXSW_ITEM32(reg, rmft2, irif_mask, 0x08, 24, 1);
8480 MLXSW_ITEM32(reg, rmft2, irif, 0x08, 0, 16);
8486 MLXSW_ITEM_BUF(reg, rmft2, dip6, 0x10, 16);
8487 MLXSW_ITEM32(reg, rmft2, dip4, 0x1C, 0, 32);
8494 MLXSW_ITEM_BUF(reg, rmft2, dip6_mask, 0x20, 16);
8495 MLXSW_ITEM32(reg, rmft2, dip4_mask, 0x2C, 0, 32);
8501 MLXSW_ITEM_BUF(reg, rmft2, sip6, 0x30, 16);
8502 MLXSW_ITEM32(reg, rmft2, sip4, 0x3C, 0, 32);
8509 MLXSW_ITEM_BUF(reg, rmft2, sip6_mask, 0x40, 16);
8510 MLXSW_ITEM32(reg, rmft2, sip4_mask, 0x4C, 0, 32);
8523 MLXSW_ITEM_BUF(reg, rmft2, flexible_action_set, 0x80,
8591 MLXSW_ITEM32(reg, rxlte, virtual_router, 0x00, 0, 16);
8601 MLXSW_ITEM32(reg, rxlte, protocol, 0x04, 0, 4);
8606 MLXSW_ITEM32(reg, rxlte, lpm_xlt_en, 0x08, 0, 1);
8633 MLXSW_ITEM32(reg, rxltm, m0_val_v6, 0x10, 16, 8);
8640 MLXSW_ITEM32(reg, rxltm, m0_val_v4, 0x10, 0, 6);
8671 MLXSW_ITEM32(reg, rlcmld, select, 0x00, 16, 2);
8683 MLXSW_ITEM32(reg, rlcmld, filter_fields, 0x00, 0, 8);
8693 MLXSW_ITEM32(reg, rlcmld, protocol, 0x08, 0, 4);
8700 MLXSW_ITEM32(reg, rlcmld, virtual_router, 0x0C, 0, 16);
8707 MLXSW_ITEM32(reg, rlcmld, dip4, 0x1C, 0, 32);
8708 MLXSW_ITEM_BUF(reg, rlcmld, dip6, 0x10, 16);
8716 MLXSW_ITEM32(reg, rlcmld, dip_mask4, 0x2C, 0, 32);
8717 MLXSW_ITEM_BUF(reg, rlcmld, dip_mask6, 0x20, 16);
8775 MLXSW_ITEM32(reg, rlpmce, flush, 0x00, 4, 1);
8783 MLXSW_ITEM32(reg, rlpmce, disable, 0x00, 0, 1);
8817 MLXSW_ITEM32(reg, xltq, xm_device_id, 0x04, 0, 16);
8822 MLXSW_ITEM32(reg, xltq, xlt_cap_ipv4_lpm, 0x10, 0, 1);
8827 MLXSW_ITEM32(reg, xltq, xlt_cap_ipv6_lpm, 0x10, 1, 1);
8834 MLXSW_ITEM32(reg, xltq, cap_xlt_entries, 0x20, 0, 32);
8840 MLXSW_ITEM32(reg, xltq, cap_xlt_mtable, 0x24, 0, 32);
8878 MLXSW_ITEM32(reg, xmdr, bulk_entry, 0x04, 8, 1);
8887 MLXSW_ITEM32(reg, xmdr, num_rec, 0x04, 0, 4);
8899 MLXSW_ITEM_BIT_ARRAY(reg, xmdr, reply_vect, 0x08, 4, 1);
8917 MLXSW_ITEM32(reg, xmdr_c, cmd_id, 0x00, 24, 8);
8921 MLXSW_ITEM32(reg, xmdr_c, seq_number, 0x00, 12, 12);
8934 MLXSW_ITEM32(reg, xmdr_c, ltr_op, 0x04, 24, 8);
8940 MLXSW_ITEM32(reg, xmdr_c, ltr_trap_action, 0x04, 20, 4);
8952 MLXSW_ITEM32(reg, xmdr_c, ltr_trap_id_num, 0x04, 16, 4);
8958 MLXSW_ITEM32(reg, xmdr_c, ltr_virtual_router, 0x04, 0, 16);
8963 MLXSW_ITEM32(reg, xmdr_c, ltr_prefix_len, 0x08, 24, 8);
8970 MLXSW_ITEM32(reg, xmdr_c, ltr_bmp_len, 0x08, 16, 8);
8976 MLXSW_ITEM32(reg, xmdr_c, ltr_entry_type, 0x08, 4, 4);
8987 MLXSW_ITEM32(reg, xmdr_c, ltr_action_type, 0x08, 0, 4);
8993 MLXSW_ITEM32(reg, xmdr_c, ltr_erif, 0x10, 0, 16);
8999 MLXSW_ITEM32(reg, xmdr_c, ltr_adjacency_index, 0x10, 0, 24);
9006 MLXSW_ITEM32(reg, xmdr_c, ltr_pointer_to_tunnel, 0x10, 0, 24);
9014 MLXSW_ITEM32(reg, xmdr_c, ltr_ecmp_size, 0x14, 0, 32);
9022 MLXSW_ITEM32(reg, xmdr_c, ltr_dip4, 0x1C, 0, 32);
9023 MLXSW_ITEM_BUF(reg, xmdr_c, ltr_dip6, 0x1C, 16);
9138 MLXSW_ITEM32(reg, xrmt, index, 0x04, 0, 20);
9143 MLXSW_ITEM32(reg, xrmt, l0_val, 0x10, 24, 8);
9251 MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 7);
9259 MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
9267 MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
9300 MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
9307 MLXSW_ITEM32(reg, mfsc, pwm_duty_cycle, 0x04, 0, 8);
9331 MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
9337 MLXSW_ITEM32(reg, mfsm, rpm, 0x04, 0, 16);
9360 MLXSW_ITEM32(reg, mfsl, tacho, 0x00, 24, 4);
9366 MLXSW_ITEM32(reg, mfsl, tach_min, 0x04, 0, 16);
9372 MLXSW_ITEM32(reg, mfsl, tach_max, 0x08, 0, 16);
9409 MLXSW_ITEM32(reg, fore, fan_under_limit, 0x00, 16, 10);
9437 MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
9458 MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 12);
9472 MLXSW_ITEM32(reg, mtmp, max_operational_temperature, 0x04, 16, 16);
9479 MLXSW_ITEM32(reg, mtmp, temperature, 0x04, 0, 16);
9485 MLXSW_ITEM32(reg, mtmp, mte, 0x08, 31, 1);
9491 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
9498 MLXSW_ITEM32(reg, mtmp, max_temperature, 0x08, 0, 16);
9514 MLXSW_ITEM32(reg, mtmp, tee, 0x0C, 30, 2);
9522 MLXSW_ITEM32(reg, mtmp, temperature_threshold_hi, 0x0C, 0, 16);
9529 MLXSW_ITEM32(reg, mtmp, temperature_threshold_lo, 0x10, 0, 16);
9537 MLXSW_ITEM_BUF(reg, mtmp, sensor_name, 0x18, MLXSW_REG_MTMP_SENSOR_NAME_SIZE);
9593 MLXSW_ITEM_BIT_ARRAY(reg, mtwe, sensor_warning, 0x0, 0x10, 1);
9614 MLXSW_ITEM32(reg, mtbr, base_sensor_index, 0x00, 0, 12);
9623 MLXSW_ITEM32(reg, mtbr, num_rec, 0x04, 0, 8);
9630 MLXSW_ITEM32_INDEXED(reg, mtbr, rec_max_temp, MLXSW_REG_MTBR_BASE_LEN, 16,
9638 MLXSW_ITEM32_INDEXED(reg, mtbr, rec_temp, MLXSW_REG_MTBR_BASE_LEN, 0, 16,
9685 MLXSW_ITEM32(reg, mcia, l, 0x00, 31, 1);
9691 MLXSW_ITEM32(reg, mcia, module, 0x00, 16, 8);
9711 MLXSW_ITEM32(reg, mcia, status, 0x00, 0, 8);
9717 MLXSW_ITEM32(reg, mcia, i2c_device_address, 0x04, 24, 8);
9723 MLXSW_ITEM32(reg, mcia, page_number, 0x04, 16, 8);
9729 MLXSW_ITEM32(reg, mcia, device_address, 0x04, 0, 16);
9735 MLXSW_ITEM32(reg, mcia, bank_number, 0x08, 16, 8);
9741 MLXSW_ITEM32(reg, mcia, size, 0x08, 0, 16);
9781 MLXSW_ITEM_BUF(reg, mcia, eeprom, 0x10, MLXSW_REG_MCIA_EEPROM_SIZE);
9818 MLXSW_ITEM32(reg, mpat, pa_id, 0x00, 28, 4);
9825 MLXSW_ITEM32(reg, mpat, session_id, 0x00, 24, 4);
9831 MLXSW_ITEM32(reg, mpat, system_port, 0x00, 0, 16);
9837 MLXSW_ITEM32(reg, mpat, e, 0x04, 31, 1);
9848 MLXSW_ITEM32(reg, mpat, qos, 0x04, 26, 1);
9858 MLXSW_ITEM32(reg, mpat, be, 0x04, 25, 1);
9882 MLXSW_ITEM32(reg, mpat, span_type, 0x04, 0, 4);
9888 MLXSW_ITEM32(reg, mpat, pide, 0x0C, 15, 1);
9894 MLXSW_ITEM32(reg, mpat, pid, 0x0C, 0, 14);
9904 MLXSW_ITEM32(reg, mpat, eth_rspan_vid, 0x18, 0, 12);
9918 MLXSW_ITEM32(reg, mpat, eth_rspan_version, 0x10, 18, 4);
9924 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_mac, 0x12, 6);
9930 MLXSW_ITEM32(reg, mpat, eth_rspan_tp, 0x18, 16, 1);
9945 MLXSW_ITEM32(reg, mpat, eth_rspan_protocol, 0x18, 24, 4);
9951 MLXSW_ITEM32(reg, mpat, eth_rspan_ttl, 0x1C, 4, 8);
9957 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_smac, 0x22, 6);
9963 MLXSW_ITEM32(reg, mpat, eth_rspan_dip4, 0x4C, 0, 32);
9964 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_dip6, 0x40, 16);
9970 MLXSW_ITEM32(reg, mpat, eth_rspan_sip4, 0x5C, 0, 32);
9971 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_sip6, 0x50, 16);
10042 MLXSW_ITEM32(reg, mpar, local_port, 0x00, 16, 8);
10053 MLXSW_ITEM32(reg, mpar, i_e, 0x00, 0, 4);
10060 MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1);
10066 MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4);
10077 MLXSW_ITEM32(reg, mpar, probability_rate, 0x08, 0, 32);
10105 MLXSW_ITEM32(reg, mgir, hw_info_device_hw_revision, 0x0, 16, 16);
10113 MLXSW_ITEM_BUF(reg, mgir, fw_info_psid, 0x30, MLXSW_REG_MGIR_FW_INFO_PSID_SIZE);
10118 MLXSW_ITEM32(reg, mgir, fw_info_extended_major, 0x44, 0, 32);
10123 MLXSW_ITEM32(reg, mgir, fw_info_extended_minor, 0x48, 0, 32);
10128 MLXSW_ITEM32(reg, mgir, fw_info_extended_sub_minor, 0x4C, 0, 32);
10162 MLXSW_ITEM32(reg, mrsr, command, 0x00, 0, 4);
10183 MLXSW_ITEM32(reg, mlcr, local_port, 0x00, 16, 8);
10193 MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
10200 MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
10226 MLXSW_ITEM32(reg, mtpps, enable, 0x20, 31, 1);
10237 MLXSW_ITEM32(reg, mtpps, pin_mode, 0x20, 8, 4);
10245 MLXSW_ITEM32(reg, mtpps, pin, 0x20, 0, 8);
10255 MLXSW_ITEM64(reg, mtpps, time_stamp, 0x28, 0, 64);
10286 MLXSW_ITEM32(reg, mtutc, operation, 0x00, 0, 4);
10294 MLXSW_ITEM32(reg, mtutc, freq_adjustment, 0x04, 0, 32);
10300 MLXSW_ITEM32(reg, mtutc, utc_sec, 0x10, 0, 32);
10327 MLXSW_ITEM32(reg, mcqi, component_index, 0x00, 0, 16);
10337 MLXSW_ITEM32(reg, mcqi, info_type, 0x08, 0, 5);
10344 MLXSW_ITEM32(reg, mcqi, offset, 0x10, 0, 32);
10351 MLXSW_ITEM32(reg, mcqi, data_size, 0x14, 0, 16);
10357 MLXSW_ITEM32(reg, mcqi, cap_max_component_size, 0x20, 0, 32);
10364 MLXSW_ITEM32(reg, mcqi, cap_log_mcda_word_size, 0x24, 28, 4);
10370 MLXSW_ITEM32(reg, mcqi, cap_mcda_max_write_size, 0x24, 0, 16);
10418 MLXSW_ITEM32(reg, mcc, instruction, 0x00, 0, 8);
10425 MLXSW_ITEM32(reg, mcc, component_index, 0x04, 0, 16);
10431 MLXSW_ITEM32(reg, mcc, update_handle, 0x08, 0, 24);
10438 MLXSW_ITEM32(reg, mcc, error_code, 0x0C, 8, 8);
10444 MLXSW_ITEM32(reg, mcc, control_state, 0x0C, 0, 4);
10452 MLXSW_ITEM32(reg, mcc, component_size, 0x10, 0, 32);
10493 MLXSW_ITEM32(reg, mcda, update_handle, 0x00, 0, 24);
10500 MLXSW_ITEM32(reg, mcda, offset, 0x04, 0, 32);
10506 MLXSW_ITEM32(reg, mcda, size, 0x08, 0, 16);
10512 MLXSW_ITEM32_INDEXED(reg, mcda, data, 0x10, 0, 32, 4, 0, false);
10542 MLXSW_ITEM32(reg, mpsc, local_port, 0x00, 16, 8);
10548 MLXSW_ITEM32(reg, mpsc, e, 0x04, 30, 1);
10557 MLXSW_ITEM32(reg, mpsc, rate, 0x08, 0, 32);
10580 MLXSW_ITEM32(reg, mgpc, counter_set_type, 0x00, 24, 8);
10586 MLXSW_ITEM32(reg, mgpc, counter_index, 0x00, 0, 24);
10599 MLXSW_ITEM32(reg, mgpc, opcode, 0x04, 28, 4);
10605 MLXSW_ITEM64(reg, mgpc, byte_counter, 0x08, 0, 64);
10611 MLXSW_ITEM64(reg, mgpc, packet_counter, 0x10, 0, 64);
10639 MLXSW_ITEM32(reg, mprs, parsing_depth, 0x00, 0, 16);
10647 MLXSW_ITEM32(reg, mprs, parsing_en, 0x04, 0, 16);
10655 MLXSW_ITEM32(reg, mprs, vxlan_udp_dport, 0x10, 0, 16);
10681 MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1);
10690 MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);
10698 MLXSW_ITEM32(reg, mogcr, mirroring_pid_base, 0x0C, 0, 14);
10725 MLXSW_ITEM32(reg, mpagr, trigger, 0x00, 0, 4);
10731 MLXSW_ITEM32(reg, mpagr, pa_id, 0x04, 0, 4);
10741 MLXSW_ITEM32(reg, mpagr, probability_rate, 0x08, 0, 32);
10767 MLXSW_ITEM32(reg, momte, local_port, 0x00, 16, 8);
10784 MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8);
10792 MLXSW_ITEM_BIT_ARRAY(reg, momte, tclass_en, 0x08, 0x08, 1);
10821 MLXSW_ITEM32(reg, mtpppc, ing_timestamp_message_type, 0x08, 0, 16);
10830 MLXSW_ITEM32(reg, mtpppc, egr_timestamp_message_type, 0x0C, 0, 16);
10862 MLXSW_ITEM32(reg, mtpptr, local_port, 0x00, 16, 8);
10873 MLXSW_ITEM32(reg, mtpptr, dir, 0x00, 0, 1);
10879 MLXSW_ITEM32(reg, mtpptr, clr, 0x04, 31, 1);
10886 MLXSW_ITEM32(reg, mtpptr, num_rec, 0x08, 0, 4);
10893 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_message_type,
10901 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_domain_number,
10909 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_sequence_id,
10919 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_timestamp_high,
10927 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_timestamp_low,
10967 MLXSW_ITEM32(reg, mtptpt, trap_id, 0x00, 0, 4);
10975 MLXSW_ITEM32(reg, mtptpt, message_type, 0x04, 0, 16);
10999 MLXSW_ITEM32(reg, mfgd, fatal_event_mode, 0x00, 9, 2);
11004 MLXSW_ITEM32(reg, mfgd, trigger_test, 0x00, 11, 1);
11024 MLXSW_ITEM32(reg, mgpir, device_type, 0x00, 24, 4);
11030 MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
11036 MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
11042 MLXSW_ITEM32(reg, mgpir, num_of_modules, 0x04, 0, 8);
11077 MLXSW_ITEM32(reg, mfde, irisc_id, 0x00, 24, 8);
11088 MLXSW_ITEM32(reg, mfde, event_id, 0x00, 0, 16);
11098 MLXSW_ITEM32(reg, mfde, method, 0x04, 29, 1);
11104 MLXSW_ITEM32(reg, mfde, long_process, 0x04, 28, 1);
11115 MLXSW_ITEM32(reg, mfde, command_type, 0x04, 24, 2);
11121 MLXSW_ITEM32(reg, mfde, reg_attr_id, 0x04, 0, 16);
11128 MLXSW_ITEM32(reg, mfde, log_address, 0x10, 0, 32);
11135 MLXSW_ITEM32(reg, mfde, log_id, 0x14, 0, 4);
11142 MLXSW_ITEM64(reg, mfde, log_ip, 0x18, 0, 64);
11148 MLXSW_ITEM32(reg, mfde, pipes_mask, 0x10, 0, 16);
11172 MLXSW_ITEM32(reg, tngcr, type, 0x00, 0, 4);
11178 MLXSW_ITEM32(reg, tngcr, nve_valid, 0x04, 31, 1);
11184 MLXSW_ITEM32(reg, tngcr, nve_ttl_uc, 0x04, 0, 8);
11190 MLXSW_ITEM32(reg, tngcr, nve_ttl_mc, 0x08, 0, 8);
11206 MLXSW_ITEM32(reg, tngcr, nve_flc, 0x0C, 25, 1);
11223 MLXSW_ITEM32(reg, tngcr, nve_flh, 0x0C, 24, 1);
11229 MLXSW_ITEM32(reg, tngcr, nve_fl_prefix, 0x0C, 8, 12);
11236 MLXSW_ITEM32(reg, tngcr, nve_fl_suffix, 0x0C, 0, 8);
11253 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_type, 0x10, 24, 1);
11260 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_prefix, 0x10, 8, 8);
11270 MLXSW_ITEM32(reg, tngcr, nve_group_size_mc, 0x18, 0, 8);
11280 MLXSW_ITEM32(reg, tngcr, nve_group_size_flood, 0x1C, 0, 8);
11287 MLXSW_ITEM32(reg, tngcr, learn_enable, 0x20, 31, 1);
11294 MLXSW_ITEM32(reg, tngcr, underlay_virtual_router, 0x20, 0, 16);
11301 MLXSW_ITEM32(reg, tngcr, underlay_rif, 0x24, 0, 16);
11307 MLXSW_ITEM32(reg, tngcr, usipv4, 0x28, 0, 32);
11314 MLXSW_ITEM_BUF(reg, tngcr, usipv6, 0x30, 16);
11354 MLXSW_ITEM32(reg, tnumt, record_type, 0x00, 28, 4);
11360 MLXSW_ITEM32(reg, tnumt, tunnel_port, 0x00, 24, 4);
11367 MLXSW_ITEM32(reg, tnumt, underlay_mc_ptr, 0x00, 0, 24);
11373 MLXSW_ITEM32(reg, tnumt, vnext, 0x04, 31, 1);
11379 MLXSW_ITEM32(reg, tnumt, next_underlay_mc_ptr, 0x04, 0, 24);
11386 MLXSW_ITEM32(reg, tnumt, record_size, 0x08, 0, 3);
11392 MLXSW_ITEM32_INDEXED(reg, tnumt, udip, 0x0C, 0, 32, 0x04, 0x00, false);
11399 MLXSW_ITEM32_INDEXED(reg, tnumt, udip_ptr, 0x0C, 0, 24, 0x04, 0x00, false);
11434 MLXSW_ITEM32(reg, tnqcr, enc_set_dscp, 0x04, 28, 1);
11456 MLXSW_ITEM32(reg, tnqdr, local_port, 0x00, 16, 8);
11462 MLXSW_ITEM32(reg, tnqdr, dscp, 0x04, 0, 6);
11485 MLXSW_ITEM32(reg, tneem, overlay_ecn, 0x04, 24, 2);
11491 MLXSW_ITEM32(reg, tneem, underlay_ecn, 0x04, 16, 2);
11515 MLXSW_ITEM32(reg, tndem, underlay_ecn, 0x04, 24, 2);
11521 MLXSW_ITEM32(reg, tndem, overlay_ecn, 0x04, 16, 2);
11528 MLXSW_ITEM32(reg, tndem, eip_ecn, 0x04, 8, 2);
11536 MLXSW_ITEM32(reg, tndem, trap_en, 0x08, 28, 4);
11543 MLXSW_ITEM32(reg, tndem, trap_id, 0x08, 0, 9);
11571 MLXSW_ITEM32(reg, tnpc, tunnel_port, 0x00, 0, 4);
11577 MLXSW_ITEM32(reg, tnpc, learn_enable_v6, 0x04, 1, 1);
11583 MLXSW_ITEM32(reg, tnpc, learn_enable_v4, 0x04, 0, 1);
11609 MLXSW_ITEM32(reg, tigcr, ttlc, 0x04, 8, 1);
11616 MLXSW_ITEM32(reg, tigcr, ttl_uc, 0x04, 0, 8);
11639 MLXSW_ITEM32(reg, tieem, overlay_ecn, 0x04, 24, 2);
11645 MLXSW_ITEM32(reg, tieem, underlay_ecn, 0x04, 16, 2);
11669 MLXSW_ITEM32(reg, tidem, underlay_ecn, 0x04, 24, 2);
11675 MLXSW_ITEM32(reg, tidem, overlay_ecn, 0x04, 16, 2);
11682 MLXSW_ITEM32(reg, tidem, eip_ecn, 0x04, 8, 2);
11690 MLXSW_ITEM32(reg, tidem, trap_en, 0x08, 28, 4);
11697 MLXSW_ITEM32(reg, tidem, trap_id, 0x08, 0, 9);
11730 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
11736 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
11742 MLXSW_ITEM32(reg, sbpr, infi_size, 0x04, 31, 1);
11749 MLXSW_ITEM32(reg, sbpr, size, 0x04, 0, 24);
11760 MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
11792 MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
11802 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
11808 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
11814 MLXSW_ITEM32(reg, sbcm, min_buff, 0x18, 0, 24);
11824 MLXSW_ITEM32(reg, sbcm, infi_max, 0x1C, 31, 1);
11838 MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
11844 MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
11878 MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
11884 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
11890 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
11896 MLXSW_ITEM32(reg, sbpm, buff_occupancy, 0x10, 0, 24);
11904 MLXSW_ITEM32(reg, sbpm, clr, 0x14, 31, 1);
11911 MLXSW_ITEM32(reg, sbpm, max_buff_occupancy, 0x14, 0, 24);
11917 MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
11930 MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
11967 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
11973 MLXSW_ITEM32(reg, sbmm, min_buff, 0x18, 0, 24);
11986 MLXSW_ITEM32(reg, sbmm, max_buff, 0x1C, 0, 24);
11992 MLXSW_ITEM32(reg, sbmm, pool, 0x24, 0, 4);
12028 MLXSW_ITEM32(reg, sbsr, clr, 0x00, 31, 1);
12037 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, ingress_port_mask, 0x10, 0x20, 1);
12047 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, pg_buff_mask, 0x30, 0x4, 1);
12056 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, egress_port_mask, 0x34, 0x20, 1);
12066 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, tclass_mask, 0x54, 0x8, 1);
12078 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
12086 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_max_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
12117 MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8);
12125 MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24);
12310 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
12316 MLXSW_ITEM32(reg, pude, local_port, 0x00, 16, 8);
12327 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
12337 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);