68 #define SMC_inw(a, r)							\  macro
124 #define SMC_inw(a, r)		inw((a) + (r) - 0xa0000000)  macro
144 #define SMC_inw(a, r)           readw((a) + (r))  macro
178 #define SMC_inw(a, r)		_swapw(readw((a) + (r)))  macro
210 #define SMC_inw(a, r)		ioread16((a) + (r))  macro
382 		*((u16 *)buf) = SMC_inw(ioaddr, reg);  in smc_pxa_dma_insw()
431 #define SMC_inw(ioaddr, reg)		SMC_inw_b(ioaddr, reg)  macro
873 				: (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
887 				: (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
891 				: (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
895 				: (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
899 				: (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
909 			__mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \
917 				: (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
927 #define SMC_CURRENT_BANK(lp)	SMC_inw(ioaddr, BANK_SELECT)
937 #define SMC_GET_BASE(lp)		SMC_inw(ioaddr, BASE_REG(lp))
941 #define SMC_GET_CONFIG(lp)	SMC_inw(ioaddr, CONFIG_REG(lp))
945 #define SMC_GET_COUNTER(lp)	SMC_inw(ioaddr, COUNTER_REG(lp))
947 #define SMC_GET_CTL(lp)		SMC_inw(ioaddr, CTL_REG(lp))
951 #define SMC_GET_MII(lp)		SMC_inw(ioaddr, MII_REG(lp))
953 #define SMC_GET_GP(lp)		SMC_inw(ioaddr, GP_REG(lp))
965 #define SMC_GET_MIR(lp)		SMC_inw(ioaddr, MIR_REG(lp))
969 #define SMC_GET_MMU_CMD(lp)	SMC_inw(ioaddr, MMU_CMD_REG(lp))
973 #define SMC_GET_FIFO(lp)	SMC_inw(ioaddr, FIFO_REG(lp))
975 #define SMC_GET_PTR(lp)		SMC_inw(ioaddr, PTR_REG(lp))
985 #define SMC_GET_EPH_STATUS(lp)	SMC_inw(ioaddr, EPH_STATUS_REG(lp))
987 #define SMC_GET_RCR(lp)		SMC_inw(ioaddr, RCR_REG(lp))
991 #define SMC_GET_REV(lp)		SMC_inw(ioaddr, REV_REG(lp))
993 #define SMC_GET_RPC(lp)		SMC_inw(ioaddr, RPC_REG(lp))
1003 #define SMC_GET_TCR(lp)		SMC_inw(ioaddr, TCR_REG(lp))
1011 		__v = SMC_inw(ioaddr, ADDR0_REG(lp));			\
1013 		__v = SMC_inw(ioaddr, ADDR1_REG(lp));			\
1015 		__v = SMC_inw(ioaddr, ADDR2_REG(lp));			\
1054 			(status) = SMC_inw(ioaddr, DATA_REG(lp));	\
1055 			(length) = SMC_inw(ioaddr, DATA_REG(lp));	\