Lines Matching refs:AR5K_PHY_IQ
1781 else if (ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & AR5K_PHY_IQ_RUN) { in ath5k_hw_rf511x_iq_calibrate()
1830 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF, i_coff); in ath5k_hw_rf511x_iq_calibrate()
1831 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF, q_coff); in ath5k_hw_rf511x_iq_calibrate()
1832 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE); in ath5k_hw_rf511x_iq_calibrate()
1836 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_rf511x_iq_calibrate()
1838 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_RUN); in ath5k_hw_rf511x_iq_calibrate()
2059 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_set_spur_mitigation_filter()
2099 } else if (ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & in ath5k_hw_set_spur_mitigation_filter()
2104 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_set_spur_mitigation_filter()
3943 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_phy_init()
3945 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, in ath5k_hw_phy_init()