Lines Matching refs:rt2x00dev
45 static void rt2500pci_bbp_write(struct rt2x00_dev *rt2x00dev, in rt2500pci_bbp_write() argument
50 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_write()
56 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_write()
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_write()
66 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_write()
69 static u8 rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev, in rt2500pci_bbp_read() argument
75 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_read()
85 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_read()
91 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_read()
93 WAIT_FOR_BBP(rt2x00dev, ®); in rt2500pci_bbp_read()
98 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_read()
103 static void rt2500pci_rf_write(struct rt2x00_dev *rt2x00dev, in rt2500pci_rf_write() argument
108 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_rf_write()
114 if (WAIT_FOR_RF(rt2x00dev, ®)) { in rt2500pci_rf_write()
121 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2500pci_rf_write()
122 rt2x00_rf_write(rt2x00dev, word, value); in rt2500pci_rf_write()
125 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_rf_write()
130 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2500pci_eepromregister_read() local
133 reg = rt2x00mmio_register_read(rt2x00dev, CSR21); in rt2500pci_eepromregister_read()
145 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2500pci_eepromregister_write() local
155 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2500pci_eepromregister_write()
193 static int rt2500pci_rfkill_poll(struct rt2x00_dev *rt2x00dev) in rt2500pci_rfkill_poll() argument
197 reg = rt2x00mmio_register_read(rt2x00dev, GPIOCSR); in rt2500pci_rfkill_poll()
210 reg = rt2x00mmio_register_read(led->rt2x00dev, LEDCSR); in rt2500pci_brightness_set()
217 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_brightness_set()
228 reg = rt2x00mmio_register_read(led->rt2x00dev, LEDCSR); in rt2500pci_blink_set()
231 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_blink_set()
236 static void rt2500pci_init_led(struct rt2x00_dev *rt2x00dev, in rt2500pci_init_led() argument
240 led->rt2x00dev = rt2x00dev; in rt2500pci_init_led()
251 static void rt2500pci_config_filter(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_filter() argument
262 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_config_filter()
270 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags)); in rt2500pci_config_filter()
272 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags) && in rt2500pci_config_filter()
273 !rt2x00dev->intf_ap_count); in rt2500pci_config_filter()
278 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_config_filter()
281 static void rt2500pci_config_intf(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_intf() argument
286 struct data_queue *queue = rt2x00dev->bcn; in rt2500pci_config_intf()
295 reg = rt2x00mmio_register_read(rt2x00dev, BCNCSR1); in rt2500pci_config_intf()
298 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2500pci_config_intf()
303 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_config_intf()
305 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_config_intf()
309 rt2x00mmio_register_multiwrite(rt2x00dev, CSR3, in rt2500pci_config_intf()
313 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2500pci_config_intf()
317 static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_erp() argument
330 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR1); in rt2500pci_config_erp()
335 rt2x00mmio_register_write(rt2x00dev, TXCSR1, reg); in rt2500pci_config_erp()
337 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR2); in rt2500pci_config_erp()
342 rt2x00mmio_register_write(rt2x00dev, ARCSR2, reg); in rt2500pci_config_erp()
344 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR3); in rt2500pci_config_erp()
349 rt2x00mmio_register_write(rt2x00dev, ARCSR3, reg); in rt2500pci_config_erp()
351 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR4); in rt2500pci_config_erp()
356 rt2x00mmio_register_write(rt2x00dev, ARCSR4, reg); in rt2500pci_config_erp()
358 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR5); in rt2500pci_config_erp()
363 rt2x00mmio_register_write(rt2x00dev, ARCSR5, reg); in rt2500pci_config_erp()
367 rt2x00mmio_register_write(rt2x00dev, ARCSR1, erp->basic_rates); in rt2500pci_config_erp()
370 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_config_erp()
372 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_erp()
374 reg = rt2x00mmio_register_read(rt2x00dev, CSR18); in rt2500pci_config_erp()
377 rt2x00mmio_register_write(rt2x00dev, CSR18, reg); in rt2500pci_config_erp()
379 reg = rt2x00mmio_register_read(rt2x00dev, CSR19); in rt2500pci_config_erp()
382 rt2x00mmio_register_write(rt2x00dev, CSR19, reg); in rt2500pci_config_erp()
386 reg = rt2x00mmio_register_read(rt2x00dev, CSR12); in rt2500pci_config_erp()
391 rt2x00mmio_register_write(rt2x00dev, CSR12, reg); in rt2500pci_config_erp()
396 static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_ant() argument
410 reg = rt2x00mmio_register_read(rt2x00dev, BBPCSR1); in rt2500pci_config_ant()
411 r14 = rt2500pci_bbp_read(rt2x00dev, 14); in rt2500pci_config_ant()
412 r2 = rt2500pci_bbp_read(rt2x00dev, 2); in rt2500pci_config_ant()
447 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_config_ant()
455 if (rt2x00_rf(rt2x00dev, RF2525E)) in rt2500pci_config_ant()
462 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, reg); in rt2500pci_config_ant()
463 rt2500pci_bbp_write(rt2x00dev, 14, r14); in rt2500pci_config_ant()
464 rt2500pci_bbp_write(rt2x00dev, 2, r2); in rt2500pci_config_ant()
467 static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_channel() argument
481 if (!rt2x00_rf(rt2x00dev, RF2523)) in rt2500pci_config_channel()
488 if (rt2x00_rf(rt2x00dev, RF2525)) { in rt2500pci_config_channel()
496 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
497 rt2500pci_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); in rt2500pci_config_channel()
498 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
500 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4); in rt2500pci_config_channel()
503 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
504 rt2500pci_rf_write(rt2x00dev, 2, rf->rf2); in rt2500pci_config_channel()
505 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
507 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4); in rt2500pci_config_channel()
514 rt2500pci_bbp_write(rt2x00dev, 70, r70); in rt2500pci_config_channel()
522 if (!rt2x00_rf(rt2x00dev, RF2523)) { in rt2500pci_config_channel()
524 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
528 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
533 rf->rf1 = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_config_channel()
536 static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_txpower() argument
541 rf3 = rt2x00_rf_read(rt2x00dev, 3); in rt2500pci_config_txpower()
543 rt2500pci_rf_write(rt2x00dev, 3, rf3); in rt2500pci_config_txpower()
546 static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_retry_limit() argument
551 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_config_retry_limit()
556 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_retry_limit()
559 static void rt2500pci_config_ps(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_ps() argument
568 reg = rt2x00mmio_register_read(rt2x00dev, CSR20); in rt2500pci_config_ps()
570 (rt2x00dev->beacon_int - 20) * 16); in rt2500pci_config_ps()
576 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
579 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
581 reg = rt2x00mmio_register_read(rt2x00dev, CSR20); in rt2500pci_config_ps()
583 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
586 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); in rt2500pci_config_ps()
589 static void rt2500pci_config(struct rt2x00_dev *rt2x00dev, in rt2500pci_config() argument
594 rt2500pci_config_channel(rt2x00dev, &libconf->rf, in rt2500pci_config()
598 rt2500pci_config_txpower(rt2x00dev, in rt2500pci_config()
601 rt2500pci_config_retry_limit(rt2x00dev, libconf); in rt2500pci_config()
603 rt2500pci_config_ps(rt2x00dev, libconf); in rt2500pci_config()
609 static void rt2500pci_link_stats(struct rt2x00_dev *rt2x00dev, in rt2500pci_link_stats() argument
617 reg = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_link_stats()
623 reg = rt2x00mmio_register_read(rt2x00dev, CNT3); in rt2500pci_link_stats()
627 static inline void rt2500pci_set_vgc(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_vgc() argument
631 rt2500pci_bbp_write(rt2x00dev, 17, vgc_level); in rt2500pci_set_vgc()
637 static void rt2500pci_reset_tuner(struct rt2x00_dev *rt2x00dev, in rt2500pci_reset_tuner() argument
640 rt2500pci_set_vgc(rt2x00dev, qual, 0x48); in rt2500pci_reset_tuner()
643 static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev, in rt2500pci_link_tuner() argument
651 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D && in rt2500pci_link_tuner()
652 rt2x00dev->intf_associated && count > 20) in rt2500pci_link_tuner()
661 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D || in rt2500pci_link_tuner()
662 !rt2x00dev->intf_associated) in rt2500pci_link_tuner()
672 rt2500pci_set_vgc(rt2x00dev, qual, qual->vgc_level); in rt2500pci_link_tuner()
680 rt2500pci_set_vgc(rt2x00dev, qual, 0x50); in rt2500pci_link_tuner()
688 rt2500pci_set_vgc(rt2x00dev, qual, 0x41); in rt2500pci_link_tuner()
697 rt2500pci_set_vgc(rt2x00dev, qual, qual->vgc_level); in rt2500pci_link_tuner()
708 rt2500pci_set_vgc(rt2x00dev, qual, ++qual->vgc_level_reg); in rt2500pci_link_tuner()
710 rt2500pci_set_vgc(rt2x00dev, qual, --qual->vgc_level_reg); in rt2500pci_link_tuner()
718 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_start_queue() local
723 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_start_queue()
725 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_start_queue()
728 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_start_queue()
732 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_start_queue()
741 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_kick_queue() local
746 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
748 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
751 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
753 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
756 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
758 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
767 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_stop_queue() local
774 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_stop_queue()
776 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_stop_queue()
779 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_stop_queue()
781 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_stop_queue()
784 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_stop_queue()
788 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_stop_queue()
793 tasklet_kill(&rt2x00dev->tbtt_tasklet); in rt2500pci_stop_queue()
842 static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_queues() argument
850 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR2); in rt2500pci_init_queues()
851 rt2x00_set_field32(®, TXCSR2_TXD_SIZE, rt2x00dev->tx[0].desc_size); in rt2500pci_init_queues()
852 rt2x00_set_field32(®, TXCSR2_NUM_TXD, rt2x00dev->tx[1].limit); in rt2500pci_init_queues()
853 rt2x00_set_field32(®, TXCSR2_NUM_ATIM, rt2x00dev->atim->limit); in rt2500pci_init_queues()
854 rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); in rt2500pci_init_queues()
855 rt2x00mmio_register_write(rt2x00dev, TXCSR2, reg); in rt2500pci_init_queues()
857 entry_priv = rt2x00dev->tx[1].entries[0].priv_data; in rt2500pci_init_queues()
858 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR3); in rt2500pci_init_queues()
861 rt2x00mmio_register_write(rt2x00dev, TXCSR3, reg); in rt2500pci_init_queues()
863 entry_priv = rt2x00dev->tx[0].entries[0].priv_data; in rt2500pci_init_queues()
864 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR5); in rt2500pci_init_queues()
867 rt2x00mmio_register_write(rt2x00dev, TXCSR5, reg); in rt2500pci_init_queues()
869 entry_priv = rt2x00dev->atim->entries[0].priv_data; in rt2500pci_init_queues()
870 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR4); in rt2500pci_init_queues()
873 rt2x00mmio_register_write(rt2x00dev, TXCSR4, reg); in rt2500pci_init_queues()
875 entry_priv = rt2x00dev->bcn->entries[0].priv_data; in rt2500pci_init_queues()
876 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR6); in rt2500pci_init_queues()
879 rt2x00mmio_register_write(rt2x00dev, TXCSR6, reg); in rt2500pci_init_queues()
881 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR1); in rt2500pci_init_queues()
882 rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); in rt2500pci_init_queues()
883 rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); in rt2500pci_init_queues()
884 rt2x00mmio_register_write(rt2x00dev, RXCSR1, reg); in rt2500pci_init_queues()
886 entry_priv = rt2x00dev->rx->entries[0].priv_data; in rt2500pci_init_queues()
887 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR2); in rt2500pci_init_queues()
890 rt2x00mmio_register_write(rt2x00dev, RXCSR2, reg); in rt2500pci_init_queues()
895 static int rt2500pci_init_registers(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_registers() argument
899 rt2x00mmio_register_write(rt2x00dev, PSCSR0, 0x00020002); in rt2500pci_init_registers()
900 rt2x00mmio_register_write(rt2x00dev, PSCSR1, 0x00000002); in rt2500pci_init_registers()
901 rt2x00mmio_register_write(rt2x00dev, PSCSR2, 0x00020002); in rt2500pci_init_registers()
902 rt2x00mmio_register_write(rt2x00dev, PSCSR3, 0x00000002); in rt2500pci_init_registers()
904 reg = rt2x00mmio_register_read(rt2x00dev, TIMECSR); in rt2500pci_init_registers()
908 rt2x00mmio_register_write(rt2x00dev, TIMECSR, reg); in rt2500pci_init_registers()
910 reg = rt2x00mmio_register_read(rt2x00dev, CSR9); in rt2500pci_init_registers()
912 rt2x00dev->rx->data_size / 128); in rt2500pci_init_registers()
913 rt2x00mmio_register_write(rt2x00dev, CSR9, reg); in rt2500pci_init_registers()
918 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_init_registers()
920 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_init_registers()
922 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_init_registers()
931 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_init_registers()
933 rt2x00mmio_register_write(rt2x00dev, CNT3, 0); in rt2500pci_init_registers()
935 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR8); in rt2500pci_init_registers()
944 rt2x00mmio_register_write(rt2x00dev, TXCSR8, reg); in rt2500pci_init_registers()
946 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR0); in rt2500pci_init_registers()
951 rt2x00mmio_register_write(rt2x00dev, ARTCSR0, reg); in rt2500pci_init_registers()
953 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR1); in rt2500pci_init_registers()
958 rt2x00mmio_register_write(rt2x00dev, ARTCSR1, reg); in rt2500pci_init_registers()
960 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR2); in rt2500pci_init_registers()
965 rt2x00mmio_register_write(rt2x00dev, ARTCSR2, reg); in rt2500pci_init_registers()
967 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR3); in rt2500pci_init_registers()
976 rt2x00mmio_register_write(rt2x00dev, RXCSR3, reg); in rt2500pci_init_registers()
978 reg = rt2x00mmio_register_read(rt2x00dev, PCICSR); in rt2500pci_init_registers()
986 rt2x00mmio_register_write(rt2x00dev, PCICSR, reg); in rt2500pci_init_registers()
988 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0x3f3b3100); in rt2500pci_init_registers()
990 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, 0x0000ff00); in rt2500pci_init_registers()
991 rt2x00mmio_register_write(rt2x00dev, TESTCSR, 0x000000f0); in rt2500pci_init_registers()
993 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) in rt2500pci_init_registers()
996 rt2x00mmio_register_write(rt2x00dev, MACCSR0, 0x00213223); in rt2500pci_init_registers()
997 rt2x00mmio_register_write(rt2x00dev, MACCSR1, 0x00235518); in rt2500pci_init_registers()
999 reg = rt2x00mmio_register_read(rt2x00dev, MACCSR2); in rt2500pci_init_registers()
1001 rt2x00mmio_register_write(rt2x00dev, MACCSR2, reg); in rt2500pci_init_registers()
1003 reg = rt2x00mmio_register_read(rt2x00dev, RALINKCSR); in rt2500pci_init_registers()
1010 rt2x00mmio_register_write(rt2x00dev, RALINKCSR, reg); in rt2500pci_init_registers()
1012 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, 0x82188200); in rt2500pci_init_registers()
1014 rt2x00mmio_register_write(rt2x00dev, TXACKCSR0, 0x00000020); in rt2500pci_init_registers()
1016 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers()
1020 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1022 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers()
1025 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1032 reg = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_init_registers()
1033 reg = rt2x00mmio_register_read(rt2x00dev, CNT4); in rt2500pci_init_registers()
1038 static int rt2500pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) in rt2500pci_wait_bbp_ready() argument
1044 value = rt2500pci_bbp_read(rt2x00dev, 0); in rt2500pci_wait_bbp_ready()
1050 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); in rt2500pci_wait_bbp_ready()
1054 static int rt2500pci_init_bbp(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_bbp() argument
1061 if (unlikely(rt2500pci_wait_bbp_ready(rt2x00dev))) in rt2500pci_init_bbp()
1064 rt2500pci_bbp_write(rt2x00dev, 3, 0x02); in rt2500pci_init_bbp()
1065 rt2500pci_bbp_write(rt2x00dev, 4, 0x19); in rt2500pci_init_bbp()
1066 rt2500pci_bbp_write(rt2x00dev, 14, 0x1c); in rt2500pci_init_bbp()
1067 rt2500pci_bbp_write(rt2x00dev, 15, 0x30); in rt2500pci_init_bbp()
1068 rt2500pci_bbp_write(rt2x00dev, 16, 0xac); in rt2500pci_init_bbp()
1069 rt2500pci_bbp_write(rt2x00dev, 18, 0x18); in rt2500pci_init_bbp()
1070 rt2500pci_bbp_write(rt2x00dev, 19, 0xff); in rt2500pci_init_bbp()
1071 rt2500pci_bbp_write(rt2x00dev, 20, 0x1e); in rt2500pci_init_bbp()
1072 rt2500pci_bbp_write(rt2x00dev, 21, 0x08); in rt2500pci_init_bbp()
1073 rt2500pci_bbp_write(rt2x00dev, 22, 0x08); in rt2500pci_init_bbp()
1074 rt2500pci_bbp_write(rt2x00dev, 23, 0x08); in rt2500pci_init_bbp()
1075 rt2500pci_bbp_write(rt2x00dev, 24, 0x70); in rt2500pci_init_bbp()
1076 rt2500pci_bbp_write(rt2x00dev, 25, 0x40); in rt2500pci_init_bbp()
1077 rt2500pci_bbp_write(rt2x00dev, 26, 0x08); in rt2500pci_init_bbp()
1078 rt2500pci_bbp_write(rt2x00dev, 27, 0x23); in rt2500pci_init_bbp()
1079 rt2500pci_bbp_write(rt2x00dev, 30, 0x10); in rt2500pci_init_bbp()
1080 rt2500pci_bbp_write(rt2x00dev, 31, 0x2b); in rt2500pci_init_bbp()
1081 rt2500pci_bbp_write(rt2x00dev, 32, 0xb9); in rt2500pci_init_bbp()
1082 rt2500pci_bbp_write(rt2x00dev, 34, 0x12); in rt2500pci_init_bbp()
1083 rt2500pci_bbp_write(rt2x00dev, 35, 0x50); in rt2500pci_init_bbp()
1084 rt2500pci_bbp_write(rt2x00dev, 39, 0xc4); in rt2500pci_init_bbp()
1085 rt2500pci_bbp_write(rt2x00dev, 40, 0x02); in rt2500pci_init_bbp()
1086 rt2500pci_bbp_write(rt2x00dev, 41, 0x60); in rt2500pci_init_bbp()
1087 rt2500pci_bbp_write(rt2x00dev, 53, 0x10); in rt2500pci_init_bbp()
1088 rt2500pci_bbp_write(rt2x00dev, 54, 0x18); in rt2500pci_init_bbp()
1089 rt2500pci_bbp_write(rt2x00dev, 56, 0x08); in rt2500pci_init_bbp()
1090 rt2500pci_bbp_write(rt2x00dev, 57, 0x10); in rt2500pci_init_bbp()
1091 rt2500pci_bbp_write(rt2x00dev, 58, 0x08); in rt2500pci_init_bbp()
1092 rt2500pci_bbp_write(rt2x00dev, 61, 0x6d); in rt2500pci_init_bbp()
1093 rt2500pci_bbp_write(rt2x00dev, 62, 0x10); in rt2500pci_init_bbp()
1096 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i); in rt2500pci_init_bbp()
1101 rt2500pci_bbp_write(rt2x00dev, reg_id, value); in rt2500pci_init_bbp()
1111 static void rt2500pci_toggle_irq(struct rt2x00_dev *rt2x00dev, in rt2500pci_toggle_irq() argument
1123 reg = rt2x00mmio_register_read(rt2x00dev, CSR7); in rt2500pci_toggle_irq()
1124 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_toggle_irq()
1131 spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags); in rt2500pci_toggle_irq()
1133 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_toggle_irq()
1139 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_toggle_irq()
1141 spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags); in rt2500pci_toggle_irq()
1147 tasklet_kill(&rt2x00dev->txstatus_tasklet); in rt2500pci_toggle_irq()
1148 tasklet_kill(&rt2x00dev->rxdone_tasklet); in rt2500pci_toggle_irq()
1149 tasklet_kill(&rt2x00dev->tbtt_tasklet); in rt2500pci_toggle_irq()
1153 static int rt2500pci_enable_radio(struct rt2x00_dev *rt2x00dev) in rt2500pci_enable_radio() argument
1158 if (unlikely(rt2500pci_init_queues(rt2x00dev) || in rt2500pci_enable_radio()
1159 rt2500pci_init_registers(rt2x00dev) || in rt2500pci_enable_radio()
1160 rt2500pci_init_bbp(rt2x00dev))) in rt2500pci_enable_radio()
1166 static void rt2500pci_disable_radio(struct rt2x00_dev *rt2x00dev) in rt2500pci_disable_radio() argument
1171 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0); in rt2500pci_disable_radio()
1174 static int rt2500pci_set_state(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_state() argument
1185 reg = rt2x00mmio_register_read(rt2x00dev, PWRCSR1); in rt2500pci_set_state()
1190 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1198 reg2 = rt2x00mmio_register_read(rt2x00dev, PWRCSR1); in rt2500pci_set_state()
1203 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1210 static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_device_state() argument
1217 retval = rt2500pci_enable_radio(rt2x00dev); in rt2500pci_set_device_state()
1220 rt2500pci_disable_radio(rt2x00dev); in rt2500pci_set_device_state()
1224 rt2500pci_toggle_irq(rt2x00dev, state); in rt2500pci_set_device_state()
1230 retval = rt2500pci_set_state(rt2x00dev, state); in rt2500pci_set_device_state()
1238 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", in rt2500pci_set_device_state()
1320 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; in rt2500pci_write_beacon() local
1327 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_write_beacon()
1329 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1332 rt2x00_err(rt2x00dev, "Fail to map beacon, aborting\n"); in rt2500pci_write_beacon()
1344 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry); in rt2500pci_write_beacon()
1350 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1379 entry->queue->rt2x00dev->rssi_offset; in rt2500pci_fill_rxdone()
1393 static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, in rt2500pci_txdone() argument
1396 struct data_queue *queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx); in rt2500pci_txdone()
1432 static inline void rt2500pci_enable_interrupt(struct rt2x00_dev *rt2x00dev, in rt2500pci_enable_interrupt() argument
1441 spin_lock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_enable_interrupt()
1443 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_enable_interrupt()
1445 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_enable_interrupt()
1447 spin_unlock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_enable_interrupt()
1452 struct rt2x00_dev *rt2x00dev = from_tasklet(rt2x00dev, t, in rt2500pci_txstatus_tasklet() local
1459 rt2500pci_txdone(rt2x00dev, QID_ATIM); in rt2500pci_txstatus_tasklet()
1460 rt2500pci_txdone(rt2x00dev, QID_AC_VO); in rt2500pci_txstatus_tasklet()
1461 rt2500pci_txdone(rt2x00dev, QID_AC_VI); in rt2500pci_txstatus_tasklet()
1466 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) { in rt2500pci_txstatus_tasklet()
1467 spin_lock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_txstatus_tasklet()
1469 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_txstatus_tasklet()
1473 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_txstatus_tasklet()
1475 spin_unlock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_txstatus_tasklet()
1481 struct rt2x00_dev *rt2x00dev = from_tasklet(rt2x00dev, t, tbtt_tasklet); in rt2500pci_tbtt_tasklet() local
1482 rt2x00lib_beacondone(rt2x00dev); in rt2500pci_tbtt_tasklet()
1483 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_tbtt_tasklet()
1484 rt2500pci_enable_interrupt(rt2x00dev, CSR8_TBCN_EXPIRE); in rt2500pci_tbtt_tasklet()
1489 struct rt2x00_dev *rt2x00dev = from_tasklet(rt2x00dev, t, in rt2500pci_rxdone_tasklet() local
1491 if (rt2x00mmio_rxdone(rt2x00dev)) in rt2500pci_rxdone_tasklet()
1492 tasklet_schedule(&rt2x00dev->rxdone_tasklet); in rt2500pci_rxdone_tasklet()
1493 else if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_rxdone_tasklet()
1494 rt2500pci_enable_interrupt(rt2x00dev, CSR8_RXDONE); in rt2500pci_rxdone_tasklet()
1499 struct rt2x00_dev *rt2x00dev = dev_instance; in rt2500pci_interrupt() local
1506 reg = rt2x00mmio_register_read(rt2x00dev, CSR7); in rt2500pci_interrupt()
1507 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_interrupt()
1512 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_interrupt()
1521 tasklet_hi_schedule(&rt2x00dev->tbtt_tasklet); in rt2500pci_interrupt()
1524 tasklet_schedule(&rt2x00dev->rxdone_tasklet); in rt2500pci_interrupt()
1529 tasklet_schedule(&rt2x00dev->txstatus_tasklet); in rt2500pci_interrupt()
1542 spin_lock(&rt2x00dev->irqmask_lock); in rt2500pci_interrupt()
1544 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_interrupt()
1546 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_interrupt()
1548 spin_unlock(&rt2x00dev->irqmask_lock); in rt2500pci_interrupt()
1556 static int rt2500pci_validate_eeprom(struct rt2x00_dev *rt2x00dev) in rt2500pci_validate_eeprom() argument
1563 reg = rt2x00mmio_register_read(rt2x00dev, CSR21); in rt2500pci_validate_eeprom()
1565 eeprom.data = rt2x00dev; in rt2500pci_validate_eeprom()
1575 eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom, in rt2500pci_validate_eeprom()
1581 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); in rt2500pci_validate_eeprom()
1582 rt2x00lib_set_mac_address(rt2x00dev, mac); in rt2500pci_validate_eeprom()
1584 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA); in rt2500pci_validate_eeprom()
1596 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); in rt2500pci_validate_eeprom()
1597 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1600 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC); in rt2500pci_validate_eeprom()
1605 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); in rt2500pci_validate_eeprom()
1606 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1609 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET); in rt2500pci_validate_eeprom()
1613 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); in rt2500pci_validate_eeprom()
1614 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", in rt2500pci_validate_eeprom()
1621 static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_eeprom() argument
1630 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA); in rt2500pci_init_eeprom()
1636 reg = rt2x00mmio_register_read(rt2x00dev, CSR0); in rt2500pci_init_eeprom()
1637 rt2x00_set_chip(rt2x00dev, RT2560, value, in rt2500pci_init_eeprom()
1640 if (!rt2x00_rf(rt2x00dev, RF2522) && in rt2500pci_init_eeprom()
1641 !rt2x00_rf(rt2x00dev, RF2523) && in rt2500pci_init_eeprom()
1642 !rt2x00_rf(rt2x00dev, RF2524) && in rt2500pci_init_eeprom()
1643 !rt2x00_rf(rt2x00dev, RF2525) && in rt2500pci_init_eeprom()
1644 !rt2x00_rf(rt2x00dev, RF2525E) && in rt2500pci_init_eeprom()
1645 !rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_init_eeprom()
1646 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); in rt2500pci_init_eeprom()
1653 rt2x00dev->default_ant.tx = in rt2500pci_init_eeprom()
1655 rt2x00dev->default_ant.rx = in rt2500pci_init_eeprom()
1664 rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); in rt2500pci_init_eeprom()
1668 rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_qual, in rt2500pci_init_eeprom()
1676 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1680 __set_bit(REQUIRE_DELAYED_RFKILL, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1686 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC); in rt2500pci_init_eeprom()
1688 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1693 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET); in rt2500pci_init_eeprom()
1694 rt2x00dev->rssi_offset = in rt2500pci_init_eeprom()
1855 static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) in rt2500pci_probe_hw_mode() argument
1857 struct hw_mode_spec *spec = &rt2x00dev->spec; in rt2500pci_probe_hw_mode()
1865 ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK); in rt2500pci_probe_hw_mode()
1866 ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS); in rt2500pci_probe_hw_mode()
1867 ieee80211_hw_set(rt2x00dev->hw, HOST_BROADCAST_PS_BUFFERING); in rt2500pci_probe_hw_mode()
1868 ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM); in rt2500pci_probe_hw_mode()
1870 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); in rt2500pci_probe_hw_mode()
1871 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, in rt2500pci_probe_hw_mode()
1872 rt2x00_eeprom_addr(rt2x00dev, in rt2500pci_probe_hw_mode()
1878 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; in rt2500pci_probe_hw_mode()
1886 if (rt2x00_rf(rt2x00dev, RF2522)) { in rt2500pci_probe_hw_mode()
1889 } else if (rt2x00_rf(rt2x00dev, RF2523)) { in rt2500pci_probe_hw_mode()
1892 } else if (rt2x00_rf(rt2x00dev, RF2524)) { in rt2500pci_probe_hw_mode()
1895 } else if (rt2x00_rf(rt2x00dev, RF2525)) { in rt2500pci_probe_hw_mode()
1898 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { in rt2500pci_probe_hw_mode()
1901 } else if (rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_probe_hw_mode()
1916 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); in rt2500pci_probe_hw_mode()
1932 static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev) in rt2500pci_probe_hw() argument
1940 retval = rt2500pci_validate_eeprom(rt2x00dev); in rt2500pci_probe_hw()
1944 retval = rt2500pci_init_eeprom(rt2x00dev); in rt2500pci_probe_hw()
1952 reg = rt2x00mmio_register_read(rt2x00dev, GPIOCSR); in rt2500pci_probe_hw()
1954 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, reg); in rt2500pci_probe_hw()
1959 retval = rt2500pci_probe_hw_mode(rt2x00dev); in rt2500pci_probe_hw()
1966 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1967 __set_bit(REQUIRE_DMA, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1968 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1973 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; in rt2500pci_probe_hw()
1984 struct rt2x00_dev *rt2x00dev = hw->priv; in rt2500pci_get_tsf() local
1988 reg = rt2x00mmio_register_read(rt2x00dev, CSR17); in rt2500pci_get_tsf()
1990 reg = rt2x00mmio_register_read(rt2x00dev, CSR16); in rt2500pci_get_tsf()
1998 struct rt2x00_dev *rt2x00dev = hw->priv; in rt2500pci_tx_last_beacon() local
2001 reg = rt2x00mmio_register_read(rt2x00dev, CSR15); in rt2500pci_tx_last_beacon()