Lines Matching refs:pctrl
89 struct pinctrl_dev *pctrl; member
125 static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl, in pm8xxx_read_bank() argument
131 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_read_bank()
133 dev_err(pctrl->dev, "failed to select bank %d\n", bank); in pm8xxx_read_bank()
137 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_read_bank()
139 dev_err(pctrl->dev, "failed to read register %d\n", bank); in pm8xxx_read_bank()
146 static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl, in pm8xxx_write_bank() argument
156 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_write_bank()
158 dev_err(pctrl->dev, "failed to write register\n"); in pm8xxx_write_bank()
165 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_groups_count() local
167 return pctrl->npins; in pm8xxx_get_groups_count()
182 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_group_pins() local
184 *pins = &pctrl->desc.pins[group].number; in pm8xxx_get_group_pins()
214 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_function_groups() local
217 *num_groups = pctrl->npins; in pm8xxx_get_function_groups()
225 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pinmux_set_mux() local
226 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux()
232 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pinmux_set_mux()
248 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_get() local
249 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get()
318 struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_set() local
319 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_set()
345 dev_err(pctrl->dev, "invalid pull-up strength\n"); in pm8xxx_pin_config_set()
375 dev_err(pctrl->dev, "invalid drive strength\n"); in pm8xxx_pin_config_set()
390 dev_err(pctrl->dev, in pm8xxx_pin_config_set()
400 pm8xxx_write_bank(pctrl, pin, 0, val); in pm8xxx_pin_config_set()
407 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_pin_config_set()
412 pm8xxx_write_bank(pctrl, pin, 2, val); in pm8xxx_pin_config_set()
418 pm8xxx_write_bank(pctrl, pin, 3, val); in pm8xxx_pin_config_set()
423 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pin_config_set()
430 pm8xxx_write_bank(pctrl, pin, 5, val); in pm8xxx_pin_config_set()
453 struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); in pm8xxx_gpio_direction_input() local
454 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_direction_input()
460 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_direction_input()
469 struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); in pm8xxx_gpio_direction_output() local
470 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_direction_output()
480 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_direction_output()
487 struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); in pm8xxx_gpio_get() local
488 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_get()
509 struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); in pm8xxx_gpio_set() local
510 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_set()
519 pm8xxx_write_bank(pctrl, pin, 1, val); in pm8xxx_gpio_set()
545 struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); in pm8xxx_gpio_dbg_show_one() local
546 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_gpio_dbg_show_one()
603 static int pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl, in pm8xxx_pin_populate() argument
608 val = pm8xxx_read_bank(pctrl, pin, 0); in pm8xxx_pin_populate()
614 val = pm8xxx_read_bank(pctrl, pin, 1); in pm8xxx_pin_populate()
622 val = pm8xxx_read_bank(pctrl, pin, 2); in pm8xxx_pin_populate()
632 val = pm8xxx_read_bank(pctrl, pin, 3); in pm8xxx_pin_populate()
639 val = pm8xxx_read_bank(pctrl, pin, 4); in pm8xxx_pin_populate()
645 val = pm8xxx_read_bank(pctrl, pin, 5); in pm8xxx_pin_populate()
667 struct pm8xxx_gpio *pctrl = container_of(domain->host_data, in pm8xxx_domain_translate() local
671 fwspec->param[0] > pctrl->chip.ngpio) in pm8xxx_domain_translate()
715 struct pm8xxx_gpio *pctrl; in pm8xxx_gpio_probe() local
718 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in pm8xxx_gpio_probe()
719 if (!pctrl) in pm8xxx_gpio_probe()
722 pctrl->dev = &pdev->dev; in pm8xxx_gpio_probe()
723 pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev); in pm8xxx_gpio_probe()
725 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); in pm8xxx_gpio_probe()
726 if (!pctrl->regmap) { in pm8xxx_gpio_probe()
731 pctrl->desc = pm8xxx_pinctrl_desc; in pm8xxx_gpio_probe()
732 pctrl->desc.npins = pctrl->npins; in pm8xxx_gpio_probe()
735 pctrl->desc.npins, in pm8xxx_gpio_probe()
742 pctrl->desc.npins, in pm8xxx_gpio_probe()
748 for (i = 0; i < pctrl->desc.npins; i++) { in pm8xxx_gpio_probe()
751 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]); in pm8xxx_gpio_probe()
759 pctrl->desc.pins = pins; in pm8xxx_gpio_probe()
761 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_gpio_bindings); in pm8xxx_gpio_probe()
762 pctrl->desc.custom_params = pm8xxx_gpio_bindings; in pm8xxx_gpio_probe()
764 pctrl->desc.custom_conf_items = pm8xxx_conf_items; in pm8xxx_gpio_probe()
767 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); in pm8xxx_gpio_probe()
768 if (IS_ERR(pctrl->pctrl)) { in pm8xxx_gpio_probe()
770 return PTR_ERR(pctrl->pctrl); in pm8xxx_gpio_probe()
773 pctrl->chip = pm8xxx_gpio_template; in pm8xxx_gpio_probe()
774 pctrl->chip.base = -1; in pm8xxx_gpio_probe()
775 pctrl->chip.parent = &pdev->dev; in pm8xxx_gpio_probe()
776 pctrl->chip.of_node = pdev->dev.of_node; in pm8xxx_gpio_probe()
777 pctrl->chip.of_gpio_n_cells = 2; in pm8xxx_gpio_probe()
778 pctrl->chip.label = dev_name(pctrl->dev); in pm8xxx_gpio_probe()
779 pctrl->chip.ngpio = pctrl->npins; in pm8xxx_gpio_probe()
781 parent_node = of_irq_find_parent(pctrl->dev->of_node); in pm8xxx_gpio_probe()
790 girq = &pctrl->chip.irq; in pm8xxx_gpio_probe()
794 girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node); in pm8xxx_gpio_probe()
801 ret = gpiochip_add_data(&pctrl->chip, pctrl); in pm8xxx_gpio_probe()
817 if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) { in pm8xxx_gpio_probe()
818 ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), in pm8xxx_gpio_probe()
819 0, 0, pctrl->chip.ngpio); in pm8xxx_gpio_probe()
821 dev_err(pctrl->dev, "failed to add pin range\n"); in pm8xxx_gpio_probe()
826 platform_set_drvdata(pdev, pctrl); in pm8xxx_gpio_probe()
833 gpiochip_remove(&pctrl->chip); in pm8xxx_gpio_probe()
840 struct pm8xxx_gpio *pctrl = platform_get_drvdata(pdev); in pm8xxx_gpio_remove() local
842 gpiochip_remove(&pctrl->chip); in pm8xxx_gpio_remove()