39 	u32 eint_mask;  member
57 	unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;  in exynos_irq_mask()
85 	unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;  in exynos_irq_unmask()
221 	.eint_mask = EXYNOS_GPIO_EMASK_OFFSET,
271 	u32 eint_mask;  member
414 	.eint_mask = EXYNOS_WKUP_EMASK_OFFSET,
434 	.eint_mask = EXYNOS_WKUP_EMASK_OFFSET,
453 	.eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
512 		mask = readl(b->eint_base + b->irq_chip->eint_mask  in exynos_irq_demux_eint16_31()
646 	save->eint_mask = readl(regs + bank->irq_chip->eint_mask  in exynos_pinctrl_suspend_bank()
652 	pr_debug("%s: save    mask %#010x\n", bank->name, save->eint_mask);  in exynos_pinctrl_suspend_bank()
691 			readl(regs + bank->irq_chip->eint_mask  in exynos_pinctrl_resume_bank()
692 			+ bank->eint_offset), save->eint_mask);  in exynos_pinctrl_resume_bank()
700 	writel(save->eint_mask, regs + bank->irq_chip->eint_mask  in exynos_pinctrl_resume_bank()