Lines Matching defs:qla_hw_data
4006 struct qla_hw_data { struct
4007 struct pci_dev *pdev;
4010 mempool_t *srb_mempool;
4011 u8 port_name[WWN_SIZE];
4013 volatile struct {
4080 } flags;
4082 uint16_t max_exchg;
4083 uint16_t lr_distance; /* 32G & above */
4094 spinlock_t hardware_lock ____cacheline_aligned;
4095 int bars;
4096 int mem_only;
4097 device_reg_t *iobase; /* Base I/O address */
4098 resource_size_t pio_address;
4101 dma_addr_t bar0_hdl;
4103 void __iomem *cregbase;
4104 dma_addr_t bar2_hdl;
4108 uint32_t rqstq_intr_code;
4109 uint32_t mbx_intr_code;
4110 uint32_t req_que_len;
4111 uint32_t rsp_que_len;
4112 uint32_t req_que_off;
4113 uint32_t rsp_que_off;
4114 unsigned long eeh_jif;
4117 device_reg_t *mqiobase;
4118 device_reg_t *msixbase;
4119 uint16_t msix_count;
4120 uint8_t mqenable;
4121 struct req_que **req_q_map;
4122 struct rsp_que **rsp_q_map;
4123 struct qla_qpair **queue_pair_map;
4124 struct qla_qpair **qp_cpu_map;
4125 unsigned long req_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
4126 unsigned long rsp_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
4127 unsigned long qpair_qid_map[(QLA_MAX_QUEUES / 8)
4129 uint8_t max_req_queues;
4130 uint8_t max_rsp_queues;
4131 uint8_t max_qpairs;
4132 uint8_t num_qpairs;
4133 struct qla_qpair *base_qpair;
4134 struct qla_npiv_entry *npiv_info;
4135 uint16_t nvram_npiv_size;
4137 uint16_t switch_cap;
4143 uint8_t port_no; /* Physical port of adapter */
4144 uint8_t exch_starvation;
4147 uint8_t loop_down_abort_time; /* port down timer */
4148 atomic_t loop_down_timer; /* loop down timer */
4149 uint8_t link_down_timeout; /* link down timeout */
4150 uint16_t max_loop_id;
4151 uint16_t max_fibre_devices; /* Maximum number of targets */
4153 uint16_t fb_rev;
4154 uint16_t min_external_loopid; /* First external loop Id */
4166 uint16_t link_data_rate; /* F/W operating speed */
4167 uint16_t set_data_rate; /* Set by user */
4169 uint8_t current_topology;
4170 uint8_t prev_topology;
4176 uint8_t operating_mode; /* F/W operating mode */
4181 uint8_t interrupts_on;
4182 uint32_t isp_abort_cnt;
4197 uint32_t isp_type;
4227 uint32_t device_type;
4346 uint8_t serial0;
4347 uint8_t serial1;
4348 uint8_t serial2;
4353 uint16_t nvram_size;
4354 uint16_t nvram_base;
4355 void *nvram;
4356 uint16_t vpd_size;
4357 uint16_t vpd_base;
4358 void *vpd;
4360 uint16_t loop_reset_delay;
4361 uint8_t retry_count;
4362 uint8_t login_timeout;
4363 uint16_t r_a_tov;
4364 int port_down_retry_count;
4365 uint8_t mbx_count;
4366 uint8_t aen_mbx_count;
4367 atomic_t num_pend_mbx_stage1;
4368 atomic_t num_pend_mbx_stage2;
4369 uint16_t frame_payload_size;
4371 uint32_t login_retry_count;
4373 ms_iocb_entry_t *ms_iocb;
4374 dma_addr_t ms_iocb_dma;
4375 struct ct_sns_pkt *ct_sns;
4376 dma_addr_t ct_sns_dma;
4378 struct sns_cmd_pkt *sns_cmd;
4379 dma_addr_t sns_cmd_dma;
4385 void *sfp_data;
4386 dma_addr_t sfp_data_dma;
4388 struct qla_flt_header *flt;
4389 dma_addr_t flt_dma;
4392 void *xgmac_data;
4393 dma_addr_t xgmac_data_dma;
4396 void *dcbx_tlv;
4397 dma_addr_t dcbx_tlv_dma;
4399 struct task_struct *dpc_thread;
4400 uint8_t dpc_active; /* DPC routine is active */
4402 dma_addr_t gid_list_dma;
4403 struct gid_list_info *gid_list;
4404 int gid_list_info_size;
4408 struct dma_pool *s_dma_pool;
4410 dma_addr_t init_cb_dma;
4411 init_cb_t *init_cb;
4412 int init_cb_size;
4413 dma_addr_t ex_init_cb_dma;
4414 struct ex_init_cb_81xx *ex_init_cb;
4415 dma_addr_t sf_init_cb_dma;
4416 struct init_sf_cb *sf_init_cb;
4418 void *scm_fpin_els_buff;
4419 uint64_t scm_fpin_els_buff_size;
4420 bool scm_fpin_valid;
4421 bool scm_fpin_payload_size;
4423 void *async_pd;
4424 dma_addr_t async_pd_dma;
4429 void *exlogin_buf;
4430 dma_addr_t exlogin_buf_dma;
4431 uint32_t exlogin_size;
4436 void *exchoffld_buf;
4437 dma_addr_t exchoffld_buf_dma;
4438 int exchoffld_size;
4439 int exchoffld_count;
4442 struct fc_els_flogi plogi_els_payld;
4445 void *swl;
4448 uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
4449 uint32_t mailbox_out32[MAILBOX_REGISTER_COUNT];
4450 uint32_t aenmb[AEN_MAILBOX_REGISTER_COUNT_FX00];
4452 mbx_cmd_t *mcp;
4453 struct mbx_cmd_32 *mcp32;
4455 unsigned long mbx_cmd_flags;
4460 struct mutex vport_lock; /* Virtual port synchronization */
4461 spinlock_t vport_slock; /* order is hardware_lock, then vport_slock */
4462 struct mutex mq_lock; /* multi-queue synchronization */
4463 struct completion mbx_cmd_comp; /* Serialize mbx access */
4464 struct completion mbx_intr_comp; /* Used for completion notification */
4465 struct completion dcbx_comp; /* For set port config notification */
4466 struct completion lb_portup_comp; /* Used to wait for link up during
4471 int notify_dcbx_comp;
4472 int notify_lb_portup_comp;
4473 struct mutex selflogin_lock;
4476 uint16_t fw_major_version;
4477 uint16_t fw_minor_version;
4478 uint16_t fw_subminor_version;
4479 uint16_t fw_attributes;
4480 uint16_t fw_attributes_h;
4493 uint16_t fw_attributes_ext[2];
4494 uint32_t fw_memory_size;
4495 uint32_t fw_transfer_size;
4496 uint32_t fw_srisc_address;
4501 uint16_t orig_fw_tgt_xcb_count;
4502 uint16_t cur_fw_tgt_xcb_count;
4503 uint16_t orig_fw_xcb_count;
4504 uint16_t cur_fw_xcb_count;
4505 uint16_t orig_fw_iocb_count;
4506 uint16_t cur_fw_iocb_count;
4507 uint16_t fw_max_fcf_count;
4509 uint32_t fw_shared_ram_start;
4510 uint32_t fw_shared_ram_end;
4511 uint32_t fw_ddr_ram_start;
4512 uint32_t fw_ddr_ram_end;
4514 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
4515 uint8_t fw_seriallink_options[4];
4516 __le16 fw_seriallink_options24[4];
4518 uint8_t serdes_version[3];
4519 uint8_t mpi_version[3];
4520 uint32_t mpi_capabilities;
4521 uint8_t phy_version[3];
4522 uint8_t pep_version[3];
4525 struct fwdt {
4529 } fwdt[2];
4530 struct qla2xxx_fw_dump *fw_dump;
4531 uint32_t fw_dump_len;
4532 u32 fw_dump_alloc_len;
4533 bool fw_dumped;
4534 unsigned long fw_dump_cap_flags;
4543 int fw_dump_reading;
4544 void *mpi_fw_dump;
4545 u32 mpi_fw_dump_len;
4546 unsigned int mpi_fw_dump_reading:1;
4547 unsigned int mpi_fw_dumped:1;
4548 int prev_minidump_failed;
4549 dma_addr_t eft_dma;
4550 void *eft;
4553 dma_addr_t mctp_dump_dma;
4554 void *mctp_dump;
4555 int mctp_dumped;
4556 int mctp_dump_reading;
4557 uint32_t chain_offset;
4558 struct dentry *dfs_dir;
4559 struct dentry *dfs_fce;
4560 struct dentry *dfs_tgt_counters;
4561 struct dentry *dfs_fw_resource_cnt;
4563 dma_addr_t fce_dma;
4564 void *fce;
4565 uint32_t fce_bufs;
4566 uint16_t fce_mb[8];
4567 uint64_t fce_wr, fce_rd;
4568 struct mutex fce_mutex;
4570 uint32_t pci_attr;
4571 uint16_t chip_revision;
4573 uint16_t product_id[4];
4575 uint8_t model_number[16+1];
4576 char model_desc[80];
4577 uint8_t adapter_id[16+1];
4580 char *optrom_buffer;
4581 uint32_t optrom_size;
4582 int optrom_state;
4586 uint32_t optrom_region_start;
4587 uint32_t optrom_region_size;
4588 struct mutex optrom_mutex;
4594 uint8_t bios_revision[2];
4595 uint8_t efi_revision[2];
4596 uint8_t fcode_revision[16];
4597 uint32_t fw_revision[4];
4599 uint32_t gold_fw_version[4];
4602 uint32_t flash_conf_off;
4603 uint32_t flash_data_off;
4604 uint32_t nvram_conf_off;
4605 uint32_t nvram_data_off;
4607 uint32_t fdt_wrt_disable;
4608 uint32_t fdt_wrt_enable;
4609 uint32_t fdt_erase_cmd;
4610 uint32_t fdt_block_size;
4611 uint32_t fdt_unprotect_sec_cmd;
4612 uint32_t fdt_protect_sec_cmd;
4613 uint32_t fdt_wrt_sts_reg_cmd;
4615 struct {
4637 uint8_t active_image;
4638 uint8_t active_tmf;
4642 uint16_t beacon_blink_led;
4643 uint8_t beacon_color_state;
4649 uint16_t zio_mode;
4650 uint16_t zio_timer;
4652 struct qla_msix_entry *msix_entries;
4654 struct list_head tmf_pending;
4655 struct list_head tmf_active;
4656 struct list_head vp_list; /* list of VP */
4657 unsigned long vp_idx_map[(MAX_MULTI_ID_FABRIC / 8) /
4659 uint16_t num_vhosts; /* number of vports created */
4660 uint16_t num_vsans; /* number of vsan created */
4661 uint16_t max_npiv_vports; /* 63 or 125 per topoloty */
4662 int cur_vport_count;
4664 struct qla_chip_state_84xx *cs84xx;
4665 struct isp_operations *isp_ops;
4666 struct workqueue_struct *wq;
4667 struct work_struct heartbeat_work;
4668 struct qlfc_fw fw_buf;
4669 unsigned long last_heartbeat_run_jiffies;
4672 struct qla_fcp_prio_cfg *fcp_prio_cfg;
4674 struct dma_pool *dl_dma_pool;
4677 struct dma_pool *fcp_cmnd_dma_pool;
4678 mempool_t *ctx_mempool;
4681 void __iomem *nx_pcibase; /* Base I/O address */
4682 void __iomem *nxdb_rd_ptr; /* Doorbell read pointer */
4683 void __iomem *nxdb_wr_ptr; /* Door bell write pointer */
4685 uint32_t crb_win;
4686 uint32_t curr_window;
4687 uint32_t ddr_mn_window;
4688 unsigned long mn_win_crb;
4689 unsigned long ms_win_crb;
4690 int qdr_sn_window;
4691 uint32_t fcoe_dev_init_timeout;
4692 uint32_t fcoe_reset_timeout;
4693 rwlock_t hw_lock;
4694 uint16_t portnum; /* port number */
4695 int link_width;
4696 struct fw_blob *hablob;
4697 struct qla82xx_legacy_intr_set nx_legacy_intr;
4699 uint16_t gbl_dsd_inuse;
4700 uint16_t gbl_dsd_avail;
4701 struct list_head gbl_dsd_list;
4704 uint8_t fw_type;
4705 uint32_t file_prd_off; /* File firmware product offset */
4707 uint32_t md_template_size;
4708 void *md_tmplt_hdr;
4709 dma_addr_t md_tmplt_hdr_dma;
4710 void *md_dump;
4711 uint32_t md_dump_size;
4713 void *loop_id_map;
4716 uint32_t idc_audit_ts;
4717 uint32_t idc_extend_tmo;
4720 struct workqueue_struct *dpc_lp_wq;
4721 struct work_struct idc_aen;
4723 struct workqueue_struct *dpc_hp_wq;
4724 struct work_struct nic_core_reset;
4725 struct work_struct idc_state_handler;
4726 struct work_struct nic_core_unrecoverable;
4727 struct work_struct board_disable;
4729 struct mr_data_fx00 mr;
4730 uint32_t chip_reset;
4732 struct qlt_hw_data tgt;
4733 int allow_cna_fw_dump;
4734 uint32_t fw_ability_mask;
4735 uint16_t min_supported_speed;
4736 uint16_t max_supported_speed;
4739 struct dma_pool *dif_bundl_pool;
4741 struct {
4768 struct qla_hw_data_stat stat; argument
4769 pci_error_state_t pci_error_state;
4770 struct dma_pool *purex_dma_pool;
4771 struct btree_head32 host_map;
4775 void *edif_rx_sa_id_map;
4776 void *edif_tx_sa_id_map;
4777 spinlock_t sadb_fp_lock;
4779 struct list_head sadb_tx_index_list;
4780 struct list_head sadb_rx_index_list;
4781 spinlock_t sadb_lock; /* protects list */
4782 struct els_reject elsrej;
4783 u8 edif_post_stop_cnt_down;
4784 struct qla_fw_res fwres ____cacheline_aligned;