Lines Matching refs:uap
284 static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap, in pl011_reg_to_offset() argument
287 return uap->reg_offset[reg]; in pl011_reg_to_offset()
290 static unsigned int pl011_read(const struct uart_amba_port *uap, in pl011_read() argument
293 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
295 return (uap->port.iotype == UPIO_MEM32) ? in pl011_read()
299 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() argument
302 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_write()
304 if (uap->port.iotype == UPIO_MEM32) in pl011_write()
315 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
322 status = pl011_read(uap, REG_FR); in pl011_fifo_to_tty()
327 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX; in pl011_fifo_to_tty()
329 uap->port.icount.rx++; in pl011_fifo_to_tty()
334 uap->port.icount.brk++; in pl011_fifo_to_tty()
335 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
338 uap->port.icount.parity++; in pl011_fifo_to_tty()
340 uap->port.icount.frame++; in pl011_fifo_to_tty()
342 uap->port.icount.overrun++; in pl011_fifo_to_tty()
344 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
354 spin_unlock(&uap->port.lock); in pl011_fifo_to_tty()
355 sysrq = uart_handle_sysrq_char(&uap->port, ch & 255); in pl011_fifo_to_tty()
356 spin_lock(&uap->port.lock); in pl011_fifo_to_tty()
359 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
396 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
399 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
400 struct device *dev = uap->port.dev; in pl011_dma_probe()
402 .dst_addr = uap->port.mapbase + in pl011_dma_probe()
403 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
406 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
412 uap->dma_probed = true; in pl011_dma_probe()
416 uap->dma_probed = false; in pl011_dma_probe()
422 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
433 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
439 uap->dmatx.chan = chan; in pl011_dma_probe()
441 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
442 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
451 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
458 .src_addr = uap->port.mapbase + in pl011_dma_probe()
459 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
462 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
476 dev_info(uap->port.dev, in pl011_dma_probe()
482 uap->dmarx.chan = chan; in pl011_dma_probe()
484 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
488 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
489 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
496 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
497 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
501 uap->dmarx.poll_timeout = in pl011_dma_probe()
504 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
506 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
508 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
513 uap->dmarx.poll_rate = x; in pl011_dma_probe()
515 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
518 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
520 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
523 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
524 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
528 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
530 if (uap->dmatx.chan) in pl011_dma_remove()
531 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
532 if (uap->dmarx.chan) in pl011_dma_remove()
533 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
537 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
538 static void pl011_start_tx_pio(struct uart_amba_port *uap);
546 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
547 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
551 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
552 if (uap->dmatx.queued) in pl011_dma_tx_callback()
556 dmacr = uap->dmacr; in pl011_dma_tx_callback()
557 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
558 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
569 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
570 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
571 uap->dmatx.queued = false; in pl011_dma_tx_callback()
572 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
576 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
581 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
583 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
594 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
596 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
600 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
610 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
611 uap->dmatx.queued = false; in pl011_dma_tx_refill()
644 uap->dmatx.queued = false; in pl011_dma_tx_refill()
645 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
653 uap->dmatx.queued = false; in pl011_dma_tx_refill()
658 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
664 desc->callback_param = uap; in pl011_dma_tx_refill()
672 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
673 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
674 uap->dmatx.queued = true; in pl011_dma_tx_refill()
681 uap->port.icount.tx += count; in pl011_dma_tx_refill()
684 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
697 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
699 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
707 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
708 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
709 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
710 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
711 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
719 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
720 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
721 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
731 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
733 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
734 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
735 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
747 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
751 if (!uap->using_tx_dma) in pl011_dma_tx_start()
754 if (!uap->port.x_char) { in pl011_dma_tx_start()
758 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
759 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
760 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
761 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
764 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
765 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
766 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
775 dmacr = uap->dmacr; in pl011_dma_tx_start()
776 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
777 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
779 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
788 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
789 uap->port.icount.tx++; in pl011_dma_tx_start()
790 uap->port.x_char = 0; in pl011_dma_tx_start()
793 uap->dmacr = dmacr; in pl011_dma_tx_start()
794 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
804 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
805 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
807 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
810 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
813 dmaengine_terminate_async(uap->dmatx.chan); in pl011_dma_flush_buffer()
815 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
816 dma_unmap_single(uap->dmatx.chan->device->dev, uap->dmatx.dma, in pl011_dma_flush_buffer()
817 uap->dmatx.len, DMA_TO_DEVICE); in pl011_dma_flush_buffer()
818 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
819 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
820 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
826 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
828 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
829 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
837 dbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
838 &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; in pl011_dma_rx_trigger_dma()
848 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
855 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
859 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
860 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
861 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
863 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
864 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
874 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
878 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
880 &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; in pl011_dma_rx_chars()
884 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
887 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
906 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
908 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
913 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
923 UART011_FEIS, uap, REG_ICR); in pl011_dma_rx_chars()
936 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
939 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
945 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
947 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
961 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
965 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
968 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
969 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
970 uap->dmarx.running = false; in pl011_dma_rx_irq()
981 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
985 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
986 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
988 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
989 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
995 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
996 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
1012 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1023 uap->dmarx.running = false; in pl011_dma_rx_callback()
1025 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
1027 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
1028 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1034 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
1036 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
1037 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1046 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1048 if (!uap->using_rx_dma) in pl011_dma_rx_stop()
1052 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
1053 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1063 struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer); in pl011_dma_rx_poll() local
1064 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
1065 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
1066 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
1074 dbuf = dmarx->use_buf_b ? &uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a; in pl011_dma_rx_poll()
1092 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
1094 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
1095 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
1096 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
1097 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1098 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
1100 uap->dmarx.running = false; in pl011_dma_rx_poll()
1102 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
1104 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
1105 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
1109 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1113 if (!uap->dma_probed) in pl011_dma_startup()
1114 pl011_dma_probe(uap); in pl011_dma_startup()
1116 if (!uap->dmatx.chan) in pl011_dma_startup()
1119 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1120 if (!uap->dmatx.buf) { in pl011_dma_startup()
1121 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1122 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1126 uap->dmatx.len = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1129 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1130 uap->using_tx_dma = true; in pl011_dma_startup()
1132 if (!uap->dmarx.chan) in pl011_dma_startup()
1136 ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_a, in pl011_dma_startup()
1139 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1144 ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_b, in pl011_dma_startup()
1147 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1149 pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_a, in pl011_dma_startup()
1154 uap->using_rx_dma = true; in pl011_dma_startup()
1158 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1159 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1166 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1168 uap, REG_ST_DMAWM); in pl011_dma_startup()
1170 if (uap->using_rx_dma) { in pl011_dma_startup()
1171 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1172 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1174 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1175 timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0); in pl011_dma_startup()
1176 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1178 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1179 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1180 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1185 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1187 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1191 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) in pl011_dma_shutdown()
1194 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1195 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1196 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1197 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1199 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1201 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1202 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1203 dma_unmap_single(uap->dmatx.chan->device->dev, in pl011_dma_shutdown()
1204 uap->dmatx.dma, uap->dmatx.len, in pl011_dma_shutdown()
1206 uap->dmatx.queued = false; in pl011_dma_shutdown()
1209 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1210 uap->using_tx_dma = false; in pl011_dma_shutdown()
1213 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1214 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1216 pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1217 pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1218 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1219 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1220 uap->using_rx_dma = false; in pl011_dma_shutdown()
1224 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1226 return uap->using_rx_dma; in pl011_dma_rx_available()
1229 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1231 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1236 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1240 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1244 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1248 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1253 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1257 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1262 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1266 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1270 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1275 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1280 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1288 static void pl011_rs485_tx_stop(struct uart_amba_port *uap) in pl011_rs485_tx_stop() argument
1294 const int MAX_TX_DRAIN_ITERS = uap->port.fifosize * 2; in pl011_rs485_tx_stop()
1295 struct uart_port *port = &uap->port; in pl011_rs485_tx_stop()
1307 udelay(uap->rs485_tx_drain_interval); in pl011_rs485_tx_stop()
1314 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_stop()
1324 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1326 uap->rs485_tx_started = false; in pl011_rs485_tx_stop()
1331 struct uart_amba_port *uap = in pl011_stop_tx() local
1334 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1335 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1336 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1338 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_stop_tx()
1339 pl011_rs485_tx_stop(uap); in pl011_stop_tx()
1342 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1345 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1347 if (pl011_tx_chars(uap, false)) { in pl011_start_tx_pio()
1348 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1349 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1353 static void pl011_rs485_tx_start(struct uart_amba_port *uap) in pl011_rs485_tx_start() argument
1355 struct uart_port *port = &uap->port; in pl011_rs485_tx_start()
1359 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_start()
1371 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1376 uap->rs485_tx_started = true; in pl011_rs485_tx_start()
1381 struct uart_amba_port *uap = in pl011_start_tx() local
1384 if ((uap->port.rs485.flags & SER_RS485_ENABLED) && in pl011_start_tx()
1385 !uap->rs485_tx_started) in pl011_start_tx()
1386 pl011_rs485_tx_start(uap); in pl011_start_tx()
1388 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1389 pl011_start_tx_pio(uap); in pl011_start_tx()
1394 struct uart_amba_port *uap = in pl011_stop_rx() local
1397 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1399 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1401 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1415 struct uart_amba_port *uap = in pl011_enable_ms() local
1418 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1419 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1422 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1423 __releases(&uap->port.lock) in pl011_rx_chars()
1424 __acquires(&uap->port.lock) in pl011_rx_chars()
1426 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1428 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1429 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1434 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1435 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1436 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1438 uap->im |= UART011_RXIM; in pl011_rx_chars()
1439 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1443 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1444 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1445 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1446 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1448 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1453 spin_lock(&uap->port.lock); in pl011_rx_chars()
1456 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1460 pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1463 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1464 uap->port.icount.tx++; in pl011_tx_char()
1470 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1472 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1473 int count = uap->fifosize >> 1; in pl011_tx_chars()
1475 if (uap->port.x_char) { in pl011_tx_chars()
1476 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1478 uap->port.x_char = 0; in pl011_tx_chars()
1481 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1482 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1487 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1494 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1501 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1504 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1510 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1514 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1516 delta = status ^ uap->old_status; in pl011_modem_status()
1517 uap->old_status = status; in pl011_modem_status()
1523 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1525 if (delta & uap->vendor->fr_dsr) in pl011_modem_status()
1526 uap->port.icount.dsr++; in pl011_modem_status()
1528 if (delta & uap->vendor->fr_cts) in pl011_modem_status()
1529 uart_handle_cts_change(&uap->port, in pl011_modem_status()
1530 status & uap->vendor->fr_cts); in pl011_modem_status()
1532 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1535 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1537 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1541 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1548 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1549 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1554 struct uart_amba_port *uap = dev_id; in pl011_int() local
1559 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1560 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1563 check_apply_cts_event_workaround(uap); in pl011_int()
1567 uap, REG_ICR); in pl011_int()
1570 if (pl011_dma_rx_running(uap)) in pl011_int()
1571 pl011_dma_rx_irq(uap); in pl011_int()
1573 pl011_rx_chars(uap); in pl011_int()
1577 pl011_modem_status(uap); in pl011_int()
1579 pl011_tx_chars(uap, true); in pl011_int()
1584 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1589 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1596 struct uart_amba_port *uap = in pl011_tx_empty() local
1600 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr; in pl011_tx_empty()
1602 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? in pl011_tx_empty()
1608 struct uart_amba_port *uap = in pl011_get_mctrl() local
1611 unsigned int status = pl011_read(uap, REG_FR); in pl011_get_mctrl()
1618 TIOCMBIT(uap->vendor->fr_dsr, TIOCM_DSR); in pl011_get_mctrl()
1619 TIOCMBIT(uap->vendor->fr_cts, TIOCM_CTS); in pl011_get_mctrl()
1620 TIOCMBIT(uap->vendor->fr_ri, TIOCM_RNG); in pl011_get_mctrl()
1627 struct uart_amba_port *uap = in pl011_set_mctrl() local
1631 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1651 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1656 struct uart_amba_port *uap = in pl011_break_ctl() local
1661 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1662 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_break_ctl()
1667 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1668 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1675 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1678 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1692 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1698 struct uart_amba_port *uap = in pl011_get_poll_char() local
1708 status = pl011_read(uap, REG_FR); in pl011_get_poll_char()
1712 return pl011_read(uap, REG_DR); in pl011_get_poll_char()
1718 struct uart_amba_port *uap = in pl011_put_poll_char() local
1721 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1724 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1731 struct uart_amba_port *uap = in pl011_hwinit() local
1741 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1745 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1750 uap, REG_ICR); in pl011_hwinit()
1756 uap->im = pl011_read(uap, REG_IMSC); in pl011_hwinit()
1757 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1759 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1762 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1769 static bool pl011_split_lcrh(const struct uart_amba_port *uap) in pl011_split_lcrh() argument
1771 return pl011_reg_to_offset(uap, REG_LCRH_RX) != in pl011_split_lcrh()
1772 pl011_reg_to_offset(uap, REG_LCRH_TX); in pl011_split_lcrh()
1775 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1777 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1778 if (pl011_split_lcrh(uap)) { in pl011_write_lcr_h()
1785 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1786 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1790 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1792 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1794 return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", uap); in pl011_allocate_irq()
1802 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1807 spin_lock_irqsave(&uap->port.lock, flags); in pl011_enable_interrupts()
1810 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1818 for (i = 0; i < uap->fifosize * 2; ++i) { in pl011_enable_interrupts()
1819 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE) in pl011_enable_interrupts()
1822 pl011_read(uap, REG_DR); in pl011_enable_interrupts()
1825 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1826 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1827 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1828 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1829 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_enable_interrupts()
1834 struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port); in pl011_unthrottle_rx() local
1837 spin_lock_irqsave(&uap->port.lock, flags); in pl011_unthrottle_rx()
1839 uap->im = UART011_RTIM; in pl011_unthrottle_rx()
1840 if (!pl011_dma_rx_running(uap)) in pl011_unthrottle_rx()
1841 uap->im |= UART011_RXIM; in pl011_unthrottle_rx()
1843 pl011_write(uap->im, uap, REG_IMSC); in pl011_unthrottle_rx()
1845 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_unthrottle_rx()
1850 struct uart_amba_port *uap = in pl011_startup() local
1859 retval = pl011_allocate_irq(uap); in pl011_startup()
1863 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1865 spin_lock_irq(&uap->port.lock); in pl011_startup()
1868 cr = uap->old_cr & (UART011_CR_RTS | UART011_CR_DTR); in pl011_startup()
1874 pl011_write(cr, uap, REG_CR); in pl011_startup()
1876 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1881 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1884 pl011_dma_startup(uap); in pl011_startup()
1886 pl011_enable_interrupts(uap); in pl011_startup()
1891 clk_disable_unprepare(uap->clk); in pl011_startup()
1897 struct uart_amba_port *uap = in sbsa_uart_startup() local
1905 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1910 uap->old_status = 0; in sbsa_uart_startup()
1912 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1917 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1922 val = pl011_read(uap, lcrh); in pl011_shutdown_channel()
1924 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1932 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1936 uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in pl011_disable_uart()
1937 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1938 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1939 uap->old_cr = cr; in pl011_disable_uart()
1942 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1943 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1948 pl011_shutdown_channel(uap, REG_LCRH_RX); in pl011_disable_uart()
1949 if (pl011_split_lcrh(uap)) in pl011_disable_uart()
1950 pl011_shutdown_channel(uap, REG_LCRH_TX); in pl011_disable_uart()
1953 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1955 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1958 uap->im = 0; in pl011_disable_interrupts()
1959 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1960 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
1962 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1967 struct uart_amba_port *uap = in pl011_shutdown() local
1970 pl011_disable_interrupts(uap); in pl011_shutdown()
1972 pl011_dma_shutdown(uap); in pl011_shutdown()
1974 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_shutdown()
1975 pl011_rs485_tx_stop(uap); in pl011_shutdown()
1977 free_irq(uap->port.irq, uap); in pl011_shutdown()
1979 pl011_disable_uart(uap); in pl011_shutdown()
1984 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1988 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1991 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1996 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1997 uap->port.ops->flush_buffer(port); in pl011_shutdown()
2002 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
2005 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
2007 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
2009 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
2010 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
2049 struct uart_amba_port *uap = in pl011_set_termios() local
2056 if (uap->vendor->oversampling) in pl011_set_termios()
2070 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
2071 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
2102 if (uap->fifosize > 1) in pl011_set_termios()
2119 uap->rs485_tx_drain_interval = DIV_ROUND_UP(bits * 1000 * 1000, baud); in pl011_set_termios()
2129 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2142 if (uap->vendor->oversampling) { in pl011_set_termios()
2155 if (uap->vendor->oversampling) { in pl011_set_termios()
2162 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2163 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2171 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
2172 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2181 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
2185 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
2193 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
2200 struct uart_amba_port *uap = in pl011_type() local
2202 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2234 struct uart_amba_port *uap = in pl011_rs485_config() local
2249 pl011_rs485_tx_stop(uap); in pl011_rs485_config()
2256 u32 cr = pl011_read(uap, REG_CR); in pl011_rs485_config()
2259 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2326 struct uart_amba_port *uap = in pl011_console_putchar() local
2329 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2331 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2337 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2342 clk_enable(uap->clk); in pl011_console_write()
2345 if (uap->port.sysrq) in pl011_console_write()
2348 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2350 spin_lock(&uap->port.lock); in pl011_console_write()
2355 if (!uap->vendor->always_enabled) { in pl011_console_write()
2356 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2359 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2362 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2369 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr) in pl011_console_write()
2370 & uap->vendor->fr_busy) in pl011_console_write()
2372 if (!uap->vendor->always_enabled) in pl011_console_write()
2373 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2376 spin_unlock(&uap->port.lock); in pl011_console_write()
2379 clk_disable(uap->clk); in pl011_console_write()
2382 static void pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2385 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2388 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_console_get_options()
2403 ibrd = pl011_read(uap, REG_IBRD); in pl011_console_get_options()
2404 fbrd = pl011_read(uap, REG_FBRD); in pl011_console_get_options()
2406 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2408 if (uap->vendor->oversampling) { in pl011_console_get_options()
2409 if (pl011_read(uap, REG_CR) in pl011_console_get_options()
2418 struct uart_amba_port *uap; in pl011_console_setup() local
2432 uap = amba_ports[co->index]; in pl011_console_setup()
2433 if (!uap) in pl011_console_setup()
2437 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2439 ret = clk_prepare(uap->clk); in pl011_console_setup()
2443 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2446 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2451 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2453 if (uap->vendor->fixed_options) { in pl011_console_setup()
2454 baud = uap->fixed_baud; in pl011_console_setup()
2460 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2463 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2701 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2707 if (amba_ports[i] == uap) in pl011_unregister_port()
2712 pl011_dma_remove(uap); in pl011_unregister_port()
2728 static int pl011_get_rs485_mode(struct uart_amba_port *uap) in pl011_get_rs485_mode() argument
2730 struct uart_port *port = &uap->port; in pl011_get_rs485_mode()
2745 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2757 uap->old_cr = 0; in pl011_setup_port()
2758 uap->port.dev = dev; in pl011_setup_port()
2759 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2760 uap->port.membase = base; in pl011_setup_port()
2761 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2762 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL011_CONSOLE); in pl011_setup_port()
2763 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2764 uap->port.line = index; in pl011_setup_port()
2766 ret = pl011_get_rs485_mode(uap); in pl011_setup_port()
2770 amba_ports[index] = uap; in pl011_setup_port()
2775 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2780 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2781 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()
2786 dev_err(uap->port.dev, in pl011_register_port()
2789 if (amba_ports[i] == uap) in pl011_register_port()
2795 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2797 pl011_unregister_port(uap); in pl011_register_port()
2804 struct uart_amba_port *uap; in pl011_probe() local
2812 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2814 if (!uap) in pl011_probe()
2817 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2818 if (IS_ERR(uap->clk)) in pl011_probe()
2819 return PTR_ERR(uap->clk); in pl011_probe()
2821 uap->reg_offset = vendor->reg_offset; in pl011_probe()
2822 uap->vendor = vendor; in pl011_probe()
2823 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2824 uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in pl011_probe()
2825 uap->port.irq = dev->irq[0]; in pl011_probe()
2826 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2827 uap->port.rs485_config = pl011_rs485_config; in pl011_probe()
2828 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2830 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2834 amba_set_drvdata(dev, uap); in pl011_probe()
2836 return pl011_register_port(uap); in pl011_probe()
2841 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2843 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2844 pl011_unregister_port(uap); in pl011_remove()
2850 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2852 if (!uap) in pl011_suspend()
2855 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2860 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2862 if (!uap) in pl011_resume()
2865 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2873 struct uart_amba_port *uap; in sbsa_uart_probe() local
2896 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2898 if (!uap) in sbsa_uart_probe()
2904 uap->port.irq = ret; in sbsa_uart_probe()
2909 uap->vendor = &vendor_qdt_qdf2400_e44; in sbsa_uart_probe()
2912 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2914 uap->reg_offset = uap->vendor->reg_offset; in sbsa_uart_probe()
2915 uap->fifosize = 32; in sbsa_uart_probe()
2916 uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in sbsa_uart_probe()
2917 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2918 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2920 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2924 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2928 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2930 return pl011_register_port(uap); in sbsa_uart_probe()
2935 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2937 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2938 pl011_unregister_port(uap); in sbsa_uart_remove()