Lines Matching refs:sport
340 static inline bool is_layerscape_lpuart(struct lpuart_port *sport) in is_layerscape_lpuart() argument
342 return (sport->devtype == LS1021A_LPUART || in is_layerscape_lpuart()
343 sport->devtype == LS1028A_LPUART); in is_layerscape_lpuart()
346 static inline bool is_imx7ulp_lpuart(struct lpuart_port *sport) in is_imx7ulp_lpuart() argument
348 return sport->devtype == IMX7ULP_LPUART; in is_imx7ulp_lpuart()
351 static inline bool is_imx8qxp_lpuart(struct lpuart_port *sport) in is_imx8qxp_lpuart() argument
353 return sport->devtype == IMX8QXP_LPUART; in is_imx8qxp_lpuart()
381 static int __lpuart_enable_clks(struct lpuart_port *sport, bool is_en) in __lpuart_enable_clks() argument
386 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
390 ret = clk_prepare_enable(sport->baud_clk); in __lpuart_enable_clks()
392 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
396 clk_disable_unprepare(sport->baud_clk); in __lpuart_enable_clks()
397 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
403 static unsigned int lpuart_get_baud_clk_rate(struct lpuart_port *sport) in lpuart_get_baud_clk_rate() argument
405 if (is_imx8qxp_lpuart(sport)) in lpuart_get_baud_clk_rate()
406 return clk_get_rate(sport->baud_clk); in lpuart_get_baud_clk_rate()
408 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
448 static void lpuart_dma_tx(struct lpuart_port *sport) in lpuart_dma_tx() argument
450 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx()
451 struct scatterlist *sgl = sport->tx_sgl; in lpuart_dma_tx()
452 struct device *dev = sport->port.dev; in lpuart_dma_tx()
453 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx()
456 if (sport->dma_tx_in_progress) in lpuart_dma_tx()
459 sport->dma_tx_bytes = uart_circ_chars_pending(xmit); in lpuart_dma_tx()
462 sport->dma_tx_nents = 1; in lpuart_dma_tx()
463 sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes); in lpuart_dma_tx()
465 sport->dma_tx_nents = 2; in lpuart_dma_tx()
472 ret = dma_map_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
479 sport->dma_tx_desc = dmaengine_prep_slave_sg(chan, sgl, in lpuart_dma_tx()
482 if (!sport->dma_tx_desc) { in lpuart_dma_tx()
483 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
489 sport->dma_tx_desc->callback = lpuart_dma_tx_complete; in lpuart_dma_tx()
490 sport->dma_tx_desc->callback_param = sport; in lpuart_dma_tx()
491 sport->dma_tx_in_progress = true; in lpuart_dma_tx()
492 sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc); in lpuart_dma_tx()
503 struct lpuart_port *sport = arg; in lpuart_dma_tx_complete() local
504 struct scatterlist *sgl = &sport->tx_sgl[0]; in lpuart_dma_tx_complete()
505 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx_complete()
506 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx_complete()
509 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
510 if (!sport->dma_tx_in_progress) { in lpuart_dma_tx_complete()
511 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
515 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx_complete()
518 xmit->tail = (xmit->tail + sport->dma_tx_bytes) & (UART_XMIT_SIZE - 1); in lpuart_dma_tx_complete()
520 sport->port.icount.tx += sport->dma_tx_bytes; in lpuart_dma_tx_complete()
521 sport->dma_tx_in_progress = false; in lpuart_dma_tx_complete()
522 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
525 uart_write_wakeup(&sport->port); in lpuart_dma_tx_complete()
527 if (waitqueue_active(&sport->dma_wait)) { in lpuart_dma_tx_complete()
528 wake_up(&sport->dma_wait); in lpuart_dma_tx_complete()
532 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
534 if (!lpuart_stopped_or_empty(&sport->port)) in lpuart_dma_tx_complete()
535 lpuart_dma_tx(sport); in lpuart_dma_tx_complete()
537 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
540 static dma_addr_t lpuart_dma_datareg_addr(struct lpuart_port *sport) in lpuart_dma_datareg_addr() argument
542 switch (sport->port.iotype) { in lpuart_dma_datareg_addr()
544 return sport->port.mapbase + UARTDATA; in lpuart_dma_datareg_addr()
546 return sport->port.mapbase + UARTDATA + sizeof(u32) - 1; in lpuart_dma_datareg_addr()
548 return sport->port.mapbase + UARTDR; in lpuart_dma_datareg_addr()
553 struct lpuart_port *sport = container_of(port, in lpuart_dma_tx_request() local
558 dma_tx_sconfig.dst_addr = lpuart_dma_datareg_addr(sport); in lpuart_dma_tx_request()
562 ret = dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig); in lpuart_dma_tx_request()
565 dev_err(sport->port.dev, in lpuart_dma_tx_request()
573 static bool lpuart_is_32(struct lpuart_port *sport) in lpuart_is_32() argument
575 return sport->port.iotype == UPIO_MEM32 || in lpuart_is_32()
576 sport->port.iotype == UPIO_MEM32BE; in lpuart_is_32()
581 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_flush_buffer() local
582 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_flush_buffer()
585 if (sport->lpuart_dma_tx_use) { in lpuart_flush_buffer()
586 if (sport->dma_tx_in_progress) { in lpuart_flush_buffer()
587 dma_unmap_sg(chan->device->dev, &sport->tx_sgl[0], in lpuart_flush_buffer()
588 sport->dma_tx_nents, DMA_TO_DEVICE); in lpuart_flush_buffer()
589 sport->dma_tx_in_progress = false; in lpuart_flush_buffer()
594 if (lpuart_is_32(sport)) { in lpuart_flush_buffer()
595 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart_flush_buffer()
597 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart_flush_buffer()
599 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
601 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
623 struct lpuart_port *sport = container_of(port, in lpuart_poll_init() local
628 sport->port.fifosize = 0; in lpuart_poll_init()
630 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_poll_init()
632 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
634 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
637 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
641 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
644 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
645 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
646 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
649 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
650 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
653 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
654 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_poll_init()
677 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_poll_init() local
680 sport->port.fifosize = 0; in lpuart32_poll_init()
682 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_poll_init()
685 lpuart32_write(&sport->port, 0, UARTCTRL); in lpuart32_poll_init()
687 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_poll_init()
690 lpuart32_write(&sport->port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO); in lpuart32_poll_init()
693 lpuart32_write(&sport->port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO); in lpuart32_poll_init()
696 if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) { in lpuart32_poll_init()
697 lpuart32_read(&sport->port, UARTDATA); in lpuart32_poll_init()
698 lpuart32_write(&sport->port, UARTFIFO_RXUF, UARTFIFO); in lpuart32_poll_init()
702 lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL); in lpuart32_poll_init()
703 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_poll_init()
723 static inline void lpuart_transmit_buffer(struct lpuart_port *sport) in lpuart_transmit_buffer() argument
725 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_transmit_buffer()
727 if (sport->port.x_char) { in lpuart_transmit_buffer()
728 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
729 sport->port.icount.tx++; in lpuart_transmit_buffer()
730 sport->port.x_char = 0; in lpuart_transmit_buffer()
734 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart_transmit_buffer()
735 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
740 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
741 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
743 sport->port.icount.tx++; in lpuart_transmit_buffer()
747 uart_write_wakeup(&sport->port); in lpuart_transmit_buffer()
750 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
753 static inline void lpuart32_transmit_buffer(struct lpuart_port *sport) in lpuart32_transmit_buffer() argument
755 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart32_transmit_buffer()
758 if (sport->port.x_char) { in lpuart32_transmit_buffer()
759 lpuart32_write(&sport->port, sport->port.x_char, UARTDATA); in lpuart32_transmit_buffer()
760 sport->port.icount.tx++; in lpuart32_transmit_buffer()
761 sport->port.x_char = 0; in lpuart32_transmit_buffer()
765 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart32_transmit_buffer()
766 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
770 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
773 while (!uart_circ_empty(xmit) && (txcnt < sport->txfifo_size)) { in lpuart32_transmit_buffer()
774 lpuart32_write(&sport->port, xmit->buf[xmit->tail], UARTDATA); in lpuart32_transmit_buffer()
776 sport->port.icount.tx++; in lpuart32_transmit_buffer()
777 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
783 uart_write_wakeup(&sport->port); in lpuart32_transmit_buffer()
786 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
791 struct lpuart_port *sport = container_of(port, in lpuart_start_tx() local
798 if (sport->lpuart_dma_tx_use) { in lpuart_start_tx()
800 lpuart_dma_tx(sport); in lpuart_start_tx()
803 lpuart_transmit_buffer(sport); in lpuart_start_tx()
809 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_start_tx() local
812 if (sport->lpuart_dma_tx_use) { in lpuart32_start_tx()
814 lpuart_dma_tx(sport); in lpuart32_start_tx()
820 lpuart32_transmit_buffer(sport); in lpuart32_start_tx()
827 struct lpuart_port *sport = container_of(port, in lpuart_tx_empty() local
832 if (sport->dma_tx_in_progress) in lpuart_tx_empty()
843 struct lpuart_port *sport = container_of(port, in lpuart32_tx_empty() local
849 if (sport->dma_tx_in_progress) in lpuart32_tx_empty()
863 static void lpuart_txint(struct lpuart_port *sport) in lpuart_txint() argument
865 spin_lock(&sport->port.lock); in lpuart_txint()
866 lpuart_transmit_buffer(sport); in lpuart_txint()
867 spin_unlock(&sport->port.lock); in lpuart_txint()
870 static void lpuart_rxint(struct lpuart_port *sport) in lpuart_rxint() argument
873 struct tty_port *port = &sport->port.state->port; in lpuart_rxint()
876 spin_lock(&sport->port.lock); in lpuart_rxint()
878 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
880 sport->port.icount.rx++; in lpuart_rxint()
885 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
886 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
888 if (uart_prepare_sysrq_char(&sport->port, rx)) in lpuart_rxint()
893 sport->port.icount.parity++; in lpuart_rxint()
895 sport->port.icount.frame++; in lpuart_rxint()
900 if (sr & sport->port.ignore_status_mask) { in lpuart_rxint()
906 sr &= sport->port.read_status_mask; in lpuart_rxint()
916 sport->port.sysrq = 0; in lpuart_rxint()
924 sport->port.icount.overrun += overrun; in lpuart_rxint()
930 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
931 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
934 uart_unlock_and_check_sysrq(&sport->port); in lpuart_rxint()
939 static void lpuart32_txint(struct lpuart_port *sport) in lpuart32_txint() argument
941 spin_lock(&sport->port.lock); in lpuart32_txint()
942 lpuart32_transmit_buffer(sport); in lpuart32_txint()
943 spin_unlock(&sport->port.lock); in lpuart32_txint()
946 static void lpuart32_rxint(struct lpuart_port *sport) in lpuart32_rxint() argument
949 struct tty_port *port = &sport->port.state->port; in lpuart32_rxint()
953 spin_lock(&sport->port.lock); in lpuart32_rxint()
955 while (!(lpuart32_read(&sport->port, UARTFIFO) & UARTFIFO_RXEMPT)) { in lpuart32_rxint()
957 sport->port.icount.rx++; in lpuart32_rxint()
962 sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_rxint()
963 rx = lpuart32_read(&sport->port, UARTDATA); in lpuart32_rxint()
972 if (is_break && uart_handle_break(&sport->port)) in lpuart32_rxint()
975 if (uart_prepare_sysrq_char(&sport->port, rx)) in lpuart32_rxint()
980 sport->port.icount.parity++; in lpuart32_rxint()
983 sport->port.icount.brk++; in lpuart32_rxint()
985 sport->port.icount.frame++; in lpuart32_rxint()
989 sport->port.icount.overrun++; in lpuart32_rxint()
991 if (sr & sport->port.ignore_status_mask) { in lpuart32_rxint()
997 sr &= sport->port.read_status_mask; in lpuart32_rxint()
1016 uart_unlock_and_check_sysrq(&sport->port); in lpuart32_rxint()
1023 struct lpuart_port *sport = dev_id; in lpuart_int() local
1026 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1029 if (sts & UARTSR1_FE && sport->lpuart_dma_rx_use) { in lpuart_int()
1030 readb(sport->port.membase + UARTDR); in lpuart_int()
1031 uart_handle_break(&sport->port); in lpuart_int()
1033 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1037 if (sts & UARTSR1_RDRF && !sport->lpuart_dma_rx_use) in lpuart_int()
1038 lpuart_rxint(sport); in lpuart_int()
1040 if (sts & UARTSR1_TDRE && !sport->lpuart_dma_tx_use) in lpuart_int()
1041 lpuart_txint(sport); in lpuart_int()
1048 struct lpuart_port *sport = dev_id; in lpuart32_int() local
1051 sts = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_int()
1052 rxcount = lpuart32_read(&sport->port, UARTWATER); in lpuart32_int()
1055 if ((sts & UARTSTAT_RDRF || rxcount > 0) && !sport->lpuart_dma_rx_use) in lpuart32_int()
1056 lpuart32_rxint(sport); in lpuart32_int()
1058 if ((sts & UARTSTAT_TDRE) && !sport->lpuart_dma_tx_use) in lpuart32_int()
1059 lpuart32_txint(sport); in lpuart32_int()
1061 lpuart32_write(&sport->port, sts, UARTSTAT); in lpuart32_int()
1076 static void lpuart_handle_sysrq(struct lpuart_port *sport) in lpuart_handle_sysrq() argument
1078 struct circ_buf *ring = &sport->rx_ring; in lpuart_handle_sysrq()
1082 count = sport->rx_sgl.length - ring->tail; in lpuart_handle_sysrq()
1083 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1090 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1096 static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) in lpuart_copy_rx_to_tty() argument
1098 struct tty_port *port = &sport->port.state->port; in lpuart_copy_rx_to_tty()
1101 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_copy_rx_to_tty()
1102 struct circ_buf *ring = &sport->rx_ring; in lpuart_copy_rx_to_tty()
1106 if (lpuart_is_32(sport)) { in lpuart_copy_rx_to_tty()
1107 unsigned long sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart_copy_rx_to_tty()
1111 lpuart32_write(&sport->port, sr, UARTSTAT); in lpuart_copy_rx_to_tty()
1114 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1116 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1119 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1125 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1127 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1130 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1133 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1135 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1145 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1148 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1150 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1154 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1158 async_tx_ack(sport->dma_rx_desc); in lpuart_copy_rx_to_tty()
1160 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1162 dmastat = dmaengine_tx_status(chan, sport->dma_rx_cookie, &state); in lpuart_copy_rx_to_tty()
1164 dev_err(sport->port.dev, "Rx DMA transfer failed!\n"); in lpuart_copy_rx_to_tty()
1165 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1170 dma_sync_sg_for_cpu(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1180 ring->head = sport->rx_sgl.length - state.residue; in lpuart_copy_rx_to_tty()
1181 BUG_ON(ring->head > sport->rx_sgl.length); in lpuart_copy_rx_to_tty()
1186 if (sport->port.sysrq) { in lpuart_copy_rx_to_tty()
1187 lpuart_handle_sysrq(sport); in lpuart_copy_rx_to_tty()
1204 count = sport->rx_sgl.length - ring->tail; in lpuart_copy_rx_to_tty()
1208 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1216 if (ring->head >= sport->rx_sgl.length) in lpuart_copy_rx_to_tty()
1219 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1223 dma_sync_sg_for_device(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1226 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1229 mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); in lpuart_copy_rx_to_tty()
1234 struct lpuart_port *sport = arg; in lpuart_dma_rx_complete() local
1236 lpuart_copy_rx_to_tty(sport); in lpuart_dma_rx_complete()
1241 struct lpuart_port *sport = from_timer(sport, t, lpuart_timer); in lpuart_timer_func() local
1243 lpuart_copy_rx_to_tty(sport); in lpuart_timer_func()
1246 static inline int lpuart_start_rx_dma(struct lpuart_port *sport) in lpuart_start_rx_dma() argument
1249 struct circ_buf *ring = &sport->rx_ring; in lpuart_start_rx_dma()
1252 struct tty_port *port = &sport->port.state->port; in lpuart_start_rx_dma()
1255 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_start_rx_dma()
1267 sport->rx_dma_rng_buf_len = (DMA_RX_TIMEOUT * baud / bits / 1000) * 2; in lpuart_start_rx_dma()
1268 sport->rx_dma_rng_buf_len = (1 << fls(sport->rx_dma_rng_buf_len)); in lpuart_start_rx_dma()
1269 if (sport->rx_dma_rng_buf_len < 16) in lpuart_start_rx_dma()
1270 sport->rx_dma_rng_buf_len = 16; in lpuart_start_rx_dma()
1272 ring->buf = kzalloc(sport->rx_dma_rng_buf_len, GFP_ATOMIC); in lpuart_start_rx_dma()
1276 sg_init_one(&sport->rx_sgl, ring->buf, sport->rx_dma_rng_buf_len); in lpuart_start_rx_dma()
1277 nent = dma_map_sg(chan->device->dev, &sport->rx_sgl, 1, in lpuart_start_rx_dma()
1281 dev_err(sport->port.dev, "DMA Rx mapping error\n"); in lpuart_start_rx_dma()
1285 dma_rx_sconfig.src_addr = lpuart_dma_datareg_addr(sport); in lpuart_start_rx_dma()
1292 dev_err(sport->port.dev, in lpuart_start_rx_dma()
1297 sport->dma_rx_desc = dmaengine_prep_dma_cyclic(chan, in lpuart_start_rx_dma()
1298 sg_dma_address(&sport->rx_sgl), in lpuart_start_rx_dma()
1299 sport->rx_sgl.length, in lpuart_start_rx_dma()
1300 sport->rx_sgl.length / 2, in lpuart_start_rx_dma()
1303 if (!sport->dma_rx_desc) { in lpuart_start_rx_dma()
1304 dev_err(sport->port.dev, "Cannot prepare cyclic DMA\n"); in lpuart_start_rx_dma()
1308 sport->dma_rx_desc->callback = lpuart_dma_rx_complete; in lpuart_start_rx_dma()
1309 sport->dma_rx_desc->callback_param = sport; in lpuart_start_rx_dma()
1310 sport->dma_rx_cookie = dmaengine_submit(sport->dma_rx_desc); in lpuart_start_rx_dma()
1313 if (lpuart_is_32(sport)) { in lpuart_start_rx_dma()
1314 unsigned long temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_start_rx_dma()
1316 lpuart32_write(&sport->port, temp | UARTBAUD_RDMAE, UARTBAUD); in lpuart_start_rx_dma()
1318 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1319 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1327 struct lpuart_port *sport = container_of(port, in lpuart_dma_rx_free() local
1329 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_dma_rx_free()
1332 del_timer_sync(&sport->lpuart_timer); in lpuart_dma_rx_free()
1333 dma_unmap_sg(chan->device->dev, &sport->rx_sgl, 1, DMA_FROM_DEVICE); in lpuart_dma_rx_free()
1334 kfree(sport->rx_ring.buf); in lpuart_dma_rx_free()
1335 sport->rx_ring.tail = 0; in lpuart_dma_rx_free()
1336 sport->rx_ring.head = 0; in lpuart_dma_rx_free()
1337 sport->dma_rx_desc = NULL; in lpuart_dma_rx_free()
1338 sport->dma_rx_cookie = -EINVAL; in lpuart_dma_rx_free()
1344 struct lpuart_port *sport = container_of(port, in lpuart_config_rs485() local
1347 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1349 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1386 sport->port.rs485 = *rs485; in lpuart_config_rs485()
1388 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1395 struct lpuart_port *sport = container_of(port, in lpuart32_config_rs485() local
1398 unsigned long modem = lpuart32_read(&sport->port, UARTMODIR) in lpuart32_config_rs485()
1400 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1437 sport->port.rs485 = *rs485; in lpuart32_config_rs485()
1439 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1541 static void lpuart_setup_watermark(struct lpuart_port *sport) in lpuart_setup_watermark() argument
1546 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1550 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1552 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1554 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1558 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1561 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1562 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1563 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1566 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1567 writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1570 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1573 static void lpuart_setup_watermark_enable(struct lpuart_port *sport) in lpuart_setup_watermark_enable() argument
1577 lpuart_setup_watermark(sport); in lpuart_setup_watermark_enable()
1579 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1581 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1584 static void lpuart32_setup_watermark(struct lpuart_port *sport) in lpuart32_setup_watermark() argument
1589 ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark()
1593 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_setup_watermark()
1596 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_setup_watermark()
1599 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart32_setup_watermark()
1602 val = (sport->rx_watermark << UARTWATER_RXWATER_OFF) | in lpuart32_setup_watermark()
1604 lpuart32_write(&sport->port, val, UARTWATER); in lpuart32_setup_watermark()
1607 lpuart32_write(&sport->port, ctrl_saved, UARTCTRL); in lpuart32_setup_watermark()
1610 static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) in lpuart32_setup_watermark_enable() argument
1614 lpuart32_setup_watermark(sport); in lpuart32_setup_watermark_enable()
1616 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark_enable()
1618 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_setup_watermark_enable()
1621 static void rx_dma_timer_init(struct lpuart_port *sport) in rx_dma_timer_init() argument
1623 timer_setup(&sport->lpuart_timer, lpuart_timer_func, 0); in rx_dma_timer_init()
1624 sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout; in rx_dma_timer_init()
1625 add_timer(&sport->lpuart_timer); in rx_dma_timer_init()
1628 static void lpuart_request_dma(struct lpuart_port *sport) in lpuart_request_dma() argument
1630 sport->dma_tx_chan = dma_request_chan(sport->port.dev, "tx"); in lpuart_request_dma()
1631 if (IS_ERR(sport->dma_tx_chan)) { in lpuart_request_dma()
1632 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1634 PTR_ERR(sport->dma_tx_chan)); in lpuart_request_dma()
1635 sport->dma_tx_chan = NULL; in lpuart_request_dma()
1638 sport->dma_rx_chan = dma_request_chan(sport->port.dev, "rx"); in lpuart_request_dma()
1639 if (IS_ERR(sport->dma_rx_chan)) { in lpuart_request_dma()
1640 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1642 PTR_ERR(sport->dma_rx_chan)); in lpuart_request_dma()
1643 sport->dma_rx_chan = NULL; in lpuart_request_dma()
1647 static void lpuart_tx_dma_startup(struct lpuart_port *sport) in lpuart_tx_dma_startup() argument
1652 if (uart_console(&sport->port)) in lpuart_tx_dma_startup()
1655 if (!sport->dma_tx_chan) in lpuart_tx_dma_startup()
1658 ret = lpuart_dma_tx_request(&sport->port); in lpuart_tx_dma_startup()
1662 init_waitqueue_head(&sport->dma_wait); in lpuart_tx_dma_startup()
1663 sport->lpuart_dma_tx_use = true; in lpuart_tx_dma_startup()
1664 if (lpuart_is_32(sport)) { in lpuart_tx_dma_startup()
1665 uartbaud = lpuart32_read(&sport->port, UARTBAUD); in lpuart_tx_dma_startup()
1666 lpuart32_write(&sport->port, in lpuart_tx_dma_startup()
1669 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1670 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1676 sport->lpuart_dma_tx_use = false; in lpuart_tx_dma_startup()
1679 static void lpuart_rx_dma_startup(struct lpuart_port *sport) in lpuart_rx_dma_startup() argument
1684 if (uart_console(&sport->port)) in lpuart_rx_dma_startup()
1687 if (!sport->dma_rx_chan) in lpuart_rx_dma_startup()
1690 ret = lpuart_start_rx_dma(sport); in lpuart_rx_dma_startup()
1695 sport->dma_rx_timeout = msecs_to_jiffies(DMA_RX_TIMEOUT); in lpuart_rx_dma_startup()
1696 if (!sport->dma_rx_timeout) in lpuart_rx_dma_startup()
1697 sport->dma_rx_timeout = 1; in lpuart_rx_dma_startup()
1699 sport->lpuart_dma_rx_use = true; in lpuart_rx_dma_startup()
1700 rx_dma_timer_init(sport); in lpuart_rx_dma_startup()
1702 if (sport->port.has_sysrq && !lpuart_is_32(sport)) { in lpuart_rx_dma_startup()
1703 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1705 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1711 sport->lpuart_dma_rx_use = false; in lpuart_rx_dma_startup()
1716 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_startup() local
1721 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1723 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_TXSIZE_OFF) & in lpuart_startup()
1725 sport->port.fifosize = sport->txfifo_size; in lpuart_startup()
1727 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_RXSIZE_OFF) & in lpuart_startup()
1730 lpuart_request_dma(sport); in lpuart_startup()
1732 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_startup()
1734 lpuart_setup_watermark_enable(sport); in lpuart_startup()
1736 lpuart_rx_dma_startup(sport); in lpuart_startup()
1737 lpuart_tx_dma_startup(sport); in lpuart_startup()
1739 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_startup()
1744 static void lpuart32_configure(struct lpuart_port *sport) in lpuart32_configure() argument
1748 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_configure()
1749 if (!sport->lpuart_dma_rx_use) in lpuart32_configure()
1751 if (!sport->lpuart_dma_tx_use) in lpuart32_configure()
1753 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_configure()
1758 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_startup() local
1763 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_startup()
1765 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_TXSIZE_OFF) & in lpuart32_startup()
1767 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1769 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_RXSIZE_OFF) & in lpuart32_startup()
1777 if (is_layerscape_lpuart(sport)) { in lpuart32_startup()
1778 sport->rxfifo_size = 16; in lpuart32_startup()
1779 sport->txfifo_size = 16; in lpuart32_startup()
1780 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1783 lpuart_request_dma(sport); in lpuart32_startup()
1785 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_startup()
1787 lpuart32_setup_watermark_enable(sport); in lpuart32_startup()
1789 lpuart_rx_dma_startup(sport); in lpuart32_startup()
1790 lpuart_tx_dma_startup(sport); in lpuart32_startup()
1792 lpuart32_configure(sport); in lpuart32_startup()
1794 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_startup()
1798 static void lpuart_dma_shutdown(struct lpuart_port *sport) in lpuart_dma_shutdown() argument
1800 if (sport->lpuart_dma_rx_use) { in lpuart_dma_shutdown()
1801 lpuart_dma_rx_free(&sport->port); in lpuart_dma_shutdown()
1802 sport->lpuart_dma_rx_use = false; in lpuart_dma_shutdown()
1805 if (sport->lpuart_dma_tx_use) { in lpuart_dma_shutdown()
1806 if (wait_event_interruptible(sport->dma_wait, in lpuart_dma_shutdown()
1807 !sport->dma_tx_in_progress) != false) { in lpuart_dma_shutdown()
1808 sport->dma_tx_in_progress = false; in lpuart_dma_shutdown()
1809 dmaengine_terminate_sync(sport->dma_tx_chan); in lpuart_dma_shutdown()
1811 sport->lpuart_dma_tx_use = false; in lpuart_dma_shutdown()
1814 if (sport->dma_tx_chan) in lpuart_dma_shutdown()
1815 dma_release_channel(sport->dma_tx_chan); in lpuart_dma_shutdown()
1816 if (sport->dma_rx_chan) in lpuart_dma_shutdown()
1817 dma_release_channel(sport->dma_rx_chan); in lpuart_dma_shutdown()
1822 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_shutdown() local
1836 lpuart_dma_shutdown(sport); in lpuart_shutdown()
1841 struct lpuart_port *sport = in lpuart32_shutdown() local
1849 temp = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_shutdown()
1850 lpuart32_write(&sport->port, temp, UARTSTAT); in lpuart32_shutdown()
1865 lpuart_dma_shutdown(sport); in lpuart32_shutdown()
1872 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_set_termios() local
1879 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1880 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1881 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1882 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1883 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1884 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1916 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart_set_termios()
1960 if (old && sport->lpuart_dma_rx_use) in lpuart_set_termios()
1961 lpuart_dma_rx_free(&sport->port); in lpuart_set_termios()
1963 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_set_termios()
1965 sport->port.read_status_mask = 0; in lpuart_set_termios()
1967 sport->port.read_status_mask |= UARTSR1_FE | UARTSR1_PE; in lpuart_set_termios()
1969 sport->port.read_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1972 sport->port.ignore_status_mask = 0; in lpuart_set_termios()
1974 sport->port.ignore_status_mask |= UARTSR1_PE; in lpuart_set_termios()
1976 sport->port.ignore_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1982 sport->port.ignore_status_mask |= UARTSR1_OR; in lpuart_set_termios()
1989 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_set_termios()
1993 sport->port.membase + UARTCR2); in lpuart_set_termios()
1995 sbr = sport->port.uartclk / (16 * baud); in lpuart_set_termios()
1996 brfa = ((sport->port.uartclk - (16 * sbr * baud)) * 2) / baud; in lpuart_set_termios()
2001 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
2002 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
2003 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
2004 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
2005 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
2006 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
2009 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2011 if (old && sport->lpuart_dma_rx_use) { in lpuart_set_termios()
2012 if (!lpuart_start_rx_dma(sport)) in lpuart_set_termios()
2013 rx_dma_timer_init(sport); in lpuart_set_termios()
2015 sport->lpuart_dma_rx_use = false; in lpuart_set_termios()
2018 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_set_termios()
2097 static void lpuart32_serial_setbrg(struct lpuart_port *sport, in lpuart32_serial_setbrg() argument
2100 __lpuart32_serial_setbrg(&sport->port, baudrate, in lpuart32_serial_setbrg()
2101 sport->lpuart_dma_rx_use, in lpuart32_serial_setbrg()
2102 sport->lpuart_dma_tx_use); in lpuart32_serial_setbrg()
2110 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_set_termios() local
2116 ctrl = old_ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_set_termios()
2117 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart32_set_termios()
2118 modem = lpuart32_read(&sport->port, UARTMODIR); in lpuart32_set_termios()
2150 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart32_set_termios()
2196 if (old && sport->lpuart_dma_rx_use) in lpuart32_set_termios()
2197 lpuart_dma_rx_free(&sport->port); in lpuart32_set_termios()
2199 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_set_termios()
2201 sport->port.read_status_mask = 0; in lpuart32_set_termios()
2203 sport->port.read_status_mask |= UARTSTAT_FE | UARTSTAT_PE; in lpuart32_set_termios()
2205 sport->port.read_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2208 sport->port.ignore_status_mask = 0; in lpuart32_set_termios()
2210 sport->port.ignore_status_mask |= UARTSTAT_PE; in lpuart32_set_termios()
2212 sport->port.ignore_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2218 sport->port.ignore_status_mask |= UARTSTAT_OR; in lpuart32_set_termios()
2230 lpuart32_write(&sport->port, 0, UARTMODIR); in lpuart32_set_termios()
2231 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_set_termios()
2235 lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE), in lpuart32_set_termios()
2238 lpuart32_write(&sport->port, bd, UARTBAUD); in lpuart32_set_termios()
2239 lpuart32_serial_setbrg(sport, baud); in lpuart32_set_termios()
2240 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_set_termios()
2241 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_set_termios()
2244 if (old && sport->lpuart_dma_rx_use) { in lpuart32_set_termios()
2245 if (!lpuart_start_rx_dma(sport)) in lpuart32_set_termios()
2246 rx_dma_timer_init(sport); in lpuart32_set_termios()
2248 sport->lpuart_dma_rx_use = false; in lpuart32_set_termios()
2251 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_set_termios()
2361 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart_console_write() local
2367 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2369 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2372 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2375 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2377 uart_console_write(&sport->port, s, count, lpuart_console_putchar); in lpuart_console_write()
2380 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_console_write()
2382 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2385 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_console_write()
2391 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart32_console_write() local
2397 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2399 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2402 cr = old_cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_write()
2405 lpuart32_write(&sport->port, cr, UARTCTRL); in lpuart32_console_write()
2407 uart_console_write(&sport->port, s, count, lpuart32_console_putchar); in lpuart32_console_write()
2410 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_console_write()
2412 lpuart32_write(&sport->port, old_cr, UARTCTRL); in lpuart32_console_write()
2415 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_console_write()
2423 lpuart_console_get_options(struct lpuart_port *sport, int *baud, in lpuart_console_get_options() argument
2429 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2436 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2451 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2453 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2457 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2460 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_console_get_options()
2467 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart_console_get_options()
2472 lpuart32_console_get_options(struct lpuart_port *sport, int *baud, in lpuart32_console_get_options() argument
2478 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2485 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2500 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart32_console_get_options()
2506 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart32_console_get_options()
2513 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart32_console_get_options()
2519 struct lpuart_port *sport; in lpuart_console_setup() local
2533 sport = lpuart_ports[co->index]; in lpuart_console_setup()
2534 if (sport == NULL) in lpuart_console_setup()
2540 if (lpuart_is_32(sport)) in lpuart_console_setup()
2541 lpuart32_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2543 lpuart_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2545 if (lpuart_is_32(sport)) in lpuart_console_setup()
2546 lpuart32_setup_watermark(sport); in lpuart_console_setup()
2548 lpuart_setup_watermark(sport); in lpuart_console_setup()
2550 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in lpuart_console_setup()
2677 static int lpuart_global_reset(struct lpuart_port *sport) in lpuart_global_reset() argument
2679 struct uart_port *port = &sport->port; in lpuart_global_reset()
2685 ret = clk_prepare_enable(sport->ipg_clk); in lpuart_global_reset()
2687 dev_err(sport->port.dev, "failed to enable uart ipg clk: %d\n", ret); in lpuart_global_reset()
2691 if (is_imx7ulp_lpuart(sport) || is_imx8qxp_lpuart(sport)) { in lpuart_global_reset()
2698 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart_global_reset()
2701 dev_warn(sport->port.dev, in lpuart_global_reset()
2703 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2721 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2729 struct lpuart_port *sport; in lpuart_probe() local
2734 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in lpuart_probe()
2735 if (!sport) in lpuart_probe()
2739 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2740 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2741 return PTR_ERR(sport->port.membase); in lpuart_probe()
2743 sport->port.membase += sdata->reg_off; in lpuart_probe()
2744 sport->port.mapbase = res->start + sdata->reg_off; in lpuart_probe()
2745 sport->port.dev = &pdev->dev; in lpuart_probe()
2746 sport->port.type = PORT_LPUART; in lpuart_probe()
2747 sport->devtype = sdata->devtype; in lpuart_probe()
2748 sport->rx_watermark = sdata->rx_watermark; in lpuart_probe()
2752 sport->port.irq = ret; in lpuart_probe()
2753 sport->port.iotype = sdata->iotype; in lpuart_probe()
2754 if (lpuart_is_32(sport)) in lpuart_probe()
2755 sport->port.ops = &lpuart32_pops; in lpuart_probe()
2757 sport->port.ops = &lpuart_pops; in lpuart_probe()
2758 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LPUART_CONSOLE); in lpuart_probe()
2759 sport->port.flags = UPF_BOOT_AUTOCONF; in lpuart_probe()
2761 if (lpuart_is_32(sport)) in lpuart_probe()
2762 sport->port.rs485_config = lpuart32_config_rs485; in lpuart_probe()
2764 sport->port.rs485_config = lpuart_config_rs485; in lpuart_probe()
2765 sport->port.rs485_supported = &lpuart_rs485_supported; in lpuart_probe()
2767 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2768 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
2769 ret = PTR_ERR(sport->ipg_clk); in lpuart_probe()
2774 sport->baud_clk = NULL; in lpuart_probe()
2775 if (is_imx8qxp_lpuart(sport)) { in lpuart_probe()
2776 sport->baud_clk = devm_clk_get(&pdev->dev, "baud"); in lpuart_probe()
2777 if (IS_ERR(sport->baud_clk)) { in lpuart_probe()
2778 ret = PTR_ERR(sport->baud_clk); in lpuart_probe()
2793 sport->port.line = ret; in lpuart_probe()
2795 ret = lpuart_enable_clks(sport); in lpuart_probe()
2798 sport->port.uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_probe()
2800 lpuart_ports[sport->port.line] = sport; in lpuart_probe()
2802 platform_set_drvdata(pdev, &sport->port); in lpuart_probe()
2804 if (lpuart_is_32(sport)) { in lpuart_probe()
2812 ret = lpuart_global_reset(sport); in lpuart_probe()
2816 ret = uart_get_rs485_mode(&sport->port); in lpuart_probe()
2820 if (sport->port.rs485.flags & SER_RS485_RX_DURING_TX) in lpuart_probe()
2823 if (sport->port.rs485.delay_rts_before_send || in lpuart_probe()
2824 sport->port.rs485.delay_rts_after_send) in lpuart_probe()
2827 ret = uart_add_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
2831 ret = devm_request_irq(&pdev->dev, sport->port.irq, handler, 0, in lpuart_probe()
2832 DRIVER_NAME, sport); in lpuart_probe()
2839 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
2843 lpuart_disable_clks(sport); in lpuart_probe()
2849 struct lpuart_port *sport = platform_get_drvdata(pdev); in lpuart_remove() local
2851 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_remove()
2853 lpuart_disable_clks(sport); in lpuart_remove()
2855 if (sport->dma_tx_chan) in lpuart_remove()
2856 dma_release_channel(sport->dma_tx_chan); in lpuart_remove()
2858 if (sport->dma_rx_chan) in lpuart_remove()
2859 dma_release_channel(sport->dma_rx_chan); in lpuart_remove()
2866 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_suspend() local
2870 if (lpuart_is_32(sport)) { in lpuart_suspend()
2872 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart_suspend()
2874 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart_suspend()
2877 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2879 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2882 uart_suspend_port(&lpuart_reg, &sport->port); in lpuart_suspend()
2885 irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_suspend()
2887 if (sport->lpuart_dma_rx_use) { in lpuart_suspend()
2896 lpuart_dma_rx_free(&sport->port); in lpuart_suspend()
2900 if (lpuart_is_32(sport)) { in lpuart_suspend()
2901 temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_suspend()
2902 lpuart32_write(&sport->port, temp & ~UARTBAUD_RDMAE, in lpuart_suspend()
2905 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2906 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
2910 if (sport->lpuart_dma_tx_use) { in lpuart_suspend()
2911 sport->dma_tx_in_progress = false; in lpuart_suspend()
2912 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_suspend()
2915 if (sport->port.suspended && !irq_wake) in lpuart_suspend()
2916 lpuart_disable_clks(sport); in lpuart_suspend()
2923 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_resume() local
2924 bool irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_resume()
2926 if (sport->port.suspended && !irq_wake) in lpuart_resume()
2927 lpuart_enable_clks(sport); in lpuart_resume()
2929 if (lpuart_is_32(sport)) in lpuart_resume()
2930 lpuart32_setup_watermark_enable(sport); in lpuart_resume()
2932 lpuart_setup_watermark_enable(sport); in lpuart_resume()
2934 if (sport->lpuart_dma_rx_use) { in lpuart_resume()
2936 if (!lpuart_start_rx_dma(sport)) in lpuart_resume()
2937 rx_dma_timer_init(sport); in lpuart_resume()
2939 sport->lpuart_dma_rx_use = false; in lpuart_resume()
2943 lpuart_tx_dma_startup(sport); in lpuart_resume()
2945 if (lpuart_is_32(sport)) in lpuart_resume()
2946 lpuart32_configure(sport); in lpuart_resume()
2948 uart_resume_port(&lpuart_reg, &sport->port); in lpuart_resume()