111 static void stm32_usart_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,  in stm32_usart_config_reg_rs485()  argument
118 	*cr3 |= USART_CR3_DEM;  in stm32_usart_config_reg_rs485()
154 	u32 usartdiv, baud, cr1, cr3;  in stm32_usart_config_rs485()  local
165 		cr3 = readl_relaxed(port->membase + ofs->cr3);  in stm32_usart_config_rs485()
175 		stm32_usart_config_reg_rs485(&cr1, &cr3,  in stm32_usart_config_rs485()
181 			cr3 &= ~USART_CR3_DEP;  in stm32_usart_config_rs485()
184 			cr3 |= USART_CR3_DEP;  in stm32_usart_config_rs485()
188 		writel_relaxed(cr3, port->membase + ofs->cr3);  in stm32_usart_config_rs485()
191 		stm32_usart_clr_bits(port, ofs->cr3,  in stm32_usart_config_rs485()
352 	stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_tx_dma_complete()
371 		stm32_usart_set_bits(port, ofs->cr3, USART_CR3_TXFTIE);  in stm32_usart_tx_interrupt_enable()
390 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE);  in stm32_usart_tx_interrupt_disable()
410 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_transmit_chars_pio()
485 	stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_transmit_chars_dma()
514 			stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_transmit_chars()
529 			stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_transmit_chars()
586 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE);  in stm32_usart_interrupt()
622 		stm32_usart_set_bits(port, ofs->cr3, USART_CR3_RTSE);  in stm32_usart_set_mctrl()
624 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_RTSE);  in stm32_usart_set_mctrl()
681 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_flush_buffer()
696 		stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq);  in stm32_usart_throttle()
711 		stm32_usart_set_bits(port, ofs->cr3, stm32_port->cr3_irq);  in stm32_usart_unthrottle()
724 		stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq);  in stm32_usart_stop_rx()
775 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_shutdown()
816 	u32 cr1, cr2, cr3, isr;  in stm32_usart_set_termios()  local
850 	cr3 = readl_relaxed(port->membase + ofs->cr3);  in stm32_usart_set_termios()
851 	cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTIE;  in stm32_usart_set_termios()
854 			cr3 |= stm32_port->txftcfg << USART_CR3_TXFTCFG_SHIFT;  in stm32_usart_set_termios()
856 			cr3 |= stm32_port->rxftcfg << USART_CR3_RXFTCFG_SHIFT;  in stm32_usart_set_termios()
912 	cr3 |= stm32_port->cr3_irq;  in stm32_usart_set_termios()
920 		cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;  in stm32_usart_set_termios()
972 		cr3 |= USART_CR3_DMAR;  in stm32_usart_set_termios()
975 		stm32_usart_config_reg_rs485(&cr1, &cr3,  in stm32_usart_set_termios()
980 			cr3 &= ~USART_CR3_DEP;  in stm32_usart_set_termios()
983 			cr3 |= USART_CR3_DEP;  in stm32_usart_set_termios()
988 		cr3 &= ~(USART_CR3_DEM | USART_CR3_DEP);  in stm32_usart_set_termios()
994 		cr3 &= ~USART_CR3_WUS_MASK;  in stm32_usart_set_termios()
995 		cr3 |= USART_CR3_WUS_START_BIT;  in stm32_usart_set_termios()
998 	writel_relaxed(cr3, port->membase + ofs->cr3);  in stm32_usart_set_termios()
1477 	stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR);  in stm32_usart_serial_remove()
1490 	stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);  in stm32_usart_serial_remove()
1613 		stm32_usart_set_bits(port, ofs->cr3, USART_CR3_WUFIE);  in stm32_usart_serial_en_wakeup()
1616 		stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE);  in stm32_usart_serial_en_wakeup()