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1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4	bool "Hardware crypto devices"
5	default y
6	help
7	  Say Y here to get to see options for hardware crypto devices and
8	  processors. This option alone does not add any kernel code.
9
10	  If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17	tristate "Support for VIA PadLock ACE"
18	depends on X86 && !UML
19	help
20	  Some VIA processors come with an integrated crypto engine
21	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
22	  that provides instructions for very fast cryptographic
23	  operations with supported algorithms.
24
25	  The instructions are used only when the CPU supports them.
26	  Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29	tristate "PadLock driver for AES algorithm"
30	depends on CRYPTO_DEV_PADLOCK
31	select CRYPTO_SKCIPHER
32	select CRYPTO_LIB_AES
33	help
34	  Use VIA PadLock for AES algorithm.
35
36	  Available in VIA C3 and newer CPUs.
37
38	  If unsure say M. The compiled module will be
39	  called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42	tristate "PadLock driver for SHA1 and SHA256 algorithms"
43	depends on CRYPTO_DEV_PADLOCK
44	select CRYPTO_HASH
45	select CRYPTO_SHA1
46	select CRYPTO_SHA256
47	help
48	  Use VIA PadLock for SHA1/SHA256 algorithms.
49
50	  Available in VIA C7 and newer processors.
51
52	  If unsure say M. The compiled module will be
53	  called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56	tristate "Support for the Geode LX AES engine"
57	depends on X86_32 && PCI
58	select CRYPTO_ALGAPI
59	select CRYPTO_SKCIPHER
60	help
61	  Say 'Y' here to use the AMD Geode LX processor on-board AES
62	  engine for the CryptoAPI AES algorithm.
63
64	  To compile this driver as a module, choose M here: the module
65	  will be called geode-aes.
66
67config ZCRYPT
68	tristate "Support for s390 cryptographic adapters"
69	depends on S390
70	select HW_RANDOM
71	help
72	  Select this option if you want to enable support for
73	  s390 cryptographic adapters like:
74	  + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75	  + Crypto Express 2 up to 7 Accelerator (CEXxA)
76	  + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
77
78config ZCRYPT_DEBUG
79	bool "Enable debug features for s390 cryptographic adapters"
80	default n
81	depends on DEBUG_KERNEL
82	depends on ZCRYPT
83	help
84	  Say 'Y' here to enable some additional debug features on the
85	  s390 cryptographic adapters driver.
86
87	  There will be some more sysfs attributes displayed for ap cards
88	  and queues and some flags on crypto requests are interpreted as
89	  debugging messages to force error injection.
90
91	  Do not enable on production level kernel build.
92
93	  If unsure, say N.
94
95config ZCRYPT_MULTIDEVNODES
96	bool "Support for multiple zcrypt device nodes"
97	default y
98	depends on S390
99	depends on ZCRYPT
100	help
101	  With this option enabled the zcrypt device driver can
102	  provide multiple devices nodes in /dev. Each device
103	  node can get customized to limit access and narrow
104	  down the use of the available crypto hardware.
105
106config PKEY
107	tristate "Kernel API for protected key handling"
108	depends on S390
109	depends on ZCRYPT
110	help
111	  With this option enabled the pkey kernel module provides an API
112	  for creation and handling of protected keys. Other parts of the
113	  kernel or userspace applications may use these functions.
114
115	  Select this option if you want to enable the kernel and userspace
116	  API for proteced key handling.
117
118	  Please note that creation of protected keys from secure keys
119	  requires to have at least one CEX card in coprocessor mode
120	  available at runtime.
121
122config CRYPTO_PAES_S390
123	tristate "PAES cipher algorithms"
124	depends on S390
125	depends on ZCRYPT
126	depends on PKEY
127	select CRYPTO_ALGAPI
128	select CRYPTO_SKCIPHER
129	help
130	  This is the s390 hardware accelerated implementation of the
131	  AES cipher algorithms for use with protected key.
132
133	  Select this option if you want to use the paes cipher
134	  for example to use protected key encrypted devices.
135
136config CRYPTO_SHA1_S390
137	tristate "SHA1 digest algorithm"
138	depends on S390
139	select CRYPTO_HASH
140	help
141	  This is the s390 hardware accelerated implementation of the
142	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
143
144	  It is available as of z990.
145
146config CRYPTO_SHA256_S390
147	tristate "SHA256 digest algorithm"
148	depends on S390
149	select CRYPTO_HASH
150	help
151	  This is the s390 hardware accelerated implementation of the
152	  SHA256 secure hash standard (DFIPS 180-2).
153
154	  It is available as of z9.
155
156config CRYPTO_SHA512_S390
157	tristate "SHA384 and SHA512 digest algorithm"
158	depends on S390
159	select CRYPTO_HASH
160	help
161	  This is the s390 hardware accelerated implementation of the
162	  SHA512 secure hash standard.
163
164	  It is available as of z10.
165
166config CRYPTO_SHA3_256_S390
167	tristate "SHA3_224 and SHA3_256 digest algorithm"
168	depends on S390
169	select CRYPTO_HASH
170	help
171	  This is the s390 hardware accelerated implementation of the
172	  SHA3_256 secure hash standard.
173
174	  It is available as of z14.
175
176config CRYPTO_SHA3_512_S390
177	tristate "SHA3_384 and SHA3_512 digest algorithm"
178	depends on S390
179	select CRYPTO_HASH
180	help
181	  This is the s390 hardware accelerated implementation of the
182	  SHA3_512 secure hash standard.
183
184	  It is available as of z14.
185
186config CRYPTO_DES_S390
187	tristate "DES and Triple DES cipher algorithms"
188	depends on S390
189	select CRYPTO_ALGAPI
190	select CRYPTO_SKCIPHER
191	select CRYPTO_LIB_DES
192	help
193	  This is the s390 hardware accelerated implementation of the
194	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
195
196	  As of z990 the ECB and CBC mode are hardware accelerated.
197	  As of z196 the CTR mode is hardware accelerated.
198
199config CRYPTO_AES_S390
200	tristate "AES cipher algorithms"
201	depends on S390
202	select CRYPTO_ALGAPI
203	select CRYPTO_SKCIPHER
204	help
205	  This is the s390 hardware accelerated implementation of the
206	  AES cipher algorithms (FIPS-197).
207
208	  As of z9 the ECB and CBC modes are hardware accelerated
209	  for 128 bit keys.
210	  As of z10 the ECB and CBC modes are hardware accelerated
211	  for all AES key sizes.
212	  As of z196 the CTR mode is hardware accelerated for all AES
213	  key sizes and XTS mode is hardware accelerated for 256 and
214	  512 bit keys.
215
216config S390_PRNG
217	tristate "Pseudo random number generator device driver"
218	depends on S390
219	default "m"
220	help
221	  Select this option if you want to use the s390 pseudo random number
222	  generator. The PRNG is part of the cryptographic processor functions
223	  and uses triple-DES to generate secure random numbers like the
224	  ANSI X9.17 standard. User-space programs access the
225	  pseudo-random-number device through the char device /dev/prandom.
226
227	  It is available as of z9.
228
229config CRYPTO_GHASH_S390
230	tristate "GHASH hash function"
231	depends on S390
232	select CRYPTO_HASH
233	help
234	  This is the s390 hardware accelerated implementation of GHASH,
235	  the hash function used in GCM (Galois/Counter mode).
236
237	  It is available as of z196.
238
239config CRYPTO_CRC32_S390
240	tristate "CRC-32 algorithms"
241	depends on S390
242	select CRYPTO_HASH
243	select CRC32
244	help
245	  Select this option if you want to use hardware accelerated
246	  implementations of CRC algorithms.  With this option, you
247	  can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248	  and CRC-32C (Castagnoli).
249
250	  It is available with IBM z13 or later.
251
252config CRYPTO_DEV_NIAGARA2
253	tristate "Niagara2 Stream Processing Unit driver"
254	select CRYPTO_LIB_DES
255	select CRYPTO_SKCIPHER
256	select CRYPTO_HASH
257	select CRYPTO_MD5
258	select CRYPTO_SHA1
259	select CRYPTO_SHA256
260	depends on SPARC64
261	help
262	  Each core of a Niagara2 processor contains a Stream
263	  Processing Unit, which itself contains several cryptographic
264	  sub-units.  One set provides the Modular Arithmetic Unit,
265	  used for SSL offload.  The other set provides the Cipher
266	  Group, which can perform encryption, decryption, hashing,
267	  checksumming, and raw copies.
268
269config CRYPTO_DEV_SL3516
270	tristate "Storlink SL3516 crypto offloader"
271	depends on ARCH_GEMINI || COMPILE_TEST
272	depends on HAS_IOMEM && PM
273	select CRYPTO_SKCIPHER
274	select CRYPTO_ENGINE
275	select CRYPTO_ECB
276	select CRYPTO_AES
277	select HW_RANDOM
278	help
279	  This option allows you to have support for SL3516 crypto offloader.
280
281config CRYPTO_DEV_SL3516_DEBUG
282	bool "Enable SL3516 stats"
283	depends on CRYPTO_DEV_SL3516
284	depends on DEBUG_FS
285	help
286	  Say y to enable SL3516 debug stats.
287	  This will create /sys/kernel/debug/sl3516/stats for displaying
288	  the number of requests per algorithm and other internal stats.
289
290config CRYPTO_DEV_HIFN_795X
291	tristate "Driver HIFN 795x crypto accelerator chips"
292	select CRYPTO_LIB_DES
293	select CRYPTO_SKCIPHER
294	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
295	depends on PCI
296	depends on !ARCH_DMA_ADDR_T_64BIT
297	help
298	  This option allows you to have support for HIFN 795x crypto adapters.
299
300config CRYPTO_DEV_HIFN_795X_RNG
301	bool "HIFN 795x random number generator"
302	depends on CRYPTO_DEV_HIFN_795X
303	help
304	  Select this option if you want to enable the random number generator
305	  on the HIFN 795x crypto adapters.
306
307source "drivers/crypto/caam/Kconfig"
308
309config CRYPTO_DEV_TALITOS
310	tristate "Talitos Freescale Security Engine (SEC)"
311	select CRYPTO_AEAD
312	select CRYPTO_AUTHENC
313	select CRYPTO_SKCIPHER
314	select CRYPTO_HASH
315	select CRYPTO_LIB_DES
316	select HW_RANDOM
317	depends on FSL_SOC
318	help
319	  Say 'Y' here to use the Freescale Security Engine (SEC)
320	  to offload cryptographic algorithm computation.
321
322	  The Freescale SEC is present on PowerQUICC 'E' processors, such
323	  as the MPC8349E and MPC8548E.
324
325	  To compile this driver as a module, choose M here: the module
326	  will be called talitos.
327
328config CRYPTO_DEV_TALITOS1
329	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
330	depends on CRYPTO_DEV_TALITOS
331	depends on PPC_8xx || PPC_82xx
332	default y
333	help
334	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
335	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
336	  version 1.2 found on MPC8xx
337
338config CRYPTO_DEV_TALITOS2
339	bool "SEC2+ (SEC version 2.0 or upper)"
340	depends on CRYPTO_DEV_TALITOS
341	default y if !PPC_8xx
342	help
343	  Say 'Y' here to use the Freescale Security Engine (SEC)
344	  version 2 and following as found on MPC83xx, MPC85xx, etc ...
345
346config CRYPTO_DEV_IXP4XX
347	tristate "Driver for IXP4xx crypto hardware acceleration"
348	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
349	select CRYPTO_AES
350	select CRYPTO_DES
351	select CRYPTO_ECB
352	select CRYPTO_CBC
353	select CRYPTO_CTR
354	select CRYPTO_LIB_DES
355	select CRYPTO_AEAD
356	select CRYPTO_AUTHENC
357	select CRYPTO_SKCIPHER
358	help
359	  Driver for the IXP4xx NPE crypto engine.
360
361config CRYPTO_DEV_PPC4XX
362	tristate "Driver AMCC PPC4xx crypto accelerator"
363	depends on PPC && 4xx
364	select CRYPTO_HASH
365	select CRYPTO_AEAD
366	select CRYPTO_AES
367	select CRYPTO_LIB_AES
368	select CRYPTO_CCM
369	select CRYPTO_CTR
370	select CRYPTO_GCM
371	select CRYPTO_SKCIPHER
372	help
373	  This option allows you to have support for AMCC crypto acceleration.
374
375config HW_RANDOM_PPC4XX
376	bool "PowerPC 4xx generic true random number generator support"
377	depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
378	default y
379	help
380	 This option provides the kernel-side support for the TRNG hardware
381	 found in the security function of some PowerPC 4xx SoCs.
382
383config CRYPTO_DEV_OMAP
384	tristate "Support for OMAP crypto HW accelerators"
385	depends on ARCH_OMAP2PLUS
386	help
387	  OMAP processors have various crypto HW accelerators. Select this if
388	  you want to use the OMAP modules for any of the crypto algorithms.
389
390if CRYPTO_DEV_OMAP
391
392config CRYPTO_DEV_OMAP_SHAM
393	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
394	depends on ARCH_OMAP2PLUS
395	select CRYPTO_ENGINE
396	select CRYPTO_SHA1
397	select CRYPTO_MD5
398	select CRYPTO_SHA256
399	select CRYPTO_SHA512
400	select CRYPTO_HMAC
401	help
402	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
403	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
404
405config CRYPTO_DEV_OMAP_AES
406	tristate "Support for OMAP AES hw engine"
407	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
408	select CRYPTO_AES
409	select CRYPTO_SKCIPHER
410	select CRYPTO_ENGINE
411	select CRYPTO_CBC
412	select CRYPTO_ECB
413	select CRYPTO_CTR
414	select CRYPTO_AEAD
415	help
416	  OMAP processors have AES module accelerator. Select this if you
417	  want to use the OMAP module for AES algorithms.
418
419config CRYPTO_DEV_OMAP_DES
420	tristate "Support for OMAP DES/3DES hw engine"
421	depends on ARCH_OMAP2PLUS
422	select CRYPTO_LIB_DES
423	select CRYPTO_SKCIPHER
424	select CRYPTO_ENGINE
425	help
426	  OMAP processors have DES/3DES module accelerator. Select this if you
427	  want to use the OMAP module for DES and 3DES algorithms. Currently
428	  the ECB and CBC modes of operation are supported by the driver. Also
429	  accesses made on unaligned boundaries are supported.
430
431endif # CRYPTO_DEV_OMAP
432
433config CRYPTO_DEV_SAHARA
434	tristate "Support for SAHARA crypto accelerator"
435	depends on ARCH_MXC && OF
436	select CRYPTO_SKCIPHER
437	select CRYPTO_AES
438	select CRYPTO_ECB
439	help
440	  This option enables support for the SAHARA HW crypto accelerator
441	  found in some Freescale i.MX chips.
442
443config CRYPTO_DEV_EXYNOS_RNG
444	tristate "Exynos HW pseudo random number generator support"
445	depends on ARCH_EXYNOS || COMPILE_TEST
446	depends on HAS_IOMEM
447	select CRYPTO_RNG
448	help
449	  This driver provides kernel-side support through the
450	  cryptographic API for the pseudo random number generator hardware
451	  found on Exynos SoCs.
452
453	  To compile this driver as a module, choose M here: the
454	  module will be called exynos-rng.
455
456	  If unsure, say Y.
457
458config CRYPTO_DEV_S5P
459	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
460	depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
461	depends on HAS_IOMEM
462	select CRYPTO_AES
463	select CRYPTO_SKCIPHER
464	help
465	  This option allows you to have support for S5P crypto acceleration.
466	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
467	  algorithms execution.
468
469config CRYPTO_DEV_EXYNOS_HASH
470	bool "Support for Samsung Exynos HASH accelerator"
471	depends on CRYPTO_DEV_S5P
472	depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
473	select CRYPTO_SHA1
474	select CRYPTO_MD5
475	select CRYPTO_SHA256
476	help
477	  Select this to offload Exynos from HASH MD5/SHA1/SHA256.
478	  This will select software SHA1, MD5 and SHA256 as they are
479	  needed for small and zero-size messages.
480	  HASH algorithms will be disabled if EXYNOS_RNG
481	  is enabled due to hw conflict.
482
483config CRYPTO_DEV_NX
484	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
485	depends on PPC64
486	help
487	  This enables support for the NX hardware cryptographic accelerator
488	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
489	  does not actually enable any drivers, it only allows you to select
490	  which acceleration type (encryption and/or compression) to enable.
491
492if CRYPTO_DEV_NX
493	source "drivers/crypto/nx/Kconfig"
494endif
495
496config CRYPTO_DEV_UX500
497	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
498	depends on ARCH_U8500
499	help
500	  Driver for ST-Ericsson UX500 crypto engine.
501
502if CRYPTO_DEV_UX500
503	source "drivers/crypto/ux500/Kconfig"
504endif # if CRYPTO_DEV_UX500
505
506config CRYPTO_DEV_ATMEL_AUTHENC
507	bool "Support for Atmel IPSEC/SSL hw accelerator"
508	depends on ARCH_AT91 || COMPILE_TEST
509	depends on CRYPTO_DEV_ATMEL_AES
510	help
511	  Some Atmel processors can combine the AES and SHA hw accelerators
512	  to enhance support of IPSEC/SSL.
513	  Select this if you want to use the Atmel modules for
514	  authenc(hmac(shaX),Y(cbc)) algorithms.
515
516config CRYPTO_DEV_ATMEL_AES
517	tristate "Support for Atmel AES hw accelerator"
518	depends on ARCH_AT91 || COMPILE_TEST
519	select CRYPTO_AES
520	select CRYPTO_AEAD
521	select CRYPTO_SKCIPHER
522	select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
523	select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
524	help
525	  Some Atmel processors have AES hw accelerator.
526	  Select this if you want to use the Atmel module for
527	  AES algorithms.
528
529	  To compile this driver as a module, choose M here: the module
530	  will be called atmel-aes.
531
532config CRYPTO_DEV_ATMEL_TDES
533	tristate "Support for Atmel DES/TDES hw accelerator"
534	depends on ARCH_AT91 || COMPILE_TEST
535	select CRYPTO_LIB_DES
536	select CRYPTO_SKCIPHER
537	help
538	  Some Atmel processors have DES/TDES hw accelerator.
539	  Select this if you want to use the Atmel module for
540	  DES/TDES algorithms.
541
542	  To compile this driver as a module, choose M here: the module
543	  will be called atmel-tdes.
544
545config CRYPTO_DEV_ATMEL_SHA
546	tristate "Support for Atmel SHA hw accelerator"
547	depends on ARCH_AT91 || COMPILE_TEST
548	select CRYPTO_HASH
549	help
550	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
551	  hw accelerator.
552	  Select this if you want to use the Atmel module for
553	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
554
555	  To compile this driver as a module, choose M here: the module
556	  will be called atmel-sha.
557
558config CRYPTO_DEV_ATMEL_I2C
559	tristate
560	select BITREVERSE
561
562config CRYPTO_DEV_ATMEL_ECC
563	tristate "Support for Microchip / Atmel ECC hw accelerator"
564	depends on I2C
565	select CRYPTO_DEV_ATMEL_I2C
566	select CRYPTO_ECDH
567	select CRC16
568	help
569	  Microhip / Atmel ECC hw accelerator.
570	  Select this if you want to use the Microchip / Atmel module for
571	  ECDH algorithm.
572
573	  To compile this driver as a module, choose M here: the module
574	  will be called atmel-ecc.
575
576config CRYPTO_DEV_ATMEL_SHA204A
577	tristate "Support for Microchip / Atmel SHA accelerator and RNG"
578	depends on I2C
579	select CRYPTO_DEV_ATMEL_I2C
580	select HW_RANDOM
581	select CRC16
582	help
583	  Microhip / Atmel SHA accelerator and RNG.
584	  Select this if you want to use the Microchip / Atmel SHA204A
585	  module as a random number generator. (Other functions of the
586	  chip are currently not exposed by this driver)
587
588	  To compile this driver as a module, choose M here: the module
589	  will be called atmel-sha204a.
590
591config CRYPTO_DEV_CCP
592	bool "Support for AMD Secure Processor"
593	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
594	help
595	  The AMD Secure Processor provides support for the Cryptographic Coprocessor
596	  (CCP) and the Platform Security Processor (PSP) devices.
597
598if CRYPTO_DEV_CCP
599	source "drivers/crypto/ccp/Kconfig"
600endif
601
602config CRYPTO_DEV_MXS_DCP
603	tristate "Support for Freescale MXS DCP"
604	depends on (ARCH_MXS || ARCH_MXC)
605	select STMP_DEVICE
606	select CRYPTO_CBC
607	select CRYPTO_ECB
608	select CRYPTO_AES
609	select CRYPTO_SKCIPHER
610	select CRYPTO_HASH
611	help
612	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
613	  co-processor on the die.
614
615	  To compile this driver as a module, choose M here: the module
616	  will be called mxs-dcp.
617
618source "drivers/crypto/qat/Kconfig"
619source "drivers/crypto/cavium/cpt/Kconfig"
620source "drivers/crypto/cavium/nitrox/Kconfig"
621source "drivers/crypto/marvell/Kconfig"
622
623config CRYPTO_DEV_CAVIUM_ZIP
624	tristate "Cavium ZIP driver"
625	depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
626	help
627	  Select this option if you want to enable compression/decompression
628	  acceleration on Cavium's ARM based SoCs
629
630config CRYPTO_DEV_QCE
631	tristate "Qualcomm crypto engine accelerator"
632	depends on ARCH_QCOM || COMPILE_TEST
633	depends on HAS_IOMEM
634	help
635	  This driver supports Qualcomm crypto engine accelerator
636	  hardware. To compile this driver as a module, choose M here. The
637	  module will be called qcrypto.
638
639config CRYPTO_DEV_QCE_SKCIPHER
640	bool
641	depends on CRYPTO_DEV_QCE
642	select CRYPTO_AES
643	select CRYPTO_LIB_DES
644	select CRYPTO_ECB
645	select CRYPTO_CBC
646	select CRYPTO_XTS
647	select CRYPTO_CTR
648	select CRYPTO_SKCIPHER
649
650config CRYPTO_DEV_QCE_SHA
651	bool
652	depends on CRYPTO_DEV_QCE
653	select CRYPTO_SHA1
654	select CRYPTO_SHA256
655
656config CRYPTO_DEV_QCE_AEAD
657	bool
658	depends on CRYPTO_DEV_QCE
659	select CRYPTO_AUTHENC
660	select CRYPTO_LIB_DES
661
662choice
663	prompt "Algorithms enabled for QCE acceleration"
664	default CRYPTO_DEV_QCE_ENABLE_ALL
665	depends on CRYPTO_DEV_QCE
666	help
667	  This option allows to choose whether to build support for all algorithms
668	  (default), hashes-only, or skciphers-only.
669
670	  The QCE engine does not appear to scale as well as the CPU to handle
671	  multiple crypto requests.  While the ipq40xx chips have 4-core CPUs, the
672	  QCE handles only 2 requests in parallel.
673
674	  Ipsec throughput seems to improve when disabling either family of
675	  algorithms, sharing the load with the CPU.  Enabling skciphers-only
676	  appears to work best.
677
678	config CRYPTO_DEV_QCE_ENABLE_ALL
679		bool "All supported algorithms"
680		select CRYPTO_DEV_QCE_SKCIPHER
681		select CRYPTO_DEV_QCE_SHA
682		select CRYPTO_DEV_QCE_AEAD
683		help
684		  Enable all supported algorithms:
685			- AES (CBC, CTR, ECB, XTS)
686			- 3DES (CBC, ECB)
687			- DES (CBC, ECB)
688			- SHA1, HMAC-SHA1
689			- SHA256, HMAC-SHA256
690
691	config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
692		bool "Symmetric-key ciphers only"
693		select CRYPTO_DEV_QCE_SKCIPHER
694		help
695		  Enable symmetric-key ciphers only:
696			- AES (CBC, CTR, ECB, XTS)
697			- 3DES (ECB, CBC)
698			- DES (ECB, CBC)
699
700	config CRYPTO_DEV_QCE_ENABLE_SHA
701		bool "Hash/HMAC only"
702		select CRYPTO_DEV_QCE_SHA
703		help
704		  Enable hashes/HMAC algorithms only:
705			- SHA1, HMAC-SHA1
706			- SHA256, HMAC-SHA256
707
708	config CRYPTO_DEV_QCE_ENABLE_AEAD
709		bool "AEAD algorithms only"
710		select CRYPTO_DEV_QCE_AEAD
711		help
712		  Enable AEAD algorithms only:
713			- authenc()
714			- ccm(aes)
715			- rfc4309(ccm(aes))
716endchoice
717
718config CRYPTO_DEV_QCE_SW_MAX_LEN
719	int "Default maximum request size to use software for AES"
720	depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
721	default 512
722	help
723	  This sets the default maximum request size to perform AES requests
724	  using software instead of the crypto engine.  It can be changed by
725	  setting the aes_sw_max_len parameter.
726
727	  Small blocks are processed faster in software than hardware.
728	  Considering the 256-bit ciphers, software is 2-3 times faster than
729	  qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
730	  With 128-bit keys, the break-even point would be around 1024-bytes.
731
732	  The default is set a little lower, to 512 bytes, to balance the
733	  cost in CPU usage.  The minimum recommended setting is 16-bytes
734	  (1 AES block), since AES-GCM will fail if you set it lower.
735	  Setting this to zero will send all requests to the hardware.
736
737	  Note that 192-bit keys are not supported by the hardware and are
738	  always processed by the software fallback, and all DES requests
739	  are done by the hardware.
740
741config CRYPTO_DEV_QCOM_RNG
742	tristate "Qualcomm Random Number Generator Driver"
743	depends on ARCH_QCOM || COMPILE_TEST
744	select CRYPTO_RNG
745	help
746	  This driver provides support for the Random Number
747	  Generator hardware found on Qualcomm SoCs.
748
749	  To compile this driver as a module, choose M here. The
750	  module will be called qcom-rng. If unsure, say N.
751
752config CRYPTO_DEV_VMX
753	bool "Support for VMX cryptographic acceleration instructions"
754	depends on PPC64 && VSX
755	help
756	  Support for VMX cryptographic acceleration instructions.
757
758source "drivers/crypto/vmx/Kconfig"
759
760config CRYPTO_DEV_IMGTEC_HASH
761	tristate "Imagination Technologies hardware hash accelerator"
762	depends on MIPS || COMPILE_TEST
763	select CRYPTO_MD5
764	select CRYPTO_SHA1
765	select CRYPTO_SHA256
766	select CRYPTO_HASH
767	help
768	  This driver interfaces with the Imagination Technologies
769	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
770	  hashing algorithms.
771
772config CRYPTO_DEV_ROCKCHIP
773	tristate "Rockchip's Cryptographic Engine driver"
774	depends on OF && ARCH_ROCKCHIP
775	depends on PM
776	select CRYPTO_ECB
777	select CRYPTO_CBC
778	select CRYPTO_DES
779	select CRYPTO_AES
780	select CRYPTO_ENGINE
781	select CRYPTO_LIB_DES
782	select CRYPTO_MD5
783	select CRYPTO_SHA1
784	select CRYPTO_SHA256
785	select CRYPTO_HASH
786	select CRYPTO_SKCIPHER
787
788	help
789	  This driver interfaces with the hardware crypto accelerator.
790	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
791
792config CRYPTO_DEV_ZYNQMP_AES
793	tristate "Support for Xilinx ZynqMP AES hw accelerator"
794	depends on ZYNQMP_FIRMWARE || COMPILE_TEST
795	select CRYPTO_AES
796	select CRYPTO_ENGINE
797	select CRYPTO_AEAD
798	help
799	  Xilinx ZynqMP has AES-GCM engine used for symmetric key
800	  encryption and decryption. This driver interfaces with AES hw
801	  accelerator. Select this if you want to use the ZynqMP module
802	  for AES algorithms.
803
804source "drivers/crypto/chelsio/Kconfig"
805
806source "drivers/crypto/virtio/Kconfig"
807
808config CRYPTO_DEV_BCM_SPU
809	tristate "Broadcom symmetric crypto/hash acceleration support"
810	depends on ARCH_BCM_IPROC
811	depends on MAILBOX
812	default m
813	select CRYPTO_AUTHENC
814	select CRYPTO_LIB_DES
815	select CRYPTO_MD5
816	select CRYPTO_SHA1
817	select CRYPTO_SHA256
818	select CRYPTO_SHA512
819	help
820	  This driver provides support for Broadcom crypto acceleration using the
821	  Secure Processing Unit (SPU). The SPU driver registers skcipher,
822	  ahash, and aead algorithms with the kernel cryptographic API.
823
824source "drivers/crypto/stm32/Kconfig"
825
826config CRYPTO_DEV_SAFEXCEL
827	tristate "Inside Secure's SafeXcel cryptographic engine driver"
828	depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
829	select CRYPTO_LIB_AES
830	select CRYPTO_AUTHENC
831	select CRYPTO_SKCIPHER
832	select CRYPTO_LIB_DES
833	select CRYPTO_HASH
834	select CRYPTO_HMAC
835	select CRYPTO_MD5
836	select CRYPTO_SHA1
837	select CRYPTO_SHA256
838	select CRYPTO_SHA512
839	select CRYPTO_CHACHA20POLY1305
840	select CRYPTO_SHA3
841	help
842	  This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
843	  engines designed by Inside Secure. It currently accelerates DES, 3DES and
844	  AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
845	  SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
846	  Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
847
848config CRYPTO_DEV_ARTPEC6
849	tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
850	depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
851	depends on OF
852	select CRYPTO_AEAD
853	select CRYPTO_AES
854	select CRYPTO_ALGAPI
855	select CRYPTO_SKCIPHER
856	select CRYPTO_CTR
857	select CRYPTO_HASH
858	select CRYPTO_SHA1
859	select CRYPTO_SHA256
860	select CRYPTO_SHA512
861	help
862	  Enables the driver for the on-chip crypto accelerator
863	  of Axis ARTPEC SoCs.
864
865	  To compile this driver as a module, choose M here.
866
867config CRYPTO_DEV_CCREE
868	tristate "Support for ARM TrustZone CryptoCell family of security processors"
869	depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
870	default n
871	select CRYPTO_HASH
872	select CRYPTO_SKCIPHER
873	select CRYPTO_LIB_DES
874	select CRYPTO_AEAD
875	select CRYPTO_AUTHENC
876	select CRYPTO_SHA1
877	select CRYPTO_MD5
878	select CRYPTO_SHA256
879	select CRYPTO_SHA512
880	select CRYPTO_HMAC
881	select CRYPTO_AES
882	select CRYPTO_CBC
883	select CRYPTO_ECB
884	select CRYPTO_CTR
885	select CRYPTO_XTS
886	select CRYPTO_SM4
887	select CRYPTO_SM3
888	help
889	  Say 'Y' to enable a driver for the REE interface of the Arm
890	  TrustZone CryptoCell family of processors. Currently the
891	  CryptoCell 713, 703, 712, 710 and 630 are supported.
892	  Choose this if you wish to use hardware acceleration of
893	  cryptographic operations on the system REE.
894	  If unsure say Y.
895
896source "drivers/crypto/hisilicon/Kconfig"
897
898source "drivers/crypto/amlogic/Kconfig"
899
900config CRYPTO_DEV_SA2UL
901	tristate "Support for TI security accelerator"
902	depends on ARCH_K3 || COMPILE_TEST
903	select ARM64_CRYPTO
904	select CRYPTO_AES
905	select CRYPTO_AES_ARM64
906	select CRYPTO_ALGAPI
907	select CRYPTO_AUTHENC
908	select CRYPTO_DES
909	select CRYPTO_SHA1
910	select CRYPTO_SHA256
911	select CRYPTO_SHA512
912	select HW_RANDOM
913	select SG_SPLIT
914	help
915	  K3 devices include a security accelerator engine that may be
916	  used for crypto offload.  Select this if you want to use hardware
917	  acceleration for cryptographic algorithms on these devices.
918
919source "drivers/crypto/keembay/Kconfig"
920
921endif # CRYPTO_HW
922