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1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2018-2021 Intel Corporation
4  */
5 #ifndef __iwl_fw_dbg_tlv_h__
6 #define __iwl_fw_dbg_tlv_h__
7 
8 #include <linux/bitops.h>
9 
10 #define IWL_FW_INI_MAX_REGION_ID		64
11 #define IWL_FW_INI_MAX_NAME			32
12 #define IWL_FW_INI_MAX_CFG_NAME			64
13 #define IWL_FW_INI_DOMAIN_ALWAYS_ON		0
14 #define IWL_FW_INI_REGION_V2_MASK		0x0000FFFF
15 
16 /**
17  * struct iwl_fw_ini_hcmd
18  *
19  * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC
20  * @group: the desired cmd group
21  * @reserved: to align to FW struct
22  * @data: all of the relevant command data to be sent
23  */
24 struct iwl_fw_ini_hcmd {
25 	u8 id;
26 	u8 group;
27 	__le16 reserved;
28 	u8 data[0];
29 } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */
30 
31 /**
32  * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures
33  *
34  * @version: TLV version
35  * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain
36  */
37 struct iwl_fw_ini_header {
38 	__le32 version;
39 	__le32 domain;
40 	/* followed by the data */
41 } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */
42 
43 /**
44  * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses
45  *
46  * @size: size of each memory chunk
47  * @offset: offset to add to the base address of each chunk
48  */
49 struct iwl_fw_ini_region_dev_addr {
50 	__le32 size;
51 	__le32 offset;
52 } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */
53 
54 /**
55  * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos
56  *
57  * @fid: fifos ids array. Used to determine what fifos to collect
58  * @hdr_only: if non zero, collect only the registers
59  * @offset: offset to add to the registers addresses
60  */
61 struct iwl_fw_ini_region_fifos {
62 	__le32 fid[2];
63 	__le32 hdr_only;
64 	__le32 offset;
65 } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */
66 
67 /**
68  * struct iwl_fw_ini_region_err_table - error table region data
69  *
70  * Configuration to read Umac/Lmac error table
71  *
72  * @version: version of the error table
73  * @base_addr: base address of the error table
74  * @size: size of the error table
75  * @offset: offset to add to &base_addr
76  */
77 struct iwl_fw_ini_region_err_table {
78 	__le32 version;
79 	__le32 base_addr;
80 	__le32 size;
81 	__le32 offset;
82 } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */
83 
84 /**
85  * struct iwl_fw_ini_region_special_device_memory - special device memory
86  *
87  * Configuration to read a special memory
88  *
89  * @type: type of the special memory
90  * @version: version of the special memory
91  * @base_addr: base address of the error table
92  * @size: size of the error table
93  * @offset: offset to add to &base_addr
94  */
95 struct iwl_fw_ini_region_special_device_memory {
96 	__le16 type;
97 	__le16 version;
98 	__le32 base_addr;
99 	__le32 size;
100 	__le32 offset;
101 } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */
102 
103 /**
104  * struct iwl_fw_ini_region_internal_buffer - internal buffer region data
105  *
106  * Configuration to read internal monitor buffer
107  *
108  * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id
109  * @base_addr: internal buffer base address
110  * @size: size internal buffer size
111  */
112 struct iwl_fw_ini_region_internal_buffer {
113 	__le32 alloc_id;
114 	__le32 base_addr;
115 	__le32 size;
116 } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */
117 
118 /**
119  * struct iwl_fw_ini_region_tlv - region TLV
120  *
121  * Configures parameters for region data collection
122  *
123  * @hdr: debug header
124  * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID
125  * @type: region type. One of &enum iwl_fw_ini_region_type
126  * @name: region name
127  * @dev_addr: device address configuration. Used by
128  *	&IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC,
129  *	&IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
130  *	&IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
131  *	&IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
132  *	&IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,
133  * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
134  *	&IWL_FW_INI_REGION_RXF
135  * @err_table: error table configuration. Used by
136  *	IWL_FW_INI_REGION_LMAC_ERROR_TABLE and
137  *	IWL_FW_INI_REGION_UMAC_ERROR_TABLE
138  * @internal_buffer: internal monitor buffer configuration. Used by
139  *	&IWL_FW_INI_REGION_INTERNAL_BUFFER
140  * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id.
141  *	Used by &IWL_FW_INI_REGION_DRAM_BUFFER
142  * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV
143  * @addrs: array of addresses attached to the end of the region tlv
144  */
145 struct iwl_fw_ini_region_tlv {
146 	struct iwl_fw_ini_header hdr;
147 	__le32 id;
148 	__le32 type;
149 	u8 name[IWL_FW_INI_MAX_NAME];
150 	union {
151 		struct iwl_fw_ini_region_dev_addr dev_addr;
152 		struct iwl_fw_ini_region_fifos fifos;
153 		struct iwl_fw_ini_region_err_table err_table;
154 		struct iwl_fw_ini_region_internal_buffer internal_buffer;
155 		struct iwl_fw_ini_region_special_device_memory special_mem;
156 		__le32 dram_alloc_id;
157 		__le32 tlv_mask;
158 	}; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */
159 	__le32 addrs[];
160 } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */
161 
162 /**
163  * struct iwl_fw_ini_debug_info_tlv
164  *
165  * debug configuration name for a specific image
166  *
167  * @hdr: debug header
168  * @image_type: image type
169  * @debug_cfg_name: debug configuration name
170  */
171 struct iwl_fw_ini_debug_info_tlv {
172 	struct iwl_fw_ini_header hdr;
173 	__le32 image_type;
174 	u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME];
175 } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */
176 
177 /**
178  * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers
179  *
180  * @hdr: debug header
181  * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id
182  * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location
183  * @req_size: requested buffer size
184  * @max_frags_num: maximum number of fragments
185  * @min_size: minimum buffer size
186  */
187 struct iwl_fw_ini_allocation_tlv {
188 	struct iwl_fw_ini_header hdr;
189 	__le32 alloc_id;
190 	__le32 buf_location;
191 	__le32 req_size;
192 	__le32 max_frags_num;
193 	__le32 min_size;
194 } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */
195 
196 /**
197  * struct iwl_fw_ini_trigger_tlv - trigger TLV
198  *
199  * Trigger that upon firing, determines what regions to collect
200  *
201  * @hdr: debug header
202  * @time_point: time point. One of &enum iwl_fw_ini_time_point
203  * @trigger_reason: trigger reason
204  * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy
205  * @dump_delay: delay from trigger fire to dump, in usec
206  * @occurrences: max trigger fire occurrences allowed
207  * @reserved: unused
208  * @ignore_consec: ignore consecutive triggers, in usec
209  * @reset_fw: if non zero, will reset and reload the FW
210  * @multi_dut: initiate debug dump data on several DUTs
211  * @regions_mask: mask of regions to collect
212  * @data: trigger data
213  */
214 struct iwl_fw_ini_trigger_tlv {
215 	struct iwl_fw_ini_header hdr;
216 	__le32 time_point;
217 	__le32 trigger_reason;
218 	__le32 apply_policy;
219 	__le32 dump_delay;
220 	__le32 occurrences;
221 	__le32 reserved;
222 	__le32 ignore_consec;
223 	__le32 reset_fw;
224 	__le32 multi_dut;
225 	__le64 regions_mask;
226 	__le32 data[];
227 } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */
228 
229 /**
230  * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV
231  *
232  * @hdr: debug header
233  * @time_point: time point. One of &enum iwl_fw_ini_time_point
234  * @period_msec: interval at which the hcmd will be sent to the FW.
235  *	Measured in msec (0 = one time command)
236  * @hcmd: a variable length host-command to be sent to apply the configuration
237  */
238 struct iwl_fw_ini_hcmd_tlv {
239 	struct iwl_fw_ini_header hdr;
240 	__le32 time_point;
241 	__le32 period_msec;
242 	struct iwl_fw_ini_hcmd hcmd;
243 } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */
244 
245 /**
246  * enum iwl_fw_ini_allocation_id
247  *
248  * @IWL_FW_INI_ALLOCATION_INVALID: invalid
249  * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration
250  * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration
251  * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration
252  * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids
253 */
254 enum iwl_fw_ini_allocation_id {
255 	IWL_FW_INI_ALLOCATION_INVALID,
256 	IWL_FW_INI_ALLOCATION_ID_DBGC1,
257 	IWL_FW_INI_ALLOCATION_ID_DBGC2,
258 	IWL_FW_INI_ALLOCATION_ID_DBGC3,
259 	IWL_FW_INI_ALLOCATION_NUM,
260 }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */
261 
262 /**
263  * enum iwl_fw_ini_buffer_location
264  *
265  * @IWL_FW_INI_LOCATION_INVALID: invalid
266  * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location
267  * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location
268  * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location
269  */
270 enum iwl_fw_ini_buffer_location {
271 	IWL_FW_INI_LOCATION_INVALID,
272 	IWL_FW_INI_LOCATION_SRAM_PATH,
273 	IWL_FW_INI_LOCATION_DRAM_PATH,
274 	IWL_FW_INI_LOCATION_NPK_PATH,
275 	IWL_FW_INI_LOCATION_NUM,
276 }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */
277 
278 /**
279  * enum iwl_fw_ini_region_type
280  *
281  * @IWL_FW_INI_REGION_INVALID: invalid
282  * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs
283  * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer
284  * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer
285  * @IWL_FW_INI_REGION_TXF: TX fifos
286  * @IWL_FW_INI_REGION_RXF: RX fifo
287  * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table
288  * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table
289  * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data
290  * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory
291  * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC
292  * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY
293  * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX
294  * @IWL_FW_INI_REGION_PAGING: paging memory
295  * @IWL_FW_INI_REGION_CSR: CSR registers
296  * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
297  * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
298  * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
299  * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM
300  * @IWL_FW_INI_REGION_NUM: number of region types
301  */
302 enum iwl_fw_ini_region_type {
303 	IWL_FW_INI_REGION_INVALID,
304 	IWL_FW_INI_REGION_TLV,
305 	IWL_FW_INI_REGION_INTERNAL_BUFFER,
306 	IWL_FW_INI_REGION_DRAM_BUFFER,
307 	IWL_FW_INI_REGION_TXF,
308 	IWL_FW_INI_REGION_RXF,
309 	IWL_FW_INI_REGION_LMAC_ERROR_TABLE,
310 	IWL_FW_INI_REGION_UMAC_ERROR_TABLE,
311 	IWL_FW_INI_REGION_RSP_OR_NOTIF,
312 	IWL_FW_INI_REGION_DEVICE_MEMORY,
313 	IWL_FW_INI_REGION_PERIPHERY_MAC,
314 	IWL_FW_INI_REGION_PERIPHERY_PHY,
315 	IWL_FW_INI_REGION_PERIPHERY_AUX,
316 	IWL_FW_INI_REGION_PAGING,
317 	IWL_FW_INI_REGION_CSR,
318 	IWL_FW_INI_REGION_DRAM_IMR,
319 	IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
320 	IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
321 	IWL_FW_INI_REGION_DBGI_SRAM,
322 	IWL_FW_INI_REGION_NUM
323 }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
324 
325 /**
326  * enum iwl_fw_ini_time_point
327  *
328  * Hard coded time points in which the driver can send hcmd or perform dump
329  * collection
330  *
331  * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW
332  * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif
333  * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence
334  * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert
335  * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error
336  * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang
337  * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif
338  * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification.
339  *	data field holds id and group
340  * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point
341  * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant
342  *	intervals. data field holds the interval time in msec
343  * @IWL_FW_INI_TIME_POINT_RESERVED: reserved
344  * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused
345  * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout
346  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable
347  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable
348  * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start
349  * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end
350  * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons
351  * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure
352  * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed
353  * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action
354  *	frame failed
355  * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold
356  * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred
357  * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed
358  * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx
359  * @IWL_FW_INI_TIME_POINT_DEASSOC: de association
360  * @IWL_FW_INI_TIME_POINT_NUM: number of time points
361  */
362 enum iwl_fw_ini_time_point {
363 	IWL_FW_INI_TIME_POINT_INVALID,
364 	IWL_FW_INI_TIME_POINT_EARLY,
365 	IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
366 	IWL_FW_INI_TIME_POINT_POST_INIT,
367 	IWL_FW_INI_TIME_POINT_FW_ASSERT,
368 	IWL_FW_INI_TIME_POINT_FW_HW_ERROR,
369 	IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG,
370 	IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION,
371 	IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF,
372 	IWL_FW_INI_TIME_POINT_USER_TRIGGER,
373 	IWL_FW_INI_TIME_POINT_PERIODIC,
374 	IWL_FW_INI_TIME_POINT_RESERVED,
375 	IWL_FW_INI_TIME_POINT_HOST_ASSERT,
376 	IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
377 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE,
378 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE,
379 	IWL_FW_INI_TIME_POINT_HOST_D3_START,
380 	IWL_FW_INI_TIME_POINT_HOST_D3_END,
381 	IWL_FW_INI_TIME_POINT_MISSED_BEACONS,
382 	IWL_FW_INI_TIME_POINT_ASSOC_FAILED,
383 	IWL_FW_INI_TIME_POINT_TX_FAILED,
384 	IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED,
385 	IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD,
386 	IWL_FW_INI_TIME_POINT_HANG_OCCURRED,
387 	IWL_FW_INI_TIME_POINT_EAPOL_FAILED,
388 	IWL_FW_INI_TIME_POINT_FAKE_TX,
389 	IWL_FW_INI_TIME_POINT_DEASSOC,
390 	IWL_FW_INI_TIME_POINT_NUM,
391 }; /* FW_TLV_DEBUG_TIME_POINT_API_E */
392 
393 /**
394  * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers
395  *
396  * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point
397  * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data
398  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask.
399  *	Append otherwise
400  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration
401  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data.
402  *	Append otherwise
403  */
404 enum iwl_fw_ini_trigger_apply_policy {
405 	IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT	= BIT(0),
406 	IWL_FW_INI_APPLY_POLICY_MATCH_DATA		= BIT(1),
407 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS	= BIT(8),
408 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG		= BIT(9),
409 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA		= BIT(10),
410 };
411 #endif
412