1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * ADC driver for the RICOH RN5T618 power management chip family
4 *
5 * Copyright (C) 2019 Andreas Kemnade
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/device.h>
10 #include <linux/errno.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/mfd/rn5t618.h>
15 #include <linux/platform_device.h>
16 #include <linux/completion.h>
17 #include <linux/regmap.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/driver.h>
20 #include <linux/iio/machine.h>
21 #include <linux/slab.h>
22
23 #define RN5T618_ADC_CONVERSION_TIMEOUT (msecs_to_jiffies(500))
24 #define RN5T618_REFERENCE_VOLT 2500
25
26 /* mask for selecting channels for single conversion */
27 #define RN5T618_ADCCNT3_CHANNEL_MASK 0x7
28 /* average 4-time conversion mode */
29 #define RN5T618_ADCCNT3_AVG BIT(3)
30 /* set for starting a single conversion, gets cleared by hw when done */
31 #define RN5T618_ADCCNT3_GODONE BIT(4)
32 /* automatic conversion, period is in ADCCNT2, selected channels are
33 * in ADCCNT1
34 */
35 #define RN5T618_ADCCNT3_AUTO BIT(5)
36 #define RN5T618_ADCEND_IRQ BIT(0)
37
38 struct rn5t618_adc_data {
39 struct device *dev;
40 struct rn5t618 *rn5t618;
41 struct completion conv_completion;
42 int irq;
43 };
44
45 struct rn5t618_channel_ratios {
46 u16 numerator;
47 u16 denominator;
48 };
49
50 enum rn5t618_channels {
51 LIMMON = 0,
52 VBAT,
53 VADP,
54 VUSB,
55 VSYS,
56 VTHM,
57 AIN1,
58 AIN0
59 };
60
61 static const struct rn5t618_channel_ratios rn5t618_ratios[8] = {
62 [LIMMON] = {50, 32}, /* measured across 20mOhm, amplified by 32 */
63 [VBAT] = {2, 1},
64 [VADP] = {3, 1},
65 [VUSB] = {3, 1},
66 [VSYS] = {3, 1},
67 [VTHM] = {1, 1},
68 [AIN1] = {1, 1},
69 [AIN0] = {1, 1},
70 };
71
rn5t618_read_adc_reg(struct rn5t618 * rn5t618,int reg,u16 * val)72 static int rn5t618_read_adc_reg(struct rn5t618 *rn5t618, int reg, u16 *val)
73 {
74 u8 data[2];
75 int ret;
76
77 ret = regmap_bulk_read(rn5t618->regmap, reg, data, sizeof(data));
78 if (ret < 0)
79 return ret;
80
81 *val = (data[0] << 4) | (data[1] & 0xF);
82
83 return 0;
84 }
85
rn5t618_adc_irq(int irq,void * data)86 static irqreturn_t rn5t618_adc_irq(int irq, void *data)
87 {
88 struct rn5t618_adc_data *adc = data;
89 unsigned int r = 0;
90 int ret;
91
92 /* clear low & high threshold irqs */
93 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0);
94 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0);
95
96 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r);
97 if (ret < 0)
98 dev_err(adc->dev, "failed to read IRQ status: %d\n", ret);
99
100 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC3, 0);
101
102 if (r & RN5T618_ADCEND_IRQ)
103 complete(&adc->conv_completion);
104
105 return IRQ_HANDLED;
106 }
107
rn5t618_adc_read(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)108 static int rn5t618_adc_read(struct iio_dev *iio_dev,
109 const struct iio_chan_spec *chan,
110 int *val, int *val2, long mask)
111 {
112 struct rn5t618_adc_data *adc = iio_priv(iio_dev);
113 u16 raw;
114 int ret;
115
116 if (mask == IIO_CHAN_INFO_SCALE) {
117 *val = RN5T618_REFERENCE_VOLT *
118 rn5t618_ratios[chan->channel].numerator;
119 *val2 = rn5t618_ratios[chan->channel].denominator * 4095;
120
121 return IIO_VAL_FRACTIONAL;
122 }
123
124 /* select channel */
125 ret = regmap_update_bits(adc->rn5t618->regmap, RN5T618_ADCCNT3,
126 RN5T618_ADCCNT3_CHANNEL_MASK,
127 chan->channel);
128 if (ret < 0)
129 return ret;
130
131 ret = regmap_write(adc->rn5t618->regmap, RN5T618_EN_ADCIR3,
132 RN5T618_ADCEND_IRQ);
133 if (ret < 0)
134 return ret;
135
136 ret = regmap_update_bits(adc->rn5t618->regmap, RN5T618_ADCCNT3,
137 RN5T618_ADCCNT3_AVG,
138 mask == IIO_CHAN_INFO_AVERAGE_RAW ?
139 RN5T618_ADCCNT3_AVG : 0);
140 if (ret < 0)
141 return ret;
142
143 init_completion(&adc->conv_completion);
144 /* single conversion */
145 ret = regmap_update_bits(adc->rn5t618->regmap, RN5T618_ADCCNT3,
146 RN5T618_ADCCNT3_GODONE,
147 RN5T618_ADCCNT3_GODONE);
148 if (ret < 0)
149 return ret;
150
151 ret = wait_for_completion_timeout(&adc->conv_completion,
152 RN5T618_ADC_CONVERSION_TIMEOUT);
153 if (ret == 0) {
154 dev_warn(adc->dev, "timeout waiting for adc result\n");
155 return -ETIMEDOUT;
156 }
157
158 ret = rn5t618_read_adc_reg(adc->rn5t618,
159 RN5T618_ILIMDATAH + 2 * chan->channel,
160 &raw);
161 if (ret < 0)
162 return ret;
163
164 *val = raw;
165
166 return IIO_VAL_INT;
167 }
168
169 static const struct iio_info rn5t618_adc_iio_info = {
170 .read_raw = &rn5t618_adc_read,
171 };
172
173 #define RN5T618_ADC_CHANNEL(_channel, _type, _name) { \
174 .type = _type, \
175 .channel = _channel, \
176 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
177 BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \
178 BIT(IIO_CHAN_INFO_SCALE), \
179 .datasheet_name = _name, \
180 .indexed = 1. \
181 }
182
183 static const struct iio_chan_spec rn5t618_adc_iio_channels[] = {
184 RN5T618_ADC_CHANNEL(LIMMON, IIO_CURRENT, "LIMMON"),
185 RN5T618_ADC_CHANNEL(VBAT, IIO_VOLTAGE, "VBAT"),
186 RN5T618_ADC_CHANNEL(VADP, IIO_VOLTAGE, "VADP"),
187 RN5T618_ADC_CHANNEL(VUSB, IIO_VOLTAGE, "VUSB"),
188 RN5T618_ADC_CHANNEL(VSYS, IIO_VOLTAGE, "VSYS"),
189 RN5T618_ADC_CHANNEL(VTHM, IIO_VOLTAGE, "VTHM"),
190 RN5T618_ADC_CHANNEL(AIN1, IIO_VOLTAGE, "AIN1"),
191 RN5T618_ADC_CHANNEL(AIN0, IIO_VOLTAGE, "AIN0")
192 };
193
194 static struct iio_map rn5t618_maps[] = {
195 IIO_MAP("VADP", "rn5t618-power", "vadp"),
196 IIO_MAP("VUSB", "rn5t618-power", "vusb"),
197 { /* sentinel */ }
198 };
199
unregister_map(void * data)200 static void unregister_map(void *data)
201 {
202 struct iio_dev *iio_dev = (struct iio_dev *) data;
203
204 iio_map_array_unregister(iio_dev);
205 }
206
rn5t618_adc_probe(struct platform_device * pdev)207 static int rn5t618_adc_probe(struct platform_device *pdev)
208 {
209 int ret;
210 struct iio_dev *iio_dev;
211 struct rn5t618_adc_data *adc;
212 struct rn5t618 *rn5t618 = dev_get_drvdata(pdev->dev.parent);
213
214 iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
215 if (!iio_dev) {
216 dev_err(&pdev->dev, "failed allocating iio device\n");
217 return -ENOMEM;
218 }
219
220 adc = iio_priv(iio_dev);
221 adc->dev = &pdev->dev;
222 adc->rn5t618 = rn5t618;
223
224 if (rn5t618->irq_data)
225 adc->irq = regmap_irq_get_virq(rn5t618->irq_data,
226 RN5T618_IRQ_ADC);
227
228 if (adc->irq <= 0) {
229 dev_err(&pdev->dev, "get virq failed\n");
230 return -EINVAL;
231 }
232
233 init_completion(&adc->conv_completion);
234
235 iio_dev->name = dev_name(&pdev->dev);
236 iio_dev->info = &rn5t618_adc_iio_info;
237 iio_dev->modes = INDIO_DIRECT_MODE;
238 iio_dev->channels = rn5t618_adc_iio_channels;
239 iio_dev->num_channels = ARRAY_SIZE(rn5t618_adc_iio_channels);
240
241 /* stop any auto-conversion */
242 ret = regmap_write(rn5t618->regmap, RN5T618_ADCCNT3, 0);
243 if (ret < 0)
244 return ret;
245
246 platform_set_drvdata(pdev, iio_dev);
247
248 ret = devm_request_threaded_irq(adc->dev, adc->irq, NULL,
249 rn5t618_adc_irq,
250 IRQF_ONESHOT, dev_name(adc->dev),
251 adc);
252 if (ret < 0) {
253 dev_err(adc->dev, "request irq %d failed: %d\n", adc->irq, ret);
254 return ret;
255 }
256
257 ret = iio_map_array_register(iio_dev, rn5t618_maps);
258 if (ret < 0)
259 return ret;
260
261 ret = devm_add_action_or_reset(adc->dev, unregister_map, iio_dev);
262 if (ret < 0)
263 return ret;
264
265 return devm_iio_device_register(adc->dev, iio_dev);
266 }
267
268 static struct platform_driver rn5t618_adc_driver = {
269 .driver = {
270 .name = "rn5t618-adc",
271 },
272 .probe = rn5t618_adc_probe,
273 };
274
275 module_platform_driver(rn5t618_adc_driver);
276 MODULE_ALIAS("platform:rn5t618-adc");
277 MODULE_DESCRIPTION("RICOH RN5T618 ADC driver");
278 MODULE_LICENSE("GPL");
279