1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6 #ifndef ATH11K_WMI_H
7 #define ATH11K_WMI_H
8
9 #include <net/mac80211.h>
10 #include "htc.h"
11
12 struct ath11k_base;
13 struct ath11k;
14 struct ath11k_fw_stats;
15
16 #define PSOC_HOST_MAX_NUM_SS (8)
17
18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
19 #define MAX_HE_NSS 8
20 #define MAX_HE_MODULATION 8
21 #define MAX_HE_RU 4
22 #define HE_MODULATION_NONE 7
23 #define HE_PET_0_USEC 0
24 #define HE_PET_8_USEC 1
25 #define HE_PET_16_USEC 2
26
27 #define WMI_MAX_CHAINS 8
28
29 #define WMI_MAX_NUM_SS MAX_HE_NSS
30 #define WMI_MAX_NUM_RU MAX_HE_RU
31
32 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
33 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
34 #define WMI_TLV_CMD_UNSUPPORTED 0
35 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
36 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
37
38 struct wmi_cmd_hdr {
39 u32 cmd_id;
40 } __packed;
41
42 struct wmi_tlv {
43 u32 header;
44 u8 value[];
45 } __packed;
46
47 #define WMI_TLV_LEN GENMASK(15, 0)
48 #define WMI_TLV_TAG GENMASK(31, 16)
49 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
50
51 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
52 #define WMI_MAX_MEM_REQS 32
53 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
54
55 #define WLAN_SCAN_MAX_HINT_S_SSID 10
56 #define WLAN_SCAN_MAX_HINT_BSSID 10
57 #define MAX_RNR_BSS 5
58
59 #define WLAN_SCAN_MAX_HINT_S_SSID 10
60 #define WLAN_SCAN_MAX_HINT_BSSID 10
61 #define MAX_RNR_BSS 5
62
63 #define WLAN_SCAN_PARAMS_MAX_SSID 16
64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
66
67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
68
69 #define WMI_BA_MODE_BUFFER_SIZE_256 3
70 /*
71 * HW mode config type replicated from FW header
72 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
73 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
74 * one in 2G and another in 5G.
75 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
76 * same band; no tx allowed.
77 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
78 * Support for both PHYs within one band is planned
79 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
80 * but could be extended to other bands in the future.
81 * The separation of the band between the two PHYs needs
82 * to be communicated separately.
83 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
84 * as in WMI_HW_MODE_SBS, and 3rd on the other band
85 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
86 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
87 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
88 */
89 enum wmi_host_hw_mode_config_type {
90 WMI_HOST_HW_MODE_SINGLE = 0,
91 WMI_HOST_HW_MODE_DBS = 1,
92 WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
93 WMI_HOST_HW_MODE_SBS = 3,
94 WMI_HOST_HW_MODE_DBS_SBS = 4,
95 WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
96
97 /* keep last */
98 WMI_HOST_HW_MODE_MAX
99 };
100
101 /* HW mode priority values used to detect the preferred HW mode
102 * on the available modes.
103 */
104 enum wmi_host_hw_mode_priority {
105 WMI_HOST_HW_MODE_DBS_SBS_PRI,
106 WMI_HOST_HW_MODE_DBS_PRI,
107 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
108 WMI_HOST_HW_MODE_SBS_PRI,
109 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
110 WMI_HOST_HW_MODE_SINGLE_PRI,
111
112 /* keep last the lowest priority */
113 WMI_HOST_HW_MODE_MAX_PRI
114 };
115
116 enum {
117 WMI_HOST_WLAN_2G_CAP = 0x1,
118 WMI_HOST_WLAN_5G_CAP = 0x2,
119 WMI_HOST_WLAN_2G_5G_CAP = 0x3,
120 };
121
122 /*
123 * wmi command groups.
124 */
125 enum wmi_cmd_group {
126 /* 0 to 2 are reserved */
127 WMI_GRP_START = 0x3,
128 WMI_GRP_SCAN = WMI_GRP_START,
129 WMI_GRP_PDEV = 0x4,
130 WMI_GRP_VDEV = 0x5,
131 WMI_GRP_PEER = 0x6,
132 WMI_GRP_MGMT = 0x7,
133 WMI_GRP_BA_NEG = 0x8,
134 WMI_GRP_STA_PS = 0x9,
135 WMI_GRP_DFS = 0xa,
136 WMI_GRP_ROAM = 0xb,
137 WMI_GRP_OFL_SCAN = 0xc,
138 WMI_GRP_P2P = 0xd,
139 WMI_GRP_AP_PS = 0xe,
140 WMI_GRP_RATE_CTRL = 0xf,
141 WMI_GRP_PROFILE = 0x10,
142 WMI_GRP_SUSPEND = 0x11,
143 WMI_GRP_BCN_FILTER = 0x12,
144 WMI_GRP_WOW = 0x13,
145 WMI_GRP_RTT = 0x14,
146 WMI_GRP_SPECTRAL = 0x15,
147 WMI_GRP_STATS = 0x16,
148 WMI_GRP_ARP_NS_OFL = 0x17,
149 WMI_GRP_NLO_OFL = 0x18,
150 WMI_GRP_GTK_OFL = 0x19,
151 WMI_GRP_CSA_OFL = 0x1a,
152 WMI_GRP_CHATTER = 0x1b,
153 WMI_GRP_TID_ADDBA = 0x1c,
154 WMI_GRP_MISC = 0x1d,
155 WMI_GRP_GPIO = 0x1e,
156 WMI_GRP_FWTEST = 0x1f,
157 WMI_GRP_TDLS = 0x20,
158 WMI_GRP_RESMGR = 0x21,
159 WMI_GRP_STA_SMPS = 0x22,
160 WMI_GRP_WLAN_HB = 0x23,
161 WMI_GRP_RMC = 0x24,
162 WMI_GRP_MHF_OFL = 0x25,
163 WMI_GRP_LOCATION_SCAN = 0x26,
164 WMI_GRP_OEM = 0x27,
165 WMI_GRP_NAN = 0x28,
166 WMI_GRP_COEX = 0x29,
167 WMI_GRP_OBSS_OFL = 0x2a,
168 WMI_GRP_LPI = 0x2b,
169 WMI_GRP_EXTSCAN = 0x2c,
170 WMI_GRP_DHCP_OFL = 0x2d,
171 WMI_GRP_IPA = 0x2e,
172 WMI_GRP_MDNS_OFL = 0x2f,
173 WMI_GRP_SAP_OFL = 0x30,
174 WMI_GRP_OCB = 0x31,
175 WMI_GRP_SOC = 0x32,
176 WMI_GRP_PKT_FILTER = 0x33,
177 WMI_GRP_MAWC = 0x34,
178 WMI_GRP_PMF_OFFLOAD = 0x35,
179 WMI_GRP_BPF_OFFLOAD = 0x36,
180 WMI_GRP_NAN_DATA = 0x37,
181 WMI_GRP_PROTOTYPE = 0x38,
182 WMI_GRP_MONITOR = 0x39,
183 WMI_GRP_REGULATORY = 0x3a,
184 WMI_GRP_HW_DATA_FILTER = 0x3b,
185 WMI_GRP_WLM = 0x3c,
186 WMI_GRP_11K_OFFLOAD = 0x3d,
187 WMI_GRP_TWT = 0x3e,
188 WMI_GRP_MOTION_DET = 0x3f,
189 WMI_GRP_SPATIAL_REUSE = 0x40,
190 };
191
192 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
193 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
194
195 #define WMI_CMD_UNSUPPORTED 0
196
197 enum wmi_tlv_cmd_id {
198 WMI_INIT_CMDID = 0x1,
199 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
200 WMI_STOP_SCAN_CMDID,
201 WMI_SCAN_CHAN_LIST_CMDID,
202 WMI_SCAN_SCH_PRIO_TBL_CMDID,
203 WMI_SCAN_UPDATE_REQUEST_CMDID,
204 WMI_SCAN_PROB_REQ_OUI_CMDID,
205 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
206 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
207 WMI_PDEV_SET_CHANNEL_CMDID,
208 WMI_PDEV_SET_PARAM_CMDID,
209 WMI_PDEV_PKTLOG_ENABLE_CMDID,
210 WMI_PDEV_PKTLOG_DISABLE_CMDID,
211 WMI_PDEV_SET_WMM_PARAMS_CMDID,
212 WMI_PDEV_SET_HT_CAP_IE_CMDID,
213 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
214 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
215 WMI_PDEV_SET_QUIET_MODE_CMDID,
216 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
217 WMI_PDEV_GET_TPC_CONFIG_CMDID,
218 WMI_PDEV_SET_BASE_MACADDR_CMDID,
219 WMI_PDEV_DUMP_CMDID,
220 WMI_PDEV_SET_LED_CONFIG_CMDID,
221 WMI_PDEV_GET_TEMPERATURE_CMDID,
222 WMI_PDEV_SET_LED_FLASHING_CMDID,
223 WMI_PDEV_SMART_ANT_ENABLE_CMDID,
224 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
225 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
226 WMI_PDEV_SET_CTL_TABLE_CMDID,
227 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
228 WMI_PDEV_FIPS_CMDID,
229 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
230 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
231 WMI_PDEV_GET_NFCAL_POWER_CMDID,
232 WMI_PDEV_GET_TPC_CMDID,
233 WMI_MIB_STATS_ENABLE_CMDID,
234 WMI_PDEV_SET_PCL_CMDID,
235 WMI_PDEV_SET_HW_MODE_CMDID,
236 WMI_PDEV_SET_MAC_CONFIG_CMDID,
237 WMI_PDEV_SET_ANTENNA_MODE_CMDID,
238 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
239 WMI_PDEV_WAL_POWER_DEBUG_CMDID,
240 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
241 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
242 WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
243 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
244 WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
245 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
246 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
247 WMI_PDEV_CHECK_CAL_VERSION_CMDID,
248 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
249 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
250 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
251 WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
252 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
253 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
254 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
255 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
256 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
257 WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
258 WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
259 WMI_PDEV_PKTLOG_FILTER_CMDID,
260 WMI_PDEV_SET_RAP_CONFIG_CMDID,
261 WMI_PDEV_DSM_FILTER_CMDID,
262 WMI_PDEV_FRAME_INJECT_CMDID,
263 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID,
264 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
265 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
266 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
267 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
268 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
269 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
270 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
271 WMI_VDEV_DELETE_CMDID,
272 WMI_VDEV_START_REQUEST_CMDID,
273 WMI_VDEV_RESTART_REQUEST_CMDID,
274 WMI_VDEV_UP_CMDID,
275 WMI_VDEV_STOP_CMDID,
276 WMI_VDEV_DOWN_CMDID,
277 WMI_VDEV_SET_PARAM_CMDID,
278 WMI_VDEV_INSTALL_KEY_CMDID,
279 WMI_VDEV_WNM_SLEEPMODE_CMDID,
280 WMI_VDEV_WMM_ADDTS_CMDID,
281 WMI_VDEV_WMM_DELTS_CMDID,
282 WMI_VDEV_SET_WMM_PARAMS_CMDID,
283 WMI_VDEV_SET_GTX_PARAMS_CMDID,
284 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
285 WMI_VDEV_PLMREQ_START_CMDID,
286 WMI_VDEV_PLMREQ_STOP_CMDID,
287 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
288 WMI_VDEV_SET_IE_CMDID,
289 WMI_VDEV_RATEMASK_CMDID,
290 WMI_VDEV_ATF_REQUEST_CMDID,
291 WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
292 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
293 WMI_VDEV_SET_QUIET_MODE_CMDID,
294 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
295 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
296 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
297 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
298 WMI_PEER_DELETE_CMDID,
299 WMI_PEER_FLUSH_TIDS_CMDID,
300 WMI_PEER_SET_PARAM_CMDID,
301 WMI_PEER_ASSOC_CMDID,
302 WMI_PEER_ADD_WDS_ENTRY_CMDID,
303 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
304 WMI_PEER_MCAST_GROUP_CMDID,
305 WMI_PEER_INFO_REQ_CMDID,
306 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
307 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
308 WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
309 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
310 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
311 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
312 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
313 WMI_PEER_ATF_REQUEST_CMDID,
314 WMI_PEER_BWF_REQUEST_CMDID,
315 WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
316 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
317 WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
318 WMI_PEER_ANTDIV_INFO_REQ_CMDID,
319 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
320 WMI_PDEV_SEND_BCN_CMDID,
321 WMI_BCN_TMPL_CMDID,
322 WMI_BCN_FILTER_RX_CMDID,
323 WMI_PRB_REQ_FILTER_RX_CMDID,
324 WMI_MGMT_TX_CMDID,
325 WMI_PRB_TMPL_CMDID,
326 WMI_MGMT_TX_SEND_CMDID,
327 WMI_OFFCHAN_DATA_TX_SEND_CMDID,
328 WMI_PDEV_SEND_FD_CMDID,
329 WMI_BCN_OFFLOAD_CTRL_CMDID,
330 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
331 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
332 WMI_FILS_DISCOVERY_TMPL_CMDID,
333 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
334 WMI_ADDBA_SEND_CMDID,
335 WMI_ADDBA_STATUS_CMDID,
336 WMI_DELBA_SEND_CMDID,
337 WMI_ADDBA_SET_RESP_CMDID,
338 WMI_SEND_SINGLEAMSDU_CMDID,
339 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
340 WMI_STA_POWERSAVE_PARAM_CMDID,
341 WMI_STA_MIMO_PS_MODE_CMDID,
342 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
343 WMI_PDEV_DFS_DISABLE_CMDID,
344 WMI_DFS_PHYERR_FILTER_ENA_CMDID,
345 WMI_DFS_PHYERR_FILTER_DIS_CMDID,
346 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
347 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
348 WMI_VDEV_ADFS_CH_CFG_CMDID,
349 WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
350 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
351 WMI_ROAM_SCAN_RSSI_THRESHOLD,
352 WMI_ROAM_SCAN_PERIOD,
353 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
354 WMI_ROAM_AP_PROFILE,
355 WMI_ROAM_CHAN_LIST,
356 WMI_ROAM_SCAN_CMD,
357 WMI_ROAM_SYNCH_COMPLETE,
358 WMI_ROAM_SET_RIC_REQUEST_CMDID,
359 WMI_ROAM_INVOKE_CMDID,
360 WMI_ROAM_FILTER_CMDID,
361 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
362 WMI_ROAM_CONFIGURE_MAWC_CMDID,
363 WMI_ROAM_SET_MBO_PARAM_CMDID,
364 WMI_ROAM_PER_CONFIG_CMDID,
365 WMI_ROAM_BTM_CONFIG_CMDID,
366 WMI_ENABLE_FILS_CMDID,
367 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
368 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
369 WMI_OFL_SCAN_PERIOD,
370 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
371 WMI_P2P_DEV_SET_DISCOVERABILITY,
372 WMI_P2P_GO_SET_BEACON_IE,
373 WMI_P2P_GO_SET_PROBE_RESP_IE,
374 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
375 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
376 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
377 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
378 WMI_P2P_SET_OPPPS_PARAM_CMDID,
379 WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
380 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
381 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
382 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
383 WMI_AP_PS_EGAP_PARAM_CMDID,
384 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
385 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
386 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
387 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
388 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
389 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
390 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
391 WMI_PDEV_RESUME_CMDID,
392 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
393 WMI_RMV_BCN_FILTER_CMDID,
394 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
395 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
396 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
397 WMI_WOW_ENABLE_CMDID,
398 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
399 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
400 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
401 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
402 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
403 WMI_D0_WOW_ENABLE_DISABLE_CMDID,
404 WMI_EXTWOW_ENABLE_CMDID,
405 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
406 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
407 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
408 WMI_WOW_UDP_SVC_OFLD_CMDID,
409 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
410 WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
411 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
412 WMI_RTT_TSF_CMDID,
413 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
414 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
415 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
416 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
417 WMI_REQUEST_STATS_EXT_CMDID,
418 WMI_REQUEST_LINK_STATS_CMDID,
419 WMI_START_LINK_STATS_CMDID,
420 WMI_CLEAR_LINK_STATS_CMDID,
421 WMI_GET_FW_MEM_DUMP_CMDID,
422 WMI_DEBUG_MESG_FLUSH_CMDID,
423 WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
424 WMI_REQUEST_WLAN_STATS_CMDID,
425 WMI_REQUEST_RCPI_CMDID,
426 WMI_REQUEST_PEER_STATS_INFO_CMDID,
427 WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
428 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
429 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
430 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
431 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
432 WMI_APFIND_CMDID,
433 WMI_PASSPOINT_LIST_CONFIG_CMDID,
434 WMI_NLO_CONFIGURE_MAWC_CMDID,
435 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
436 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
437 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
438 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
439 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
440 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
441 WMI_CHATTER_COALESCING_QUERY_CMDID,
442 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
443 WMI_PEER_TID_DELBA_CMDID,
444 WMI_STA_DTIM_PS_METHOD_CMDID,
445 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
446 WMI_STA_KEEPALIVE_CMDID,
447 WMI_BA_REQ_SSN_CMDID,
448 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
449 WMI_PDEV_UTF_CMDID,
450 WMI_DBGLOG_CFG_CMDID,
451 WMI_PDEV_QVIT_CMDID,
452 WMI_PDEV_FTM_INTG_CMDID,
453 WMI_VDEV_SET_KEEPALIVE_CMDID,
454 WMI_VDEV_GET_KEEPALIVE_CMDID,
455 WMI_FORCE_FW_HANG_CMDID,
456 WMI_SET_MCASTBCAST_FILTER_CMDID,
457 WMI_THERMAL_MGMT_CMDID,
458 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
459 WMI_TPC_CHAINMASK_CONFIG_CMDID,
460 WMI_SET_ANTENNA_DIVERSITY_CMDID,
461 WMI_OCB_SET_SCHED_CMDID,
462 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
463 WMI_LRO_CONFIG_CMDID,
464 WMI_TRANSFER_DATA_TO_FLASH_CMDID,
465 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
466 WMI_VDEV_WISA_CMDID,
467 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
468 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
469 WMI_READ_DATA_FROM_FLASH_CMDID,
470 WMI_THERM_THROT_SET_CONF_CMDID,
471 WMI_RUNTIME_DPD_RECAL_CMDID,
472 WMI_GET_TPC_POWER_CMDID,
473 WMI_IDLE_TRIGGER_MONITOR_CMDID,
474 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
475 WMI_GPIO_OUTPUT_CMDID,
476 WMI_TXBF_CMDID,
477 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
478 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
479 WMI_UNIT_TEST_CMDID,
480 WMI_FWTEST_CMDID,
481 WMI_QBOOST_CFG_CMDID,
482 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
483 WMI_TDLS_PEER_UPDATE_CMDID,
484 WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
485 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
486 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
487 WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
488 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
489 WMI_STA_SMPS_PARAM_CMDID,
490 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
491 WMI_HB_SET_TCP_PARAMS_CMDID,
492 WMI_HB_SET_TCP_PKT_FILTER_CMDID,
493 WMI_HB_SET_UDP_PARAMS_CMDID,
494 WMI_HB_SET_UDP_PKT_FILTER_CMDID,
495 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
496 WMI_RMC_SET_ACTION_PERIOD_CMDID,
497 WMI_RMC_CONFIG_CMDID,
498 WMI_RMC_SET_MANUAL_LEADER_CMDID,
499 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
500 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
501 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
502 WMI_BATCH_SCAN_DISABLE_CMDID,
503 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
504 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
505 WMI_OEM_REQUEST_CMDID,
506 WMI_LPI_OEM_REQ_CMDID,
507 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
508 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
509 WMI_CHAN_AVOID_UPDATE_CMDID,
510 WMI_COEX_CONFIG_CMDID,
511 WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
512 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
513 WMI_SAR_LIMITS_CMDID,
514 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
515 WMI_OBSS_SCAN_DISABLE_CMDID,
516 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
517 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
518 WMI_LPI_START_SCAN_CMDID,
519 WMI_LPI_STOP_SCAN_CMDID,
520 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
521 WMI_EXTSCAN_STOP_CMDID,
522 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
523 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
524 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
525 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
526 WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
527 WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
528 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
529 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
530 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
531 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
532 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
533 WMI_MDNS_SET_FQDN_CMDID,
534 WMI_MDNS_SET_RESPONSE_CMDID,
535 WMI_MDNS_GET_STATS_CMDID,
536 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
537 WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
538 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
539 WMI_OCB_SET_UTC_TIME_CMDID,
540 WMI_OCB_START_TIMING_ADVERT_CMDID,
541 WMI_OCB_STOP_TIMING_ADVERT_CMDID,
542 WMI_OCB_GET_TSF_TIMER_CMDID,
543 WMI_DCC_GET_STATS_CMDID,
544 WMI_DCC_CLEAR_STATS_CMDID,
545 WMI_DCC_UPDATE_NDL_CMDID,
546 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
547 WMI_SOC_SET_HW_MODE_CMDID,
548 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
549 WMI_SOC_SET_ANTENNA_MODE_CMDID,
550 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
551 WMI_PACKET_FILTER_ENABLE_CMDID,
552 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
553 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
554 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
555 WMI_BPF_GET_VDEV_STATS_CMDID,
556 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
557 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
558 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
559 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
560 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
561 WMI_11D_SCAN_START_CMDID,
562 WMI_11D_SCAN_STOP_CMDID,
563 WMI_SET_INIT_COUNTRY_CMDID,
564 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
565 WMI_NDP_INITIATOR_REQ_CMDID,
566 WMI_NDP_RESPONDER_REQ_CMDID,
567 WMI_NDP_END_REQ_CMDID,
568 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
569 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
570 WMI_TWT_DISABLE_CMDID,
571 WMI_TWT_ADD_DIALOG_CMDID,
572 WMI_TWT_DEL_DIALOG_CMDID,
573 WMI_TWT_PAUSE_DIALOG_CMDID,
574 WMI_TWT_RESUME_DIALOG_CMDID,
575 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
576 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
577 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
578 };
579
580 enum wmi_tlv_event_id {
581 WMI_SERVICE_READY_EVENTID = 0x1,
582 WMI_READY_EVENTID,
583 WMI_SERVICE_AVAILABLE_EVENTID,
584 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
585 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
586 WMI_CHAN_INFO_EVENTID,
587 WMI_PHYERR_EVENTID,
588 WMI_PDEV_DUMP_EVENTID,
589 WMI_TX_PAUSE_EVENTID,
590 WMI_DFS_RADAR_EVENTID,
591 WMI_PDEV_L1SS_TRACK_EVENTID,
592 WMI_PDEV_TEMPERATURE_EVENTID,
593 WMI_SERVICE_READY_EXT_EVENTID,
594 WMI_PDEV_FIPS_EVENTID,
595 WMI_PDEV_CHANNEL_HOPPING_EVENTID,
596 WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
597 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
598 WMI_PDEV_TPC_EVENTID,
599 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
600 WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
601 WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
602 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
603 WMI_PDEV_ANTDIV_STATUS_EVENTID,
604 WMI_PDEV_CHIP_POWER_STATS_EVENTID,
605 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
606 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
607 WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
608 WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
609 WMI_PDEV_BSS_CHAN_INFO_EVENTID,
610 WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
611 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
612 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
613 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
614 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
615 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
616 WMI_PDEV_RAP_INFO_EVENTID,
617 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
618 WMI_SERVICE_READY_EXT2_EVENTID,
619 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
620 WMI_VDEV_STOPPED_EVENTID,
621 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
622 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
623 WMI_VDEV_TSF_REPORT_EVENTID,
624 WMI_VDEV_DELETE_RESP_EVENTID,
625 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
626 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
627 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
628 WMI_PEER_INFO_EVENTID,
629 WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
630 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
631 WMI_PEER_STATE_EVENTID,
632 WMI_PEER_ASSOC_CONF_EVENTID,
633 WMI_PEER_DELETE_RESP_EVENTID,
634 WMI_PEER_RATECODE_LIST_EVENTID,
635 WMI_WDS_PEER_EVENTID,
636 WMI_PEER_STA_PS_STATECHG_EVENTID,
637 WMI_PEER_ANTDIV_INFO_EVENTID,
638 WMI_PEER_RESERVED0_EVENTID,
639 WMI_PEER_RESERVED1_EVENTID,
640 WMI_PEER_RESERVED2_EVENTID,
641 WMI_PEER_RESERVED3_EVENTID,
642 WMI_PEER_RESERVED4_EVENTID,
643 WMI_PEER_RESERVED5_EVENTID,
644 WMI_PEER_RESERVED6_EVENTID,
645 WMI_PEER_RESERVED7_EVENTID,
646 WMI_PEER_RESERVED8_EVENTID,
647 WMI_PEER_RESERVED9_EVENTID,
648 WMI_PEER_RESERVED10_EVENTID,
649 WMI_PEER_OPER_MODE_CHANGE_EVENTID,
650 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
651 WMI_HOST_SWBA_EVENTID,
652 WMI_TBTTOFFSET_UPDATE_EVENTID,
653 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
654 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
655 WMI_MGMT_TX_COMPLETION_EVENTID,
656 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
657 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
658 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
659 WMI_HOST_FILS_DISCOVERY_EVENTID,
660 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
661 WMI_TX_ADDBA_COMPLETE_EVENTID,
662 WMI_BA_RSP_SSN_EVENTID,
663 WMI_AGGR_STATE_TRIG_EVENTID,
664 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
665 WMI_PROFILE_MATCH,
666 WMI_ROAM_SYNCH_EVENTID,
667 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
668 WMI_P2P_NOA_EVENTID,
669 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
670 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
671 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
672 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
673 WMI_D0_WOW_DISABLE_ACK_EVENTID,
674 WMI_WOW_INITIAL_WAKEUP_EVENTID,
675 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
676 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
677 WMI_RTT_ERROR_REPORT_EVENTID,
678 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
679 WMI_IFACE_LINK_STATS_EVENTID,
680 WMI_PEER_LINK_STATS_EVENTID,
681 WMI_RADIO_LINK_STATS_EVENTID,
682 WMI_UPDATE_FW_MEM_DUMP_EVENTID,
683 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
684 WMI_INST_RSSI_STATS_EVENTID,
685 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
686 WMI_REPORT_STATS_EVENTID,
687 WMI_UPDATE_RCPI_EVENTID,
688 WMI_PEER_STATS_INFO_EVENTID,
689 WMI_RADIO_CHAN_STATS_EVENTID,
690 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
691 WMI_NLO_SCAN_COMPLETE_EVENTID,
692 WMI_APFIND_EVENTID,
693 WMI_PASSPOINT_MATCH_EVENTID,
694 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
695 WMI_GTK_REKEY_FAIL_EVENTID,
696 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
697 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
698 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
699 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
700 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
701 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
702 WMI_PDEV_UTF_EVENTID,
703 WMI_DEBUG_MESG_EVENTID,
704 WMI_UPDATE_STATS_EVENTID,
705 WMI_DEBUG_PRINT_EVENTID,
706 WMI_DCS_INTERFERENCE_EVENTID,
707 WMI_PDEV_QVIT_EVENTID,
708 WMI_WLAN_PROFILE_DATA_EVENTID,
709 WMI_PDEV_FTM_INTG_EVENTID,
710 WMI_WLAN_FREQ_AVOID_EVENTID,
711 WMI_VDEV_GET_KEEPALIVE_EVENTID,
712 WMI_THERMAL_MGMT_EVENTID,
713 WMI_DIAG_DATA_CONTAINER_EVENTID,
714 WMI_HOST_AUTO_SHUTDOWN_EVENTID,
715 WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
716 WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
717 WMI_DIAG_EVENTID,
718 WMI_OCB_SET_SCHED_EVENTID,
719 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
720 WMI_RSSI_BREACH_EVENTID,
721 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
722 WMI_PDEV_UTF_SCPC_EVENTID,
723 WMI_READ_DATA_FROM_FLASH_EVENTID,
724 WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
725 WMI_PKGID_EVENTID,
726 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
727 WMI_UPLOADH_EVENTID,
728 WMI_CAPTUREH_EVENTID,
729 WMI_RFKILL_STATE_CHANGE_EVENTID,
730 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
731 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
732 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
733 WMI_BATCH_SCAN_RESULT_EVENTID,
734 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
735 WMI_OEM_MEASUREMENT_REPORT_EVENTID,
736 WMI_OEM_ERROR_REPORT_EVENTID,
737 WMI_OEM_RESPONSE_EVENTID,
738 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
739 WMI_NAN_DISC_IFACE_CREATED_EVENTID,
740 WMI_NAN_DISC_IFACE_DELETED_EVENTID,
741 WMI_NAN_STARTED_CLUSTER_EVENTID,
742 WMI_NAN_JOINED_CLUSTER_EVENTID,
743 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
744 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
745 WMI_LPI_STATUS_EVENTID,
746 WMI_LPI_HANDOFF_EVENTID,
747 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
748 WMI_EXTSCAN_OPERATION_EVENTID,
749 WMI_EXTSCAN_TABLE_USAGE_EVENTID,
750 WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
751 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
752 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
753 WMI_EXTSCAN_CAPABILITIES_EVENTID,
754 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
755 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
756 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
757 WMI_SAP_OFL_DEL_STA_EVENTID,
758 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
759 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
760 WMI_DCC_GET_STATS_RESP_EVENTID,
761 WMI_DCC_UPDATE_NDL_RESP_EVENTID,
762 WMI_DCC_STATS_EVENTID,
763 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
764 WMI_SOC_HW_MODE_TRANSITION_EVENTID,
765 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
766 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
767 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
768 WMI_BPF_VDEV_STATS_INFO_EVENTID,
769 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
770 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
771 WMI_11D_NEW_COUNTRY_EVENTID,
772 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
773 WMI_NDP_INITIATOR_RSP_EVENTID,
774 WMI_NDP_RESPONDER_RSP_EVENTID,
775 WMI_NDP_END_RSP_EVENTID,
776 WMI_NDP_INDICATION_EVENTID,
777 WMI_NDP_CONFIRM_EVENTID,
778 WMI_NDP_END_INDICATION_EVENTID,
779
780 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
781 WMI_TWT_DISABLE_EVENTID,
782 WMI_TWT_ADD_DIALOG_EVENTID,
783 WMI_TWT_DEL_DIALOG_EVENTID,
784 WMI_TWT_PAUSE_DIALOG_EVENTID,
785 WMI_TWT_RESUME_DIALOG_EVENTID,
786 };
787
788 enum wmi_tlv_pdev_param {
789 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
790 WMI_PDEV_PARAM_RX_CHAIN_MASK,
791 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
792 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
793 WMI_PDEV_PARAM_TXPOWER_SCALE,
794 WMI_PDEV_PARAM_BEACON_GEN_MODE,
795 WMI_PDEV_PARAM_BEACON_TX_MODE,
796 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
797 WMI_PDEV_PARAM_PROTECTION_MODE,
798 WMI_PDEV_PARAM_DYNAMIC_BW,
799 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
800 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
801 WMI_PDEV_PARAM_STA_KICKOUT_TH,
802 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
803 WMI_PDEV_PARAM_LTR_ENABLE,
804 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
805 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
806 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
807 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
808 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
809 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
810 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
811 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
812 WMI_PDEV_PARAM_L1SS_ENABLE,
813 WMI_PDEV_PARAM_DSLEEP_ENABLE,
814 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
815 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
816 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
817 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
818 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
819 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
820 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
821 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
822 WMI_PDEV_PARAM_PMF_QOS,
823 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
824 WMI_PDEV_PARAM_DCS,
825 WMI_PDEV_PARAM_ANI_ENABLE,
826 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
827 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
828 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
829 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
830 WMI_PDEV_PARAM_DYNTXCHAIN,
831 WMI_PDEV_PARAM_PROXY_STA,
832 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
833 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
834 WMI_PDEV_PARAM_RFKILL_ENABLE,
835 WMI_PDEV_PARAM_BURST_DUR,
836 WMI_PDEV_PARAM_BURST_ENABLE,
837 WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
838 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
839 WMI_PDEV_PARAM_L1SS_TRACK,
840 WMI_PDEV_PARAM_HYST_EN,
841 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
842 WMI_PDEV_PARAM_LED_SYS_STATE,
843 WMI_PDEV_PARAM_LED_ENABLE,
844 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
845 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
846 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
847 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
848 WMI_PDEV_PARAM_CTS_CBW,
849 WMI_PDEV_PARAM_WNTS_CONFIG,
850 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
851 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
852 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
853 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
854 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
855 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
856 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
857 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
858 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
859 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
860 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
861 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
862 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
863 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
864 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
865 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
866 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
867 WMI_PDEV_PARAM_TXPOWER_DECR_DB,
868 WMI_PDEV_PARAM_AGGR_BURST,
869 WMI_PDEV_PARAM_RX_DECAP_MODE,
870 WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
871 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
872 WMI_PDEV_PARAM_ANTENNA_GAIN,
873 WMI_PDEV_PARAM_RX_FILTER,
874 WMI_PDEV_SET_MCAST_TO_UCAST_TID,
875 WMI_PDEV_PARAM_PROXY_STA_MODE,
876 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
877 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
878 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
879 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
880 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
881 WMI_PDEV_PARAM_BLOCK_INTERBSS,
882 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
883 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
884 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
885 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
886 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
887 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
888 WMI_PDEV_PARAM_EN_STATS,
889 WMI_PDEV_PARAM_MU_GROUP_POLICY,
890 WMI_PDEV_PARAM_NOISE_DETECTION,
891 WMI_PDEV_PARAM_NOISE_THRESHOLD,
892 WMI_PDEV_PARAM_DPD_ENABLE,
893 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
894 WMI_PDEV_PARAM_ATF_STRICT_SCH,
895 WMI_PDEV_PARAM_ATF_SCHED_DURATION,
896 WMI_PDEV_PARAM_ANT_PLZN,
897 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
898 WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
899 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
900 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
901 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
902 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
903 WMI_PDEV_PARAM_CCA_THRESHOLD,
904 WMI_PDEV_PARAM_RTS_FIXED_RATE,
905 WMI_PDEV_PARAM_PDEV_RESET,
906 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
907 WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
908 WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
909 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
910 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
911 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
912 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
913 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
914 WMI_PDEV_PARAM_PROPAGATION_DELAY,
915 WMI_PDEV_PARAM_ENA_ANT_DIV,
916 WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
917 WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
918 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
919 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
920 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
921 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
922 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
923 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
924 WMI_PDEV_PARAM_TX_SCH_DELAY,
925 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
926 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
927 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
928 WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
929 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
930 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
931 WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
932 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc,
933 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe,
934 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6,
935 };
936
937 enum wmi_tlv_vdev_param {
938 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
939 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
940 WMI_VDEV_PARAM_BEACON_INTERVAL,
941 WMI_VDEV_PARAM_LISTEN_INTERVAL,
942 WMI_VDEV_PARAM_MULTICAST_RATE,
943 WMI_VDEV_PARAM_MGMT_TX_RATE,
944 WMI_VDEV_PARAM_SLOT_TIME,
945 WMI_VDEV_PARAM_PREAMBLE,
946 WMI_VDEV_PARAM_SWBA_TIME,
947 WMI_VDEV_STATS_UPDATE_PERIOD,
948 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
949 WMI_VDEV_HOST_SWBA_INTERVAL,
950 WMI_VDEV_PARAM_DTIM_PERIOD,
951 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
952 WMI_VDEV_PARAM_WDS,
953 WMI_VDEV_PARAM_ATIM_WINDOW,
954 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
955 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
956 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
957 WMI_VDEV_PARAM_FEATURE_WMM,
958 WMI_VDEV_PARAM_CHWIDTH,
959 WMI_VDEV_PARAM_CHEXTOFFSET,
960 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
961 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
962 WMI_VDEV_PARAM_MGMT_RATE,
963 WMI_VDEV_PARAM_PROTECTION_MODE,
964 WMI_VDEV_PARAM_FIXED_RATE,
965 WMI_VDEV_PARAM_SGI,
966 WMI_VDEV_PARAM_LDPC,
967 WMI_VDEV_PARAM_TX_STBC,
968 WMI_VDEV_PARAM_RX_STBC,
969 WMI_VDEV_PARAM_INTRA_BSS_FWD,
970 WMI_VDEV_PARAM_DEF_KEYID,
971 WMI_VDEV_PARAM_NSS,
972 WMI_VDEV_PARAM_BCAST_DATA_RATE,
973 WMI_VDEV_PARAM_MCAST_DATA_RATE,
974 WMI_VDEV_PARAM_MCAST_INDICATE,
975 WMI_VDEV_PARAM_DHCP_INDICATE,
976 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
977 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
978 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
979 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
980 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
981 WMI_VDEV_PARAM_ENABLE_RTSCTS,
982 WMI_VDEV_PARAM_TXBF,
983 WMI_VDEV_PARAM_PACKET_POWERSAVE,
984 WMI_VDEV_PARAM_DROP_UNENCRY,
985 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
986 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
987 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
988 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
989 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
990 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
991 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
992 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
993 WMI_VDEV_PARAM_TX_PWRLIMIT,
994 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
995 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
996 WMI_VDEV_PARAM_ENABLE_RMC,
997 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
998 WMI_VDEV_PARAM_MAX_RATE,
999 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1000 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1001 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1002 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1003 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1004 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1005 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1006 WMI_VDEV_PARAM_INACTIVITY_CNT,
1007 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1008 WMI_VDEV_PARAM_DTIM_POLICY,
1009 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1010 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1011 WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1012 WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1013 WMI_VDEV_PARAM_DISCONNECT_TH,
1014 WMI_VDEV_PARAM_RTSCTS_RATE,
1015 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1016 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1017 WMI_VDEV_PARAM_TXPOWER_SCALE,
1018 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1019 WMI_VDEV_PARAM_MCAST2UCAST_SET,
1020 WMI_VDEV_PARAM_RC_NUM_RETRIES,
1021 WMI_VDEV_PARAM_CABQ_MAXDUR,
1022 WMI_VDEV_PARAM_MFPTEST_SET,
1023 WMI_VDEV_PARAM_RTS_FIXED_RATE,
1024 WMI_VDEV_PARAM_VHT_SGIMASK,
1025 WMI_VDEV_PARAM_VHT80_RATEMASK,
1026 WMI_VDEV_PARAM_PROXY_STA,
1027 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1028 WMI_VDEV_PARAM_RX_DECAP_TYPE,
1029 WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1030 WMI_VDEV_PARAM_SENSOR_AP,
1031 WMI_VDEV_PARAM_BEACON_RATE,
1032 WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1033 WMI_VDEV_PARAM_STA_KICKOUT,
1034 WMI_VDEV_PARAM_CAPABILITIES,
1035 WMI_VDEV_PARAM_TSF_INCREMENT,
1036 WMI_VDEV_PARAM_AMPDU_PER_AC,
1037 WMI_VDEV_PARAM_RX_FILTER,
1038 WMI_VDEV_PARAM_MGMT_TX_POWER,
1039 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1040 WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1041 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1042 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1043 WMI_VDEV_PARAM_HE_DCM,
1044 WMI_VDEV_PARAM_HE_RANGE_EXT,
1045 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1046 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1047 WMI_VDEV_PARAM_BA_MODE = 0x7e,
1048 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1049 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1050 WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1051 WMI_VDEV_PARAM_BSS_COLOR,
1052 WMI_VDEV_PARAM_SET_HEMU_MODE,
1053 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1054 };
1055
1056 enum wmi_tlv_peer_flags {
1057 WMI_TLV_PEER_AUTH = 0x00000001,
1058 WMI_TLV_PEER_QOS = 0x00000002,
1059 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
1060 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
1061 WMI_TLV_PEER_APSD = 0x00000800,
1062 WMI_TLV_PEER_HT = 0x00001000,
1063 WMI_TLV_PEER_40MHZ = 0x00002000,
1064 WMI_TLV_PEER_STBC = 0x00008000,
1065 WMI_TLV_PEER_LDPC = 0x00010000,
1066 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
1067 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
1068 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
1069 WMI_TLV_PEER_VHT = 0x02000000,
1070 WMI_TLV_PEER_80MHZ = 0x04000000,
1071 WMI_TLV_PEER_PMF = 0x08000000,
1072 WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1073 WMI_PEER_160MHZ = 0x40000000,
1074 WMI_PEER_SAFEMODE_EN = 0x80000000,
1075
1076 };
1077
1078 /** Enum list of TLV Tags for each parameter structure type. */
1079 enum wmi_tlv_tag {
1080 WMI_TAG_LAST_RESERVED = 15,
1081 WMI_TAG_FIRST_ARRAY_ENUM,
1082 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1083 WMI_TAG_ARRAY_BYTE,
1084 WMI_TAG_ARRAY_STRUCT,
1085 WMI_TAG_ARRAY_FIXED_STRUCT,
1086 WMI_TAG_LAST_ARRAY_ENUM = 31,
1087 WMI_TAG_SERVICE_READY_EVENT,
1088 WMI_TAG_HAL_REG_CAPABILITIES,
1089 WMI_TAG_WLAN_HOST_MEM_REQ,
1090 WMI_TAG_READY_EVENT,
1091 WMI_TAG_SCAN_EVENT,
1092 WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1093 WMI_TAG_CHAN_INFO_EVENT,
1094 WMI_TAG_COMB_PHYERR_RX_HDR,
1095 WMI_TAG_VDEV_START_RESPONSE_EVENT,
1096 WMI_TAG_VDEV_STOPPED_EVENT,
1097 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1098 WMI_TAG_PEER_STA_KICKOUT_EVENT,
1099 WMI_TAG_MGMT_RX_HDR,
1100 WMI_TAG_TBTT_OFFSET_EVENT,
1101 WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1102 WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1103 WMI_TAG_ROAM_EVENT,
1104 WMI_TAG_WOW_EVENT_INFO,
1105 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1106 WMI_TAG_RTT_EVENT_HEADER,
1107 WMI_TAG_RTT_ERROR_REPORT_EVENT,
1108 WMI_TAG_RTT_MEAS_EVENT,
1109 WMI_TAG_ECHO_EVENT,
1110 WMI_TAG_FTM_INTG_EVENT,
1111 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1112 WMI_TAG_GPIO_INPUT_EVENT,
1113 WMI_TAG_CSA_EVENT,
1114 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1115 WMI_TAG_IGTK_INFO,
1116 WMI_TAG_DCS_INTERFERENCE_EVENT,
1117 WMI_TAG_ATH_DCS_CW_INT,
1118 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1119 WMI_TAG_ATH_DCS_CW_INT,
1120 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1121 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1122 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1123 WMI_TAG_WLAN_PROFILE_CTX_T,
1124 WMI_TAG_WLAN_PROFILE_T,
1125 WMI_TAG_PDEV_QVIT_EVENT,
1126 WMI_TAG_HOST_SWBA_EVENT,
1127 WMI_TAG_TIM_INFO,
1128 WMI_TAG_P2P_NOA_INFO,
1129 WMI_TAG_STATS_EVENT,
1130 WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1131 WMI_TAG_AVOID_FREQ_RANGE_DESC,
1132 WMI_TAG_GTK_REKEY_FAIL_EVENT,
1133 WMI_TAG_INIT_CMD,
1134 WMI_TAG_RESOURCE_CONFIG,
1135 WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1136 WMI_TAG_START_SCAN_CMD,
1137 WMI_TAG_STOP_SCAN_CMD,
1138 WMI_TAG_SCAN_CHAN_LIST_CMD,
1139 WMI_TAG_CHANNEL,
1140 WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1141 WMI_TAG_PDEV_SET_PARAM_CMD,
1142 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1143 WMI_TAG_WMM_PARAMS,
1144 WMI_TAG_PDEV_SET_QUIET_CMD,
1145 WMI_TAG_VDEV_CREATE_CMD,
1146 WMI_TAG_VDEV_DELETE_CMD,
1147 WMI_TAG_VDEV_START_REQUEST_CMD,
1148 WMI_TAG_P2P_NOA_DESCRIPTOR,
1149 WMI_TAG_P2P_GO_SET_BEACON_IE,
1150 WMI_TAG_GTK_OFFLOAD_CMD,
1151 WMI_TAG_VDEV_UP_CMD,
1152 WMI_TAG_VDEV_STOP_CMD,
1153 WMI_TAG_VDEV_DOWN_CMD,
1154 WMI_TAG_VDEV_SET_PARAM_CMD,
1155 WMI_TAG_VDEV_INSTALL_KEY_CMD,
1156 WMI_TAG_PEER_CREATE_CMD,
1157 WMI_TAG_PEER_DELETE_CMD,
1158 WMI_TAG_PEER_FLUSH_TIDS_CMD,
1159 WMI_TAG_PEER_SET_PARAM_CMD,
1160 WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1161 WMI_TAG_VHT_RATE_SET,
1162 WMI_TAG_BCN_TMPL_CMD,
1163 WMI_TAG_PRB_TMPL_CMD,
1164 WMI_TAG_BCN_PRB_INFO,
1165 WMI_TAG_PEER_TID_ADDBA_CMD,
1166 WMI_TAG_PEER_TID_DELBA_CMD,
1167 WMI_TAG_STA_POWERSAVE_MODE_CMD,
1168 WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1169 WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1170 WMI_TAG_ROAM_SCAN_MODE,
1171 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1172 WMI_TAG_ROAM_SCAN_PERIOD,
1173 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1174 WMI_TAG_PDEV_SUSPEND_CMD,
1175 WMI_TAG_PDEV_RESUME_CMD,
1176 WMI_TAG_ADD_BCN_FILTER_CMD,
1177 WMI_TAG_RMV_BCN_FILTER_CMD,
1178 WMI_TAG_WOW_ENABLE_CMD,
1179 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1180 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1181 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1182 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1183 WMI_TAG_ARP_OFFLOAD_TUPLE,
1184 WMI_TAG_NS_OFFLOAD_TUPLE,
1185 WMI_TAG_FTM_INTG_CMD,
1186 WMI_TAG_STA_KEEPALIVE_CMD,
1187 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1188 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1189 WMI_TAG_AP_PS_PEER_CMD,
1190 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1191 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1192 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1193 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1194 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1195 WMI_TAG_WOW_DEL_PATTERN_CMD,
1196 WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1197 WMI_TAG_RTT_MEASREQ_HEAD,
1198 WMI_TAG_RTT_MEASREQ_BODY,
1199 WMI_TAG_RTT_TSF_CMD,
1200 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1201 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1202 WMI_TAG_REQUEST_STATS_CMD,
1203 WMI_TAG_NLO_CONFIG_CMD,
1204 WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1205 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1206 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1207 WMI_TAG_CHATTER_SET_MODE_CMD,
1208 WMI_TAG_ECHO_CMD,
1209 WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1210 WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1211 WMI_TAG_FORCE_FW_HANG_CMD,
1212 WMI_TAG_GPIO_CONFIG_CMD,
1213 WMI_TAG_GPIO_OUTPUT_CMD,
1214 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1215 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1216 WMI_TAG_BCN_TX_HDR,
1217 WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1218 WMI_TAG_MGMT_TX_HDR,
1219 WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1220 WMI_TAG_ADDBA_SEND_CMD,
1221 WMI_TAG_DELBA_SEND_CMD,
1222 WMI_TAG_ADDBA_SETRESPONSE_CMD,
1223 WMI_TAG_SEND_SINGLEAMSDU_CMD,
1224 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1225 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1226 WMI_TAG_PDEV_SET_HT_IE_CMD,
1227 WMI_TAG_PDEV_SET_VHT_IE_CMD,
1228 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1229 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1230 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1231 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1232 WMI_TAG_PEER_MCAST_GROUP_CMD,
1233 WMI_TAG_ROAM_AP_PROFILE,
1234 WMI_TAG_AP_PROFILE,
1235 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1236 WMI_TAG_PDEV_DFS_ENABLE_CMD,
1237 WMI_TAG_PDEV_DFS_DISABLE_CMD,
1238 WMI_TAG_WOW_ADD_PATTERN_CMD,
1239 WMI_TAG_WOW_BITMAP_PATTERN_T,
1240 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1241 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1242 WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1243 WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1244 WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1245 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1246 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1247 WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1248 WMI_TAG_TXBF_CMD,
1249 WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1250 WMI_TAG_NLO_EVENT,
1251 WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1252 WMI_TAG_UPLOAD_H_HDR,
1253 WMI_TAG_CAPTURE_H_EVENT_HDR,
1254 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1255 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1256 WMI_TAG_VDEV_WMM_ADDTS_CMD,
1257 WMI_TAG_VDEV_WMM_DELTS_CMD,
1258 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1259 WMI_TAG_TDLS_SET_STATE_CMD,
1260 WMI_TAG_TDLS_PEER_UPDATE_CMD,
1261 WMI_TAG_TDLS_PEER_EVENT,
1262 WMI_TAG_TDLS_PEER_CAPABILITIES,
1263 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1264 WMI_TAG_ROAM_CHAN_LIST,
1265 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1266 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1267 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1268 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1269 WMI_TAG_BA_REQ_SSN_CMD,
1270 WMI_TAG_BA_RSP_SSN_EVENT,
1271 WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1272 WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1273 WMI_TAG_P2P_SET_OPPPS_CMD,
1274 WMI_TAG_P2P_SET_NOA_CMD,
1275 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1276 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1277 WMI_TAG_STA_SMPS_PARAM_CMD,
1278 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1279 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1280 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1281 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1282 WMI_TAG_P2P_NOA_EVENT,
1283 WMI_TAG_HB_SET_ENABLE_CMD,
1284 WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1285 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1286 WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1287 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1288 WMI_TAG_HB_IND_EVENT,
1289 WMI_TAG_TX_PAUSE_EVENT,
1290 WMI_TAG_RFKILL_EVENT,
1291 WMI_TAG_DFS_RADAR_EVENT,
1292 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1293 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1294 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1295 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1296 WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1297 WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1298 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1299 WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1300 WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1301 WMI_TAG_VDEV_PLMREQ_START_CMD,
1302 WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1303 WMI_TAG_THERMAL_MGMT_CMD,
1304 WMI_TAG_THERMAL_MGMT_EVENT,
1305 WMI_TAG_PEER_INFO_REQ_CMD,
1306 WMI_TAG_PEER_INFO_EVENT,
1307 WMI_TAG_PEER_INFO,
1308 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1309 WMI_TAG_RMC_SET_MODE_CMD,
1310 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1311 WMI_TAG_RMC_CONFIG_CMD,
1312 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1313 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1314 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1315 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1316 WMI_TAG_NAN_CMD_PARAM,
1317 WMI_TAG_NAN_EVENT_HDR,
1318 WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1319 WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1320 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1321 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1322 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1323 WMI_TAG_AGGR_STATE_TRIG_EVENT,
1324 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1325 WMI_TAG_ROAM_SCAN_CMD,
1326 WMI_TAG_REQ_STATS_EXT_CMD,
1327 WMI_TAG_STATS_EXT_EVENT,
1328 WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1329 WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1330 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1331 WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1332 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1333 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1334 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1335 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1336 WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1337 WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1338 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1339 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1340 WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1341 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1342 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1343 WMI_TAG_START_LINK_STATS_CMD,
1344 WMI_TAG_CLEAR_LINK_STATS_CMD,
1345 WMI_TAG_REQUEST_LINK_STATS_CMD,
1346 WMI_TAG_IFACE_LINK_STATS_EVENT,
1347 WMI_TAG_RADIO_LINK_STATS_EVENT,
1348 WMI_TAG_PEER_STATS_EVENT,
1349 WMI_TAG_CHANNEL_STATS,
1350 WMI_TAG_RADIO_LINK_STATS,
1351 WMI_TAG_RATE_STATS,
1352 WMI_TAG_PEER_LINK_STATS,
1353 WMI_TAG_WMM_AC_STATS,
1354 WMI_TAG_IFACE_LINK_STATS,
1355 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1356 WMI_TAG_LPI_START_SCAN_CMD,
1357 WMI_TAG_LPI_STOP_SCAN_CMD,
1358 WMI_TAG_LPI_RESULT_EVENT,
1359 WMI_TAG_PEER_STATE_EVENT,
1360 WMI_TAG_EXTSCAN_BUCKET_CMD,
1361 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1362 WMI_TAG_EXTSCAN_START_CMD,
1363 WMI_TAG_EXTSCAN_STOP_CMD,
1364 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1365 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1366 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1367 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1368 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1369 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1370 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1371 WMI_TAG_EXTSCAN_OPERATION_EVENT,
1372 WMI_TAG_EXTSCAN_START_STOP_EVENT,
1373 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1374 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1375 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1376 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1377 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1378 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1379 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1380 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1381 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1382 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1383 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1384 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1385 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1386 WMI_TAG_UNIT_TEST_CMD,
1387 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1388 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1389 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1390 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1391 WMI_TAG_ROAM_SYNCH_EVENT,
1392 WMI_TAG_ROAM_SYNCH_COMPLETE,
1393 WMI_TAG_EXTWOW_ENABLE_CMD,
1394 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1395 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1396 WMI_TAG_LPI_STATUS_EVENT,
1397 WMI_TAG_LPI_HANDOFF_EVENT,
1398 WMI_TAG_VDEV_RATE_STATS_EVENT,
1399 WMI_TAG_VDEV_RATE_HT_INFO,
1400 WMI_TAG_RIC_REQUEST,
1401 WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1402 WMI_TAG_PDEV_TEMPERATURE_EVENT,
1403 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1404 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1405 WMI_TAG_RIC_TSPEC,
1406 WMI_TAG_TPC_CHAINMASK_CONFIG,
1407 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1408 WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1409 WMI_TAG_KEY_MATERIAL,
1410 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1411 WMI_TAG_SET_LED_FLASHING_CMD,
1412 WMI_TAG_MDNS_OFFLOAD_CMD,
1413 WMI_TAG_MDNS_SET_FQDN_CMD,
1414 WMI_TAG_MDNS_SET_RESP_CMD,
1415 WMI_TAG_MDNS_GET_STATS_CMD,
1416 WMI_TAG_MDNS_STATS_EVENT,
1417 WMI_TAG_ROAM_INVOKE_CMD,
1418 WMI_TAG_PDEV_RESUME_EVENT,
1419 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1420 WMI_TAG_SAP_OFL_ENABLE_CMD,
1421 WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1422 WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1423 WMI_TAG_APFIND_CMD_PARAM,
1424 WMI_TAG_APFIND_EVENT_HDR,
1425 WMI_TAG_OCB_SET_SCHED_CMD,
1426 WMI_TAG_OCB_SET_SCHED_EVENT,
1427 WMI_TAG_OCB_SET_CONFIG_CMD,
1428 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1429 WMI_TAG_OCB_SET_UTC_TIME_CMD,
1430 WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1431 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1432 WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1433 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1434 WMI_TAG_DCC_GET_STATS_CMD,
1435 WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1436 WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1437 WMI_TAG_DCC_CLEAR_STATS_CMD,
1438 WMI_TAG_DCC_UPDATE_NDL_CMD,
1439 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1440 WMI_TAG_DCC_STATS_EVENT,
1441 WMI_TAG_OCB_CHANNEL,
1442 WMI_TAG_OCB_SCHEDULE_ELEMENT,
1443 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1444 WMI_TAG_DCC_NDL_CHAN,
1445 WMI_TAG_QOS_PARAMETER,
1446 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1447 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1448 WMI_TAG_ROAM_FILTER,
1449 WMI_TAG_PASSPOINT_CONFIG_CMD,
1450 WMI_TAG_PASSPOINT_EVENT_HDR,
1451 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1452 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1453 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1454 WMI_TAG_VDEV_TSF_REPORT_EVENT,
1455 WMI_TAG_GET_FW_MEM_DUMP,
1456 WMI_TAG_UPDATE_FW_MEM_DUMP,
1457 WMI_TAG_FW_MEM_DUMP_PARAMS,
1458 WMI_TAG_DEBUG_MESG_FLUSH,
1459 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1460 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1461 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1462 WMI_TAG_VDEV_SET_IE_CMD,
1463 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1464 WMI_TAG_RSSI_BREACH_EVENT,
1465 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1466 WMI_TAG_SOC_SET_PCL_CMD,
1467 WMI_TAG_SOC_SET_HW_MODE_CMD,
1468 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1469 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1470 WMI_TAG_VDEV_TXRX_STREAMS,
1471 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1472 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1473 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1474 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1475 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1476 WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1477 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1478 WMI_TAG_PACKET_FILTER_CONFIG,
1479 WMI_TAG_PACKET_FILTER_ENABLE,
1480 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1481 WMI_TAG_MGMT_TX_SEND_CMD,
1482 WMI_TAG_MGMT_TX_COMPL_EVENT,
1483 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1484 WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1485 WMI_TAG_LRO_INFO_CMD,
1486 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1487 WMI_TAG_SERVICE_READY_EXT_EVENT,
1488 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1489 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1490 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1491 WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1492 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1493 WMI_TAG_PEER_ASSOC_CONF_EVENT,
1494 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1495 WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1496 WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1497 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1498 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1499 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1500 WMI_TAG_SCPC_EVENT,
1501 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1502 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1503 WMI_TAG_BPF_GET_CAPABILITY_CMD,
1504 WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1505 WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1506 WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1507 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1508 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1509 WMI_TAG_VDEV_DELETE_RESP_EVENT,
1510 WMI_TAG_PEER_DELETE_RESP_EVENT,
1511 WMI_TAG_ROAM_DENSE_THRES_PARAM,
1512 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1513 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1514 WMI_TAG_VDEV_CONFIG_RATEMASK,
1515 WMI_TAG_PDEV_FIPS_CMD,
1516 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1517 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1518 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1519 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1520 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1521 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1522 WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1523 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1524 WMI_TAG_FWTEST_SET_PARAM_CMD,
1525 WMI_TAG_PEER_ATF_REQUEST,
1526 WMI_TAG_VDEV_ATF_REQUEST,
1527 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1528 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1529 WMI_TAG_INST_RSSI_STATS_RESP,
1530 WMI_TAG_MED_UTIL_REPORT_EVENT,
1531 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1532 WMI_TAG_WDS_ADDR_EVENT,
1533 WMI_TAG_PEER_RATECODE_LIST_EVENT,
1534 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1535 WMI_TAG_PDEV_TPC_EVENT,
1536 WMI_TAG_ANI_OFDM_EVENT,
1537 WMI_TAG_ANI_CCK_EVENT,
1538 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1539 WMI_TAG_PDEV_FIPS_EVENT,
1540 WMI_TAG_ATF_PEER_INFO,
1541 WMI_TAG_PDEV_GET_TPC_CMD,
1542 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1543 WMI_TAG_QBOOST_CFG_CMD,
1544 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1545 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1546 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1547 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1548 WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1549 WMI_TAG_PEER_MCS_RATE_INFO,
1550 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1551 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1552 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1553 WMI_TAG_MU_REPORT_TOTAL_MU,
1554 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1555 WMI_TAG_ROAM_SET_MBO,
1556 WMI_TAG_MIB_STATS_ENABLE_CMD,
1557 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1558 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1559 WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1560 WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1561 WMI_TAG_NDI_GET_CAP_REQ,
1562 WMI_TAG_NDP_INITIATOR_REQ,
1563 WMI_TAG_NDP_RESPONDER_REQ,
1564 WMI_TAG_NDP_END_REQ,
1565 WMI_TAG_NDI_CAP_RSP_EVENT,
1566 WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1567 WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1568 WMI_TAG_NDP_END_RSP_EVENT,
1569 WMI_TAG_NDP_INDICATION_EVENT,
1570 WMI_TAG_NDP_CONFIRM_EVENT,
1571 WMI_TAG_NDP_END_INDICATION_EVENT,
1572 WMI_TAG_VDEV_SET_QUIET_CMD,
1573 WMI_TAG_PDEV_SET_PCL_CMD,
1574 WMI_TAG_PDEV_SET_HW_MODE_CMD,
1575 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1576 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1577 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1578 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1579 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1580 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1581 WMI_TAG_COEX_CONFIG_CMD,
1582 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1583 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1584 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1585 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1586 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1587 WMI_TAG_MAC_PHY_CAPABILITIES,
1588 WMI_TAG_HW_MODE_CAPABILITIES,
1589 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1590 WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1591 WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1592 WMI_TAG_VDEV_WISA_CMD,
1593 WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1594 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1595 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1596 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1597 WMI_TAG_NDP_END_RSP_PER_NDI,
1598 WMI_TAG_PEER_BWF_REQUEST,
1599 WMI_TAG_BWF_PEER_INFO,
1600 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1601 WMI_TAG_RMC_SET_LEADER_CMD,
1602 WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1603 WMI_TAG_PER_CHAIN_RSSI_STATS,
1604 WMI_TAG_RSSI_STATS,
1605 WMI_TAG_P2P_LO_START_CMD,
1606 WMI_TAG_P2P_LO_STOP_CMD,
1607 WMI_TAG_P2P_LO_STOPPED_EVENT,
1608 WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1609 WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1610 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1611 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1612 WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1613 WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1614 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1615 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1616 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1617 WMI_TAG_TLV_BUF_LEN_PARAM,
1618 WMI_TAG_SERVICE_AVAILABLE_EVENT,
1619 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1620 WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1621 WMI_TAG_PEER_ANTDIV_INFO,
1622 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1623 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1624 WMI_TAG_MNT_FILTER_CMD,
1625 WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1626 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1627 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1628 WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1629 WMI_TAG_CHAN_CCA_STATS,
1630 WMI_TAG_PEER_SIGNAL_STATS,
1631 WMI_TAG_TX_STATS,
1632 WMI_TAG_PEER_AC_TX_STATS,
1633 WMI_TAG_RX_STATS,
1634 WMI_TAG_PEER_AC_RX_STATS,
1635 WMI_TAG_REPORT_STATS_EVENT,
1636 WMI_TAG_CHAN_CCA_STATS_THRESH,
1637 WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1638 WMI_TAG_TX_STATS_THRESH,
1639 WMI_TAG_RX_STATS_THRESH,
1640 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1641 WMI_TAG_REQUEST_WLAN_STATS_CMD,
1642 WMI_TAG_RX_AGGR_FAILURE_EVENT,
1643 WMI_TAG_RX_AGGR_FAILURE_INFO,
1644 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1645 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1646 WMI_TAG_PDEV_BAND_TO_MAC,
1647 WMI_TAG_TBTT_OFFSET_INFO,
1648 WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1649 WMI_TAG_SAR_LIMITS_CMD,
1650 WMI_TAG_SAR_LIMIT_CMD_ROW,
1651 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1652 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1653 WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1654 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1655 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1656 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1657 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1658 WMI_TAG_VENDOR_OUI,
1659 WMI_TAG_REQUEST_RCPI_CMD,
1660 WMI_TAG_UPDATE_RCPI_EVENT,
1661 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1662 WMI_TAG_PEER_STATS_INFO,
1663 WMI_TAG_PEER_STATS_INFO_EVENT,
1664 WMI_TAG_PKGID_EVENT,
1665 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1666 WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1667 WMI_TAG_REGULATORY_RULE_STRUCT,
1668 WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1669 WMI_TAG_11D_SCAN_START_CMD,
1670 WMI_TAG_11D_SCAN_STOP_CMD,
1671 WMI_TAG_11D_NEW_COUNTRY_EVENT,
1672 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1673 WMI_TAG_RADIO_CHAN_STATS,
1674 WMI_TAG_RADIO_CHAN_STATS_EVENT,
1675 WMI_TAG_ROAM_PER_CONFIG,
1676 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1677 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1678 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1679 WMI_TAG_HW_DATA_FILTER_CMD,
1680 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1681 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1682 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1683 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1684 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1685 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1686 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1687 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1688 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1689 WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1690 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1691 WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1692 WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1693 WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1694 WMI_TAG_IFACE_OFFLOAD_STATS,
1695 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1696 WMI_TAG_RSSI_CTL_EXT,
1697 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1698 WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1699 WMI_TAG_VDEV_GET_TX_POWER_CMD,
1700 WMI_TAG_VDEV_TX_POWER_EVENT,
1701 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1702 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1703 WMI_TAG_TX_SEND_PARAMS,
1704 WMI_TAG_HE_RATE_SET,
1705 WMI_TAG_CONGESTION_STATS,
1706 WMI_TAG_SET_INIT_COUNTRY_CMD,
1707 WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1708 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1709 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1710 WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1711 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1712 WMI_TAG_THERM_THROT_STATS_EVENT,
1713 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1714 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1715 WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1716 WMI_TAG_OEM_DMA_RING_CFG_REQ,
1717 WMI_TAG_OEM_DMA_RING_CFG_RSP,
1718 WMI_TAG_OEM_INDIRECT_DATA,
1719 WMI_TAG_OEM_DMA_BUF_RELEASE,
1720 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1721 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1722 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1723 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1724 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1725 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1726 WMI_TAG_UNIT_TEST_EVENT,
1727 WMI_TAG_ROAM_FILS_OFFLOAD,
1728 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1729 WMI_TAG_PMK_CACHE,
1730 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1731 WMI_TAG_ROAM_FILS_SYNCH,
1732 WMI_TAG_GTK_OFFLOAD_EXTENDED,
1733 WMI_TAG_ROAM_BG_SCAN_ROAMING,
1734 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1735 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1736 WMI_TAG_OIC_PING_HANDOFF_EVENT,
1737 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1738 WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1739 WMI_TAG_BTM_CONFIG,
1740 WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1741 WMI_TAG_WLM_CONFIG_CMD,
1742 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1743 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1744 WMI_TAG_ROAM_CND_SCORING_PARAM,
1745 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1746 WMI_TAG_VENDOR_OUI_EXT,
1747 WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1748 WMI_TAG_FD_SEND_FROM_HOST_CMD,
1749 WMI_TAG_ENABLE_FILS_CMD,
1750 WMI_TAG_HOST_SWFDA_EVENT,
1751 WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1752 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1753 WMI_TAG_STATS_PERIOD,
1754 WMI_TAG_NDL_SCHEDULE_UPDATE,
1755 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1756 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1757 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1758 WMI_TAG_SAR2_RESULT_EVENT,
1759 WMI_TAG_SAR_CAPABILITIES,
1760 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1761 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1762 WMI_TAG_DMA_RING_CAPABILITIES,
1763 WMI_TAG_DMA_RING_CFG_REQ,
1764 WMI_TAG_DMA_RING_CFG_RSP,
1765 WMI_TAG_DMA_BUF_RELEASE,
1766 WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1767 WMI_TAG_SAR_GET_LIMITS_CMD,
1768 WMI_TAG_SAR_GET_LIMITS_EVENT,
1769 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1770 WMI_TAG_OFFLOAD_11K_REPORT,
1771 WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1772 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1773 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1774 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1775 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1776 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1777 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1778 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1779 WMI_TAG_PDEV_GET_NFCAL_POWER,
1780 WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1781 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1782 WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1783 WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1784 WMI_TAG_TWT_ENABLE_CMD,
1785 WMI_TAG_TWT_DISABLE_CMD,
1786 WMI_TAG_TWT_ADD_DIALOG_CMD,
1787 WMI_TAG_TWT_DEL_DIALOG_CMD,
1788 WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1789 WMI_TAG_TWT_RESUME_DIALOG_CMD,
1790 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1791 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1792 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1793 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1794 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1795 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1796 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1797 WMI_TAG_ROAM_SCAN_STATS_EVENT,
1798 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1799 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1800 WMI_TAG_GET_TPC_POWER_CMD,
1801 WMI_TAG_GET_TPC_POWER_EVENT,
1802 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1803 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1804 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1805 WMI_TAG_MOTION_DET_START_STOP_CMD,
1806 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1807 WMI_TAG_MOTION_DET_EVENT,
1808 WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1809 WMI_TAG_NDP_TRANSPORT_IP,
1810 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1811 WMI_TAG_ESP_ESTIMATE_EVENT,
1812 WMI_TAG_NAN_HOST_CONFIG,
1813 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1814 WMI_TAG_PEER_CFR_CAPTURE_CMD,
1815 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1816 WMI_TAG_CHAN_WIDTH_PEER_LIST,
1817 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1818 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1819 WMI_TAG_PEER_EXTD2_STATS,
1820 WMI_TAG_HPCS_PULSE_START_CMD,
1821 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1822 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1823 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1824 WMI_TAG_NAN_EVENT_INFO,
1825 WMI_TAG_NDP_CHANNEL_INFO,
1826 WMI_TAG_NDP_CMD,
1827 WMI_TAG_NDP_EVENT,
1828 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1829 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1830 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1831 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b,
1832 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
1833 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381,
1834 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1835 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
1836 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1837 WMI_TAG_MAX
1838 };
1839
1840 enum wmi_tlv_service {
1841 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1842 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1843 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1844 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1845 WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1846 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1847 WMI_TLV_SERVICE_AP_UAPSD = 6,
1848 WMI_TLV_SERVICE_AP_DFS = 7,
1849 WMI_TLV_SERVICE_11AC = 8,
1850 WMI_TLV_SERVICE_BLOCKACK = 9,
1851 WMI_TLV_SERVICE_PHYERR = 10,
1852 WMI_TLV_SERVICE_BCN_FILTER = 11,
1853 WMI_TLV_SERVICE_RTT = 12,
1854 WMI_TLV_SERVICE_WOW = 13,
1855 WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1856 WMI_TLV_SERVICE_IRAM_TIDS = 15,
1857 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1858 WMI_TLV_SERVICE_NLO = 17,
1859 WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1860 WMI_TLV_SERVICE_SCAN_SCH = 19,
1861 WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1862 WMI_TLV_SERVICE_CHATTER = 21,
1863 WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1864 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1865 WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1866 WMI_TLV_SERVICE_GPIO = 25,
1867 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1868 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1869 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1870 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1871 WMI_TLV_SERVICE_TX_ENCAP = 30,
1872 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1873 WMI_TLV_SERVICE_EARLY_RX = 32,
1874 WMI_TLV_SERVICE_STA_SMPS = 33,
1875 WMI_TLV_SERVICE_FWTEST = 34,
1876 WMI_TLV_SERVICE_STA_WMMAC = 35,
1877 WMI_TLV_SERVICE_TDLS = 36,
1878 WMI_TLV_SERVICE_BURST = 37,
1879 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1880 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1881 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1882 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1883 WMI_TLV_SERVICE_WLAN_HB = 42,
1884 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1885 WMI_TLV_SERVICE_BATCH_SCAN = 44,
1886 WMI_TLV_SERVICE_QPOWER = 45,
1887 WMI_TLV_SERVICE_PLMREQ = 46,
1888 WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1889 WMI_TLV_SERVICE_RMC = 48,
1890 WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1891 WMI_TLV_SERVICE_COEX_SAR = 50,
1892 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1893 WMI_TLV_SERVICE_NAN = 52,
1894 WMI_TLV_SERVICE_L1SS_STAT = 53,
1895 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1896 WMI_TLV_SERVICE_OBSS_SCAN = 55,
1897 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1898 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1899 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1900 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1901 WMI_TLV_SERVICE_LPASS = 60,
1902 WMI_TLV_SERVICE_EXTSCAN = 61,
1903 WMI_TLV_SERVICE_D0WOW = 62,
1904 WMI_TLV_SERVICE_HSOFFLOAD = 63,
1905 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1906 WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1907 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1908 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1909 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1910 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1911 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1912 WMI_TLV_SERVICE_OCB = 71,
1913 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1914 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1915 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1916 WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1917 WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1918 WMI_TLV_SERVICE_EXT_MSG = 77,
1919 WMI_TLV_SERVICE_MAWC = 78,
1920 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1921 WMI_TLV_SERVICE_EGAP = 80,
1922 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1923 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1924 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1925 WMI_TLV_SERVICE_ATF = 84,
1926 WMI_TLV_SERVICE_COEX_GPIO = 85,
1927 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1928 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1929 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1930 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1931 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1932 WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1933 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1934 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1935 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1936 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
1937 WMI_TLV_SERVICE_NAN_DATA = 96,
1938 WMI_TLV_SERVICE_NAN_RTT = 97,
1939 WMI_TLV_SERVICE_11AX = 98,
1940 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
1941 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
1942 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
1943 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
1944 WMI_TLV_SERVICE_MESH_11S = 103,
1945 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
1946 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
1947 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
1948 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
1949 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
1950 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
1951 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
1952 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
1953 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
1954 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
1955 WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
1956 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
1957 WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
1958 WMI_TLV_SERVICE_REGULATORY_DB = 117,
1959 WMI_TLV_SERVICE_11D_OFFLOAD = 118,
1960 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
1961 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
1962 WMI_TLV_SERVICE_PKT_ROUTING = 121,
1963 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
1964 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
1965 WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
1966 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
1967 WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
1968 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
1969
1970 WMI_MAX_SERVICE = 128,
1971
1972 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
1973 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
1974 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
1975 WMI_TLV_SERVICE_FILS_SUPPORT = 131,
1976 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
1977 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
1978 WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
1979 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
1980 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
1981 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
1982 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
1983 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
1984 WMI_TLV_SERVICE_THERM_THROT = 140,
1985 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
1986 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
1987 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
1988 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
1989 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
1990 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
1991 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
1992 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
1993 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
1994 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
1995 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
1996 WMI_TLV_SERVICE_STA_TWT = 152,
1997 WMI_TLV_SERVICE_AP_TWT = 153,
1998 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
1999 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2000 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2001 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2002 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2003 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2004 WMI_TLV_SERVICE_MOTION_DET = 160,
2005 WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2006 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2007 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2008 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2009 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2010 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2011 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2012 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2013 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2014 WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2015 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2016 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2017 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2018 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2019 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2020 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2021 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2022 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2023 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2024 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2025 WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2026 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2027 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2028 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2029 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2030 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2031 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2032 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2033 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2034 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2035 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2036 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2037 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2038 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2039 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2040 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2041 WMI_TLV_SERVICE_VOW_ENABLE = 197,
2042 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2043 WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2044 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2045 WMI_TLV_SERVICE_PS_TDCC = 201,
2046 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202,
2047 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2048 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2049 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2050 WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2051 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2052 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2053 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2054 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2055 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2056 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2057 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2058 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2059 WMI_TLV_SERVICE_EXT2_MSG = 220,
2060 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
2061
2062 WMI_MAX_EXT_SERVICE
2063 };
2064
2065 enum {
2066 WMI_SMPS_FORCED_MODE_NONE = 0,
2067 WMI_SMPS_FORCED_MODE_DISABLED,
2068 WMI_SMPS_FORCED_MODE_STATIC,
2069 WMI_SMPS_FORCED_MODE_DYNAMIC
2070 };
2071
2072 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
2073 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
2074 #define WMI_NUM_SUPPORTED_BAND_MAX 2
2075
2076 #define WMI_PEER_MIMO_PS_STATE 0x1
2077 #define WMI_PEER_AMPDU 0x2
2078 #define WMI_PEER_AUTHORIZE 0x3
2079 #define WMI_PEER_CHWIDTH 0x4
2080 #define WMI_PEER_NSS 0x5
2081 #define WMI_PEER_USE_4ADDR 0x6
2082 #define WMI_PEER_MEMBERSHIP 0x7
2083 #define WMI_PEER_USERPOS 0x8
2084 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
2085 #define WMI_PEER_TX_FAIL_CNT_THR 0xA
2086 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
2087 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
2088 #define WMI_PEER_PHYMODE 0xD
2089 #define WMI_PEER_USE_FIXED_PWR 0xE
2090 #define WMI_PEER_PARAM_FIXED_RATE 0xF
2091 #define WMI_PEER_SET_MU_WHITELIST 0x10
2092 #define WMI_PEER_SET_MAX_TX_RATE 0x11
2093 #define WMI_PEER_SET_MIN_TX_RATE 0x12
2094 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13
2095
2096 /* slot time long */
2097 #define WMI_VDEV_SLOT_TIME_LONG 0x1
2098 /* slot time short */
2099 #define WMI_VDEV_SLOT_TIME_SHORT 0x2
2100 /* preablbe long */
2101 #define WMI_VDEV_PREAMBLE_LONG 0x1
2102 /* preablbe short */
2103 #define WMI_VDEV_PREAMBLE_SHORT 0x2
2104
2105 enum wmi_peer_smps_state {
2106 WMI_PEER_SMPS_PS_NONE = 0x0,
2107 WMI_PEER_SMPS_STATIC = 0x1,
2108 WMI_PEER_SMPS_DYNAMIC = 0x2
2109 };
2110
2111 enum wmi_peer_chwidth {
2112 WMI_PEER_CHWIDTH_20MHZ = 0,
2113 WMI_PEER_CHWIDTH_40MHZ = 1,
2114 WMI_PEER_CHWIDTH_80MHZ = 2,
2115 WMI_PEER_CHWIDTH_160MHZ = 3,
2116 };
2117
2118 enum wmi_beacon_gen_mode {
2119 WMI_BEACON_STAGGERED_MODE = 0,
2120 WMI_BEACON_BURST_MODE = 1
2121 };
2122
2123 enum wmi_direct_buffer_module {
2124 WMI_DIRECT_BUF_SPECTRAL = 0,
2125 WMI_DIRECT_BUF_CFR = 1,
2126
2127 /* keep it last */
2128 WMI_DIRECT_BUF_MAX
2129 };
2130
2131 struct wmi_host_pdev_band_to_mac {
2132 u32 pdev_id;
2133 u32 start_freq;
2134 u32 end_freq;
2135 };
2136
2137 struct ath11k_ppe_threshold {
2138 u32 numss_m1;
2139 u32 ru_bit_mask;
2140 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2141 };
2142
2143 struct ath11k_service_ext_param {
2144 u32 default_conc_scan_config_bits;
2145 u32 default_fw_config_bits;
2146 struct ath11k_ppe_threshold ppet;
2147 u32 he_cap_info;
2148 u32 mpdu_density;
2149 u32 max_bssid_rx_filters;
2150 u32 num_hw_modes;
2151 u32 num_phy;
2152 };
2153
2154 struct ath11k_hw_mode_caps {
2155 u32 hw_mode_id;
2156 u32 phy_id_map;
2157 u32 hw_mode_config_type;
2158 };
2159
2160 #define PSOC_HOST_MAX_PHY_SIZE (3)
2161 #define ATH11K_11B_SUPPORT BIT(0)
2162 #define ATH11K_11G_SUPPORT BIT(1)
2163 #define ATH11K_11A_SUPPORT BIT(2)
2164 #define ATH11K_11N_SUPPORT BIT(3)
2165 #define ATH11K_11AC_SUPPORT BIT(4)
2166 #define ATH11K_11AX_SUPPORT BIT(5)
2167
2168 struct ath11k_hal_reg_capabilities_ext {
2169 u32 phy_id;
2170 u32 eeprom_reg_domain;
2171 u32 eeprom_reg_domain_ext;
2172 u32 regcap1;
2173 u32 regcap2;
2174 u32 wireless_modes;
2175 u32 low_2ghz_chan;
2176 u32 high_2ghz_chan;
2177 u32 low_5ghz_chan;
2178 u32 high_5ghz_chan;
2179 };
2180
2181 #define WMI_HOST_MAX_PDEV 3
2182
2183 struct wlan_host_mem_chunk {
2184 u32 tlv_header;
2185 u32 req_id;
2186 u32 ptr;
2187 u32 size;
2188 } __packed;
2189
2190 struct wmi_host_mem_chunk {
2191 void *vaddr;
2192 dma_addr_t paddr;
2193 u32 len;
2194 u32 req_id;
2195 };
2196
2197 struct wmi_init_cmd_param {
2198 u32 tlv_header;
2199 struct target_resource_config *res_cfg;
2200 u8 num_mem_chunks;
2201 struct wmi_host_mem_chunk *mem_chunks;
2202 u32 hw_mode_id;
2203 u32 num_band_to_mac;
2204 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2205 };
2206
2207 struct wmi_pdev_band_to_mac {
2208 u32 tlv_header;
2209 u32 pdev_id;
2210 u32 start_freq;
2211 u32 end_freq;
2212 } __packed;
2213
2214 struct wmi_pdev_set_hw_mode_cmd_param {
2215 u32 tlv_header;
2216 u32 pdev_id;
2217 u32 hw_mode_index;
2218 u32 num_band_to_mac;
2219 } __packed;
2220
2221 struct wmi_ppe_threshold {
2222 u32 numss_m1; /** NSS - 1*/
2223 union {
2224 u32 ru_count;
2225 u32 ru_mask;
2226 } __packed;
2227 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2228 } __packed;
2229
2230 #define HW_BD_INFO_SIZE 5
2231
2232 struct wmi_abi_version {
2233 u32 abi_version_0;
2234 u32 abi_version_1;
2235 u32 abi_version_ns_0;
2236 u32 abi_version_ns_1;
2237 u32 abi_version_ns_2;
2238 u32 abi_version_ns_3;
2239 } __packed;
2240
2241 struct wmi_init_cmd {
2242 u32 tlv_header;
2243 struct wmi_abi_version host_abi_vers;
2244 u32 num_host_mem_chunks;
2245 } __packed;
2246
2247 struct wmi_resource_config {
2248 u32 tlv_header;
2249 u32 num_vdevs;
2250 u32 num_peers;
2251 u32 num_offload_peers;
2252 u32 num_offload_reorder_buffs;
2253 u32 num_peer_keys;
2254 u32 num_tids;
2255 u32 ast_skid_limit;
2256 u32 tx_chain_mask;
2257 u32 rx_chain_mask;
2258 u32 rx_timeout_pri[4];
2259 u32 rx_decap_mode;
2260 u32 scan_max_pending_req;
2261 u32 bmiss_offload_max_vdev;
2262 u32 roam_offload_max_vdev;
2263 u32 roam_offload_max_ap_profiles;
2264 u32 num_mcast_groups;
2265 u32 num_mcast_table_elems;
2266 u32 mcast2ucast_mode;
2267 u32 tx_dbg_log_size;
2268 u32 num_wds_entries;
2269 u32 dma_burst_size;
2270 u32 mac_aggr_delim;
2271 u32 rx_skip_defrag_timeout_dup_detection_check;
2272 u32 vow_config;
2273 u32 gtk_offload_max_vdev;
2274 u32 num_msdu_desc;
2275 u32 max_frag_entries;
2276 u32 num_tdls_vdevs;
2277 u32 num_tdls_conn_table_entries;
2278 u32 beacon_tx_offload_max_vdev;
2279 u32 num_multicast_filter_entries;
2280 u32 num_wow_filters;
2281 u32 num_keep_alive_pattern;
2282 u32 keep_alive_pattern_size;
2283 u32 max_tdls_concurrent_sleep_sta;
2284 u32 max_tdls_concurrent_buffer_sta;
2285 u32 wmi_send_separate;
2286 u32 num_ocb_vdevs;
2287 u32 num_ocb_channels;
2288 u32 num_ocb_schedules;
2289 u32 flag1;
2290 u32 smart_ant_cap;
2291 u32 bk_minfree;
2292 u32 be_minfree;
2293 u32 vi_minfree;
2294 u32 vo_minfree;
2295 u32 alloc_frag_desc_for_data_pkt;
2296 u32 num_ns_ext_tuples_cfg;
2297 u32 bpf_instruction_size;
2298 u32 max_bssid_rx_filters;
2299 u32 use_pdev_id;
2300 u32 max_num_dbs_scan_duty_cycle;
2301 u32 max_num_group_keys;
2302 u32 peer_map_unmap_v2_support;
2303 u32 sched_params;
2304 u32 twt_ap_pdev_count;
2305 u32 twt_ap_sta_count;
2306 } __packed;
2307
2308 struct wmi_service_ready_event {
2309 u32 fw_build_vers;
2310 struct wmi_abi_version fw_abi_vers;
2311 u32 phy_capability;
2312 u32 max_frag_entry;
2313 u32 num_rf_chains;
2314 u32 ht_cap_info;
2315 u32 vht_cap_info;
2316 u32 vht_supp_mcs;
2317 u32 hw_min_tx_power;
2318 u32 hw_max_tx_power;
2319 u32 sys_cap_info;
2320 u32 min_pkt_size_enable;
2321 u32 max_bcn_ie_size;
2322 u32 num_mem_reqs;
2323 u32 max_num_scan_channels;
2324 u32 hw_bd_id;
2325 u32 hw_bd_info[HW_BD_INFO_SIZE];
2326 u32 max_supported_macs;
2327 u32 wmi_fw_sub_feat_caps;
2328 u32 num_dbs_hw_modes;
2329 /* txrx_chainmask
2330 * [7:0] - 2G band tx chain mask
2331 * [15:8] - 2G band rx chain mask
2332 * [23:16] - 5G band tx chain mask
2333 * [31:24] - 5G band rx chain mask
2334 */
2335 u32 txrx_chainmask;
2336 u32 default_dbs_hw_mode_index;
2337 u32 num_msdu_desc;
2338 } __packed;
2339
2340 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2341
2342 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2343 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2344 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2345 #define WMI_SERVICE_BITS_IN_SIZE32 4
2346
2347 struct wmi_service_ready_ext_event {
2348 u32 default_conc_scan_config_bits;
2349 u32 default_fw_config_bits;
2350 struct wmi_ppe_threshold ppet;
2351 u32 he_cap_info;
2352 u32 mpdu_density;
2353 u32 max_bssid_rx_filters;
2354 u32 fw_build_vers_ext;
2355 u32 max_nlo_ssids;
2356 u32 max_bssid_indicator;
2357 u32 he_cap_info_ext;
2358 } __packed;
2359
2360 struct wmi_soc_mac_phy_hw_mode_caps {
2361 u32 num_hw_modes;
2362 u32 num_chainmask_tables;
2363 } __packed;
2364
2365 struct wmi_hw_mode_capabilities {
2366 u32 tlv_header;
2367 u32 hw_mode_id;
2368 u32 phy_id_map;
2369 u32 hw_mode_config_type;
2370 } __packed;
2371
2372 #define WMI_MAX_HECAP_PHY_SIZE (3)
2373
2374 struct wmi_mac_phy_capabilities {
2375 u32 hw_mode_id;
2376 u32 pdev_id;
2377 u32 phy_id;
2378 u32 supported_flags;
2379 u32 supported_bands;
2380 u32 ampdu_density;
2381 u32 max_bw_supported_2g;
2382 u32 ht_cap_info_2g;
2383 u32 vht_cap_info_2g;
2384 u32 vht_supp_mcs_2g;
2385 u32 he_cap_info_2g;
2386 u32 he_supp_mcs_2g;
2387 u32 tx_chain_mask_2g;
2388 u32 rx_chain_mask_2g;
2389 u32 max_bw_supported_5g;
2390 u32 ht_cap_info_5g;
2391 u32 vht_cap_info_5g;
2392 u32 vht_supp_mcs_5g;
2393 u32 he_cap_info_5g;
2394 u32 he_supp_mcs_5g;
2395 u32 tx_chain_mask_5g;
2396 u32 rx_chain_mask_5g;
2397 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2398 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2399 struct wmi_ppe_threshold he_ppet2g;
2400 struct wmi_ppe_threshold he_ppet5g;
2401 u32 chainmask_table_id;
2402 u32 lmac_id;
2403 u32 he_cap_info_2g_ext;
2404 u32 he_cap_info_5g_ext;
2405 u32 he_cap_info_internal;
2406 } __packed;
2407
2408 struct wmi_hal_reg_capabilities_ext {
2409 u32 tlv_header;
2410 u32 phy_id;
2411 u32 eeprom_reg_domain;
2412 u32 eeprom_reg_domain_ext;
2413 u32 regcap1;
2414 u32 regcap2;
2415 u32 wireless_modes;
2416 u32 low_2ghz_chan;
2417 u32 high_2ghz_chan;
2418 u32 low_5ghz_chan;
2419 u32 high_5ghz_chan;
2420 } __packed;
2421
2422 struct wmi_soc_hal_reg_capabilities {
2423 u32 num_phy;
2424 } __packed;
2425
2426 /* 2 word representation of MAC addr */
2427 struct wmi_mac_addr {
2428 union {
2429 u8 addr[6];
2430 struct {
2431 u32 word0;
2432 u32 word1;
2433 } __packed;
2434 } __packed;
2435 } __packed;
2436
2437 struct wmi_dma_ring_capabilities {
2438 u32 tlv_header;
2439 u32 pdev_id;
2440 u32 module_id;
2441 u32 min_elem;
2442 u32 min_buf_sz;
2443 u32 min_buf_align;
2444 } __packed;
2445
2446 struct wmi_ready_event_min {
2447 struct wmi_abi_version fw_abi_vers;
2448 struct wmi_mac_addr mac_addr;
2449 u32 status;
2450 u32 num_dscp_table;
2451 u32 num_extra_mac_addr;
2452 u32 num_total_peers;
2453 u32 num_extra_peers;
2454 } __packed;
2455
2456 struct wmi_ready_event {
2457 struct wmi_ready_event_min ready_event_min;
2458 u32 max_ast_index;
2459 u32 pktlog_defs_checksum;
2460 } __packed;
2461
2462 struct wmi_service_available_event {
2463 u32 wmi_service_segment_offset;
2464 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2465 } __packed;
2466
2467 struct ath11k_pdev_wmi {
2468 struct ath11k_wmi_base *wmi_ab;
2469 enum ath11k_htc_ep_id eid;
2470 const struct wmi_peer_flags_map *peer_flags;
2471 u32 rx_decap_mode;
2472 };
2473
2474 struct vdev_create_params {
2475 u8 if_id;
2476 u32 type;
2477 u32 subtype;
2478 struct {
2479 u8 tx;
2480 u8 rx;
2481 } chains[NUM_NL80211_BANDS];
2482 u32 pdev_id;
2483 };
2484
2485 struct wmi_vdev_create_cmd {
2486 u32 tlv_header;
2487 u32 vdev_id;
2488 u32 vdev_type;
2489 u32 vdev_subtype;
2490 struct wmi_mac_addr vdev_macaddr;
2491 u32 num_cfg_txrx_streams;
2492 u32 pdev_id;
2493 } __packed;
2494
2495 struct wmi_vdev_txrx_streams {
2496 u32 tlv_header;
2497 u32 band;
2498 u32 supported_tx_streams;
2499 u32 supported_rx_streams;
2500 } __packed;
2501
2502 struct wmi_vdev_delete_cmd {
2503 u32 tlv_header;
2504 u32 vdev_id;
2505 } __packed;
2506
2507 struct wmi_vdev_up_cmd {
2508 u32 tlv_header;
2509 u32 vdev_id;
2510 u32 vdev_assoc_id;
2511 struct wmi_mac_addr vdev_bssid;
2512 struct wmi_mac_addr trans_bssid;
2513 u32 profile_idx;
2514 u32 profile_num;
2515 } __packed;
2516
2517 struct wmi_vdev_stop_cmd {
2518 u32 tlv_header;
2519 u32 vdev_id;
2520 } __packed;
2521
2522 struct wmi_vdev_down_cmd {
2523 u32 tlv_header;
2524 u32 vdev_id;
2525 } __packed;
2526
2527 #define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2528 #define WMI_VDEV_START_PMF_ENABLED BIT(1)
2529 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2530
2531 struct wmi_ssid {
2532 u32 ssid_len;
2533 u32 ssid[8];
2534 } __packed;
2535
2536 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2537
2538 struct wmi_vdev_start_request_cmd {
2539 u32 tlv_header;
2540 u32 vdev_id;
2541 u32 requestor_id;
2542 u32 beacon_interval;
2543 u32 dtim_period;
2544 u32 flags;
2545 struct wmi_ssid ssid;
2546 u32 bcn_tx_rate;
2547 u32 bcn_txpower;
2548 u32 num_noa_descriptors;
2549 u32 disable_hw_ack;
2550 u32 preferred_tx_streams;
2551 u32 preferred_rx_streams;
2552 u32 he_ops;
2553 u32 cac_duration_ms;
2554 u32 regdomain;
2555 } __packed;
2556
2557 #define MGMT_TX_DL_FRM_LEN 64
2558 #define WMI_MAC_MAX_SSID_LENGTH 32
2559 struct mac_ssid {
2560 u8 length;
2561 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2562 } __packed;
2563
2564 struct wmi_p2p_noa_descriptor {
2565 u32 type_count;
2566 u32 duration;
2567 u32 interval;
2568 u32 start_time;
2569 };
2570
2571 struct channel_param {
2572 u8 chan_id;
2573 u8 pwr;
2574 u32 mhz;
2575 u32 half_rate:1,
2576 quarter_rate:1,
2577 dfs_set:1,
2578 dfs_set_cfreq2:1,
2579 is_chan_passive:1,
2580 allow_ht:1,
2581 allow_vht:1,
2582 allow_he:1,
2583 set_agile:1,
2584 psc_channel:1;
2585 u32 phy_mode;
2586 u32 cfreq1;
2587 u32 cfreq2;
2588 char maxpower;
2589 char minpower;
2590 char maxregpower;
2591 u8 antennamax;
2592 u8 reg_class_id;
2593 } __packed;
2594
2595 enum wmi_phy_mode {
2596 MODE_11A = 0,
2597 MODE_11G = 1, /* 11b/g Mode */
2598 MODE_11B = 2, /* 11b Mode */
2599 MODE_11GONLY = 3, /* 11g only Mode */
2600 MODE_11NA_HT20 = 4,
2601 MODE_11NG_HT20 = 5,
2602 MODE_11NA_HT40 = 6,
2603 MODE_11NG_HT40 = 7,
2604 MODE_11AC_VHT20 = 8,
2605 MODE_11AC_VHT40 = 9,
2606 MODE_11AC_VHT80 = 10,
2607 MODE_11AC_VHT20_2G = 11,
2608 MODE_11AC_VHT40_2G = 12,
2609 MODE_11AC_VHT80_2G = 13,
2610 MODE_11AC_VHT80_80 = 14,
2611 MODE_11AC_VHT160 = 15,
2612 MODE_11AX_HE20 = 16,
2613 MODE_11AX_HE40 = 17,
2614 MODE_11AX_HE80 = 18,
2615 MODE_11AX_HE80_80 = 19,
2616 MODE_11AX_HE160 = 20,
2617 MODE_11AX_HE20_2G = 21,
2618 MODE_11AX_HE40_2G = 22,
2619 MODE_11AX_HE80_2G = 23,
2620 MODE_UNKNOWN = 24,
2621 MODE_MAX = 24
2622 };
2623
ath11k_wmi_phymode_str(enum wmi_phy_mode mode)2624 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2625 {
2626 switch (mode) {
2627 case MODE_11A:
2628 return "11a";
2629 case MODE_11G:
2630 return "11g";
2631 case MODE_11B:
2632 return "11b";
2633 case MODE_11GONLY:
2634 return "11gonly";
2635 case MODE_11NA_HT20:
2636 return "11na-ht20";
2637 case MODE_11NG_HT20:
2638 return "11ng-ht20";
2639 case MODE_11NA_HT40:
2640 return "11na-ht40";
2641 case MODE_11NG_HT40:
2642 return "11ng-ht40";
2643 case MODE_11AC_VHT20:
2644 return "11ac-vht20";
2645 case MODE_11AC_VHT40:
2646 return "11ac-vht40";
2647 case MODE_11AC_VHT80:
2648 return "11ac-vht80";
2649 case MODE_11AC_VHT160:
2650 return "11ac-vht160";
2651 case MODE_11AC_VHT80_80:
2652 return "11ac-vht80+80";
2653 case MODE_11AC_VHT20_2G:
2654 return "11ac-vht20-2g";
2655 case MODE_11AC_VHT40_2G:
2656 return "11ac-vht40-2g";
2657 case MODE_11AC_VHT80_2G:
2658 return "11ac-vht80-2g";
2659 case MODE_11AX_HE20:
2660 return "11ax-he20";
2661 case MODE_11AX_HE40:
2662 return "11ax-he40";
2663 case MODE_11AX_HE80:
2664 return "11ax-he80";
2665 case MODE_11AX_HE80_80:
2666 return "11ax-he80+80";
2667 case MODE_11AX_HE160:
2668 return "11ax-he160";
2669 case MODE_11AX_HE20_2G:
2670 return "11ax-he20-2g";
2671 case MODE_11AX_HE40_2G:
2672 return "11ax-he40-2g";
2673 case MODE_11AX_HE80_2G:
2674 return "11ax-he80-2g";
2675 case MODE_UNKNOWN:
2676 /* skip */
2677 break;
2678
2679 /* no default handler to allow compiler to check that the
2680 * enum is fully handled
2681 */
2682 }
2683
2684 return "<unknown>";
2685 }
2686
2687 struct wmi_channel_arg {
2688 u32 freq;
2689 u32 band_center_freq1;
2690 u32 band_center_freq2;
2691 bool passive;
2692 bool allow_ibss;
2693 bool allow_ht;
2694 bool allow_vht;
2695 bool ht40plus;
2696 bool chan_radar;
2697 bool freq2_radar;
2698 bool allow_he;
2699 u32 min_power;
2700 u32 max_power;
2701 u32 max_reg_power;
2702 u32 max_antenna_gain;
2703 enum wmi_phy_mode mode;
2704 };
2705
2706 struct wmi_vdev_start_req_arg {
2707 u32 vdev_id;
2708 struct wmi_channel_arg channel;
2709 u32 bcn_intval;
2710 u32 dtim_period;
2711 u8 *ssid;
2712 u32 ssid_len;
2713 u32 bcn_tx_rate;
2714 u32 bcn_tx_power;
2715 bool disable_hw_ack;
2716 bool hidden_ssid;
2717 bool pmf_enabled;
2718 u32 he_ops;
2719 u32 cac_duration_ms;
2720 u32 regdomain;
2721 u32 pref_rx_streams;
2722 u32 pref_tx_streams;
2723 u32 num_noa_descriptors;
2724 };
2725
2726 struct peer_create_params {
2727 const u8 *peer_addr;
2728 u32 peer_type;
2729 u32 vdev_id;
2730 };
2731
2732 struct peer_delete_params {
2733 u8 vdev_id;
2734 };
2735
2736 struct peer_flush_params {
2737 u32 peer_tid_bitmap;
2738 u8 vdev_id;
2739 };
2740
2741 struct pdev_set_regdomain_params {
2742 u16 current_rd_in_use;
2743 u16 current_rd_2g;
2744 u16 current_rd_5g;
2745 u32 ctl_2g;
2746 u32 ctl_5g;
2747 u8 dfs_domain;
2748 u32 pdev_id;
2749 };
2750
2751 struct rx_reorder_queue_remove_params {
2752 u8 *peer_macaddr;
2753 u16 vdev_id;
2754 u32 peer_tid_bitmap;
2755 };
2756
2757 #define WMI_HOST_PDEV_ID_SOC 0xFF
2758 #define WMI_HOST_PDEV_ID_0 0
2759 #define WMI_HOST_PDEV_ID_1 1
2760 #define WMI_HOST_PDEV_ID_2 2
2761
2762 #define WMI_PDEV_ID_SOC 0
2763 #define WMI_PDEV_ID_1ST 1
2764 #define WMI_PDEV_ID_2ND 2
2765 #define WMI_PDEV_ID_3RD 3
2766
2767 /* Freq units in MHz */
2768 #define REG_RULE_START_FREQ 0x0000ffff
2769 #define REG_RULE_END_FREQ 0xffff0000
2770 #define REG_RULE_FLAGS 0x0000ffff
2771 #define REG_RULE_MAX_BW 0x0000ffff
2772 #define REG_RULE_REG_PWR 0x00ff0000
2773 #define REG_RULE_ANT_GAIN 0xff000000
2774
2775 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2776 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2777 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2778 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2779
2780 #define HECAP_PHYDWORD_0 0
2781 #define HECAP_PHYDWORD_1 1
2782 #define HECAP_PHYDWORD_2 2
2783
2784 #define HECAP_PHY_SU_BFER BIT(31)
2785 #define HECAP_PHY_SU_BFEE BIT(0)
2786 #define HECAP_PHY_MU_BFER BIT(1)
2787 #define HECAP_PHY_UL_MUMIMO BIT(22)
2788 #define HECAP_PHY_UL_MUOFDMA BIT(23)
2789
2790 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2791 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
2792
2793 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
2794 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
2795
2796 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2797 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
2798
2799 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2800 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
2801
2802 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2803 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
2804
2805 #define HE_MODE_SU_TX_BFEE BIT(0)
2806 #define HE_MODE_SU_TX_BFER BIT(1)
2807 #define HE_MODE_MU_TX_BFEE BIT(2)
2808 #define HE_MODE_MU_TX_BFER BIT(3)
2809 #define HE_MODE_DL_OFDMA BIT(4)
2810 #define HE_MODE_UL_OFDMA BIT(5)
2811 #define HE_MODE_UL_MUMIMO BIT(6)
2812
2813 #define HE_DL_MUOFDMA_ENABLE 1
2814 #define HE_UL_MUOFDMA_ENABLE 1
2815 #define HE_DL_MUMIMO_ENABLE 1
2816 #define HE_MU_BFEE_ENABLE 1
2817 #define HE_SU_BFEE_ENABLE 1
2818
2819 #define HE_VHT_SOUNDING_MODE_ENABLE 1
2820 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2821 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2822
2823 /* HE or VHT Sounding */
2824 #define HE_VHT_SOUNDING_MODE BIT(0)
2825 /* SU or MU Sounding */
2826 #define HE_SU_MU_SOUNDING_MODE BIT(2)
2827 /* Trig or Non-Trig Sounding */
2828 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
2829
2830 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4
2831 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
2832 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8
2833 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
2834
2835 struct pdev_params {
2836 u32 param_id;
2837 u32 param_value;
2838 };
2839
2840 enum wmi_peer_type {
2841 WMI_PEER_TYPE_DEFAULT = 0,
2842 WMI_PEER_TYPE_BSS = 1,
2843 WMI_PEER_TYPE_TDLS = 2,
2844 };
2845
2846 struct wmi_peer_create_cmd {
2847 u32 tlv_header;
2848 u32 vdev_id;
2849 struct wmi_mac_addr peer_macaddr;
2850 u32 peer_type;
2851 } __packed;
2852
2853 struct wmi_peer_delete_cmd {
2854 u32 tlv_header;
2855 u32 vdev_id;
2856 struct wmi_mac_addr peer_macaddr;
2857 } __packed;
2858
2859 struct wmi_peer_reorder_queue_setup_cmd {
2860 u32 tlv_header;
2861 u32 vdev_id;
2862 struct wmi_mac_addr peer_macaddr;
2863 u32 tid;
2864 u32 queue_ptr_lo;
2865 u32 queue_ptr_hi;
2866 u32 queue_no;
2867 u32 ba_window_size_valid;
2868 u32 ba_window_size;
2869 } __packed;
2870
2871 struct wmi_peer_reorder_queue_remove_cmd {
2872 u32 tlv_header;
2873 u32 vdev_id;
2874 struct wmi_mac_addr peer_macaddr;
2875 u32 tid_mask;
2876 } __packed;
2877
2878 struct gpio_config_params {
2879 u32 gpio_num;
2880 u32 input;
2881 u32 pull_type;
2882 u32 intr_mode;
2883 };
2884
2885 enum wmi_gpio_type {
2886 WMI_GPIO_PULL_NONE,
2887 WMI_GPIO_PULL_UP,
2888 WMI_GPIO_PULL_DOWN
2889 };
2890
2891 enum wmi_gpio_intr_type {
2892 WMI_GPIO_INTTYPE_DISABLE,
2893 WMI_GPIO_INTTYPE_RISING_EDGE,
2894 WMI_GPIO_INTTYPE_FALLING_EDGE,
2895 WMI_GPIO_INTTYPE_BOTH_EDGE,
2896 WMI_GPIO_INTTYPE_LEVEL_LOW,
2897 WMI_GPIO_INTTYPE_LEVEL_HIGH
2898 };
2899
2900 enum wmi_bss_chan_info_req_type {
2901 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
2902 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
2903 };
2904
2905 struct wmi_gpio_config_cmd_param {
2906 u32 tlv_header;
2907 u32 gpio_num;
2908 u32 input;
2909 u32 pull_type;
2910 u32 intr_mode;
2911 };
2912
2913 struct gpio_output_params {
2914 u32 gpio_num;
2915 u32 set;
2916 };
2917
2918 struct wmi_gpio_output_cmd_param {
2919 u32 tlv_header;
2920 u32 gpio_num;
2921 u32 set;
2922 };
2923
2924 struct set_fwtest_params {
2925 u32 arg;
2926 u32 value;
2927 };
2928
2929 struct wmi_fwtest_set_param_cmd_param {
2930 u32 tlv_header;
2931 u32 param_id;
2932 u32 param_value;
2933 };
2934
2935 struct wmi_pdev_set_param_cmd {
2936 u32 tlv_header;
2937 u32 pdev_id;
2938 u32 param_id;
2939 u32 param_value;
2940 } __packed;
2941
2942 struct wmi_pdev_set_ps_mode_cmd {
2943 u32 tlv_header;
2944 u32 vdev_id;
2945 u32 sta_ps_mode;
2946 } __packed;
2947
2948 struct wmi_pdev_suspend_cmd {
2949 u32 tlv_header;
2950 u32 pdev_id;
2951 u32 suspend_opt;
2952 } __packed;
2953
2954 struct wmi_pdev_resume_cmd {
2955 u32 tlv_header;
2956 u32 pdev_id;
2957 } __packed;
2958
2959 struct wmi_pdev_bss_chan_info_req_cmd {
2960 u32 tlv_header;
2961 /* ref wmi_bss_chan_info_req_type */
2962 u32 req_type;
2963 u32 pdev_id;
2964 } __packed;
2965
2966 struct wmi_ap_ps_peer_cmd {
2967 u32 tlv_header;
2968 u32 vdev_id;
2969 struct wmi_mac_addr peer_macaddr;
2970 u32 param;
2971 u32 value;
2972 } __packed;
2973
2974 struct wmi_sta_powersave_param_cmd {
2975 u32 tlv_header;
2976 u32 vdev_id;
2977 u32 param;
2978 u32 value;
2979 } __packed;
2980
2981 struct wmi_pdev_set_regdomain_cmd {
2982 u32 tlv_header;
2983 u32 pdev_id;
2984 u32 reg_domain;
2985 u32 reg_domain_2g;
2986 u32 reg_domain_5g;
2987 u32 conformance_test_limit_2g;
2988 u32 conformance_test_limit_5g;
2989 u32 dfs_domain;
2990 } __packed;
2991
2992 struct wmi_peer_set_param_cmd {
2993 u32 tlv_header;
2994 u32 vdev_id;
2995 struct wmi_mac_addr peer_macaddr;
2996 u32 param_id;
2997 u32 param_value;
2998 } __packed;
2999
3000 struct wmi_peer_flush_tids_cmd {
3001 u32 tlv_header;
3002 u32 vdev_id;
3003 struct wmi_mac_addr peer_macaddr;
3004 u32 peer_tid_bitmap;
3005 } __packed;
3006
3007 struct wmi_dfs_phyerr_offload_cmd {
3008 u32 tlv_header;
3009 u32 pdev_id;
3010 } __packed;
3011
3012 struct wmi_bcn_offload_ctrl_cmd {
3013 u32 tlv_header;
3014 u32 vdev_id;
3015 u32 bcn_ctrl_op;
3016 } __packed;
3017
3018 enum scan_dwelltime_adaptive_mode {
3019 SCAN_DWELL_MODE_DEFAULT = 0,
3020 SCAN_DWELL_MODE_CONSERVATIVE = 1,
3021 SCAN_DWELL_MODE_MODERATE = 2,
3022 SCAN_DWELL_MODE_AGGRESSIVE = 3,
3023 SCAN_DWELL_MODE_STATIC = 4
3024 };
3025
3026 #define WLAN_SCAN_MAX_NUM_SSID 10
3027 #define WLAN_SCAN_MAX_NUM_BSSID 10
3028 #define WLAN_SCAN_MAX_NUM_CHANNELS 40
3029
3030 #define WLAN_SSID_MAX_LEN 32
3031
3032 struct element_info {
3033 u32 len;
3034 u8 *ptr;
3035 };
3036
3037 struct wlan_ssid {
3038 u8 length;
3039 u8 ssid[WLAN_SSID_MAX_LEN];
3040 };
3041
3042 #define WMI_IE_BITMAP_SIZE 8
3043
3044 #define WMI_SCAN_MAX_NUM_SSID 0x0A
3045 /* prefix used by scan requestor ids on the host */
3046 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3047
3048 /* prefix used by scan request ids generated on the host */
3049 /* host cycles through the lower 12 bits to generate ids */
3050 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3051
3052 #define WLAN_SCAN_PARAMS_MAX_SSID 16
3053 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
3054 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3055
3056 /* Values lower than this may be refused by some firmware revisions with a scan
3057 * completion with a timedout reason.
3058 */
3059 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3060
3061 /* Scan priority numbers must be sequential, starting with 0 */
3062 enum wmi_scan_priority {
3063 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3064 WMI_SCAN_PRIORITY_LOW,
3065 WMI_SCAN_PRIORITY_MEDIUM,
3066 WMI_SCAN_PRIORITY_HIGH,
3067 WMI_SCAN_PRIORITY_VERY_HIGH,
3068 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
3069 };
3070
3071 enum wmi_scan_event_type {
3072 WMI_SCAN_EVENT_STARTED = BIT(0),
3073 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3074 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3075 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
3076 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3077 /* possibly by high-prio scan */
3078 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3079 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3080 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3081 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
3082 WMI_SCAN_EVENT_SUSPENDED = BIT(9),
3083 WMI_SCAN_EVENT_RESUMED = BIT(10),
3084 WMI_SCAN_EVENT_MAX = BIT(15),
3085 };
3086
3087 enum wmi_scan_completion_reason {
3088 WMI_SCAN_REASON_COMPLETED,
3089 WMI_SCAN_REASON_CANCELLED,
3090 WMI_SCAN_REASON_PREEMPTED,
3091 WMI_SCAN_REASON_TIMEDOUT,
3092 WMI_SCAN_REASON_INTERNAL_FAILURE,
3093 WMI_SCAN_REASON_MAX,
3094 };
3095
3096 struct wmi_start_scan_cmd {
3097 u32 tlv_header;
3098 u32 scan_id;
3099 u32 scan_req_id;
3100 u32 vdev_id;
3101 u32 scan_priority;
3102 u32 notify_scan_events;
3103 u32 dwell_time_active;
3104 u32 dwell_time_passive;
3105 u32 min_rest_time;
3106 u32 max_rest_time;
3107 u32 repeat_probe_time;
3108 u32 probe_spacing_time;
3109 u32 idle_time;
3110 u32 max_scan_time;
3111 u32 probe_delay;
3112 u32 scan_ctrl_flags;
3113 u32 burst_duration;
3114 u32 num_chan;
3115 u32 num_bssid;
3116 u32 num_ssids;
3117 u32 ie_len;
3118 u32 n_probes;
3119 struct wmi_mac_addr mac_addr;
3120 struct wmi_mac_addr mac_mask;
3121 u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3122 u32 num_vendor_oui;
3123 u32 scan_ctrl_flags_ext;
3124 u32 dwell_time_active_2g;
3125 u32 dwell_time_active_6g;
3126 u32 dwell_time_passive_6g;
3127 u32 scan_start_offset;
3128 } __packed;
3129
3130 #define WMI_SCAN_FLAG_PASSIVE 0x1
3131 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3132 #define WMI_SCAN_ADD_CCK_RATES 0x4
3133 #define WMI_SCAN_ADD_OFDM_RATES 0x8
3134 #define WMI_SCAN_CHAN_STAT_EVENT 0x10
3135 #define WMI_SCAN_FILTER_PROBE_REQ 0x20
3136 #define WMI_SCAN_BYPASS_DFS_CHN 0x40
3137 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3138 #define WMI_SCAN_FILTER_PROMISCUOS 0x100
3139 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3140 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3141 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3142 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3143 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3144 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3145 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3146 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3147 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3148 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3149 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3150 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3151
3152 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3153 #define WMI_SCAN_DWELL_MODE_SHIFT 21
3154
3155 enum {
3156 WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3157 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3158 WMI_SCAN_DWELL_MODE_MODERATE = 2,
3159 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3160 WMI_SCAN_DWELL_MODE_STATIC = 4,
3161 };
3162
3163 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3164 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3165 WMI_SCAN_DWELL_MODE_MASK))
3166
3167 struct hint_short_ssid {
3168 u32 freq_flags;
3169 u32 short_ssid;
3170 };
3171
3172 struct hint_bssid {
3173 u32 freq_flags;
3174 struct wmi_mac_addr bssid;
3175 };
3176
3177 struct scan_req_params {
3178 u32 scan_id;
3179 u32 scan_req_id;
3180 u32 vdev_id;
3181 u32 pdev_id;
3182 enum wmi_scan_priority scan_priority;
3183 union {
3184 struct {
3185 u32 scan_ev_started:1,
3186 scan_ev_completed:1,
3187 scan_ev_bss_chan:1,
3188 scan_ev_foreign_chan:1,
3189 scan_ev_dequeued:1,
3190 scan_ev_preempted:1,
3191 scan_ev_start_failed:1,
3192 scan_ev_restarted:1,
3193 scan_ev_foreign_chn_exit:1,
3194 scan_ev_invalid:1,
3195 scan_ev_gpio_timeout:1,
3196 scan_ev_suspended:1,
3197 scan_ev_resumed:1;
3198 };
3199 u32 scan_events;
3200 };
3201 u32 dwell_time_active;
3202 u32 dwell_time_active_2g;
3203 u32 dwell_time_passive;
3204 u32 dwell_time_active_6g;
3205 u32 dwell_time_passive_6g;
3206 u32 min_rest_time;
3207 u32 max_rest_time;
3208 u32 repeat_probe_time;
3209 u32 probe_spacing_time;
3210 u32 idle_time;
3211 u32 max_scan_time;
3212 u32 probe_delay;
3213 union {
3214 struct {
3215 u32 scan_f_passive:1,
3216 scan_f_bcast_probe:1,
3217 scan_f_cck_rates:1,
3218 scan_f_ofdm_rates:1,
3219 scan_f_chan_stat_evnt:1,
3220 scan_f_filter_prb_req:1,
3221 scan_f_bypass_dfs_chn:1,
3222 scan_f_continue_on_err:1,
3223 scan_f_offchan_mgmt_tx:1,
3224 scan_f_offchan_data_tx:1,
3225 scan_f_promisc_mode:1,
3226 scan_f_capture_phy_err:1,
3227 scan_f_strict_passive_pch:1,
3228 scan_f_half_rate:1,
3229 scan_f_quarter_rate:1,
3230 scan_f_force_active_dfs_chn:1,
3231 scan_f_add_tpc_ie_in_probe:1,
3232 scan_f_add_ds_ie_in_probe:1,
3233 scan_f_add_spoofed_mac_in_probe:1,
3234 scan_f_add_rand_seq_in_probe:1,
3235 scan_f_en_ie_whitelist_in_probe:1,
3236 scan_f_forced:1,
3237 scan_f_2ghz:1,
3238 scan_f_5ghz:1,
3239 scan_f_80mhz:1;
3240 };
3241 u32 scan_flags;
3242 };
3243 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3244 u32 burst_duration;
3245 u32 num_chan;
3246 u32 num_bssid;
3247 u32 num_ssids;
3248 u32 n_probes;
3249 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS];
3250 u32 notify_scan_events;
3251 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3252 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3253 struct element_info extraie;
3254 struct element_info htcap;
3255 struct element_info vhtcap;
3256 u32 num_hint_s_ssid;
3257 u32 num_hint_bssid;
3258 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3259 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3260 };
3261
3262 struct wmi_ssid_arg {
3263 int len;
3264 const u8 *ssid;
3265 };
3266
3267 struct wmi_bssid_arg {
3268 const u8 *bssid;
3269 };
3270
3271 struct wmi_start_scan_arg {
3272 u32 scan_id;
3273 u32 scan_req_id;
3274 u32 vdev_id;
3275 u32 scan_priority;
3276 u32 notify_scan_events;
3277 u32 dwell_time_active;
3278 u32 dwell_time_passive;
3279 u32 min_rest_time;
3280 u32 max_rest_time;
3281 u32 repeat_probe_time;
3282 u32 probe_spacing_time;
3283 u32 idle_time;
3284 u32 max_scan_time;
3285 u32 probe_delay;
3286 u32 scan_ctrl_flags;
3287
3288 u32 ie_len;
3289 u32 n_channels;
3290 u32 n_ssids;
3291 u32 n_bssids;
3292
3293 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3294 u32 channels[64];
3295 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3296 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3297 };
3298
3299 #define WMI_SCAN_STOP_ONE 0x00000000
3300 #define WMI_SCN_STOP_VAP_ALL 0x01000000
3301 #define WMI_SCAN_STOP_ALL 0x04000000
3302
3303 /* Prefix 0xA000 indicates that the scan request
3304 * is trigger by HOST
3305 */
3306 #define ATH11K_SCAN_ID 0xA000
3307
3308 enum scan_cancel_req_type {
3309 WLAN_SCAN_CANCEL_SINGLE = 1,
3310 WLAN_SCAN_CANCEL_VDEV_ALL,
3311 WLAN_SCAN_CANCEL_PDEV_ALL,
3312 };
3313
3314 struct scan_cancel_param {
3315 u32 requester;
3316 u32 scan_id;
3317 enum scan_cancel_req_type req_type;
3318 u32 vdev_id;
3319 u32 pdev_id;
3320 };
3321
3322 struct wmi_bcn_send_from_host_cmd {
3323 u32 tlv_header;
3324 u32 vdev_id;
3325 u32 data_len;
3326 union {
3327 u32 frag_ptr;
3328 u32 frag_ptr_lo;
3329 };
3330 u32 frame_ctrl;
3331 u32 dtim_flag;
3332 u32 bcn_antenna;
3333 u32 frag_ptr_hi;
3334 };
3335
3336 #define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3337 #define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3338 #define WMI_CHAN_INFO_PASSIVE BIT(7)
3339 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3340 #define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3341 #define WMI_CHAN_INFO_DFS BIT(10)
3342 #define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3343 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3344 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3345 #define WMI_CHAN_INFO_HALF_RATE BIT(14)
3346 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3347 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3348 #define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3349 #define WMI_CHAN_INFO_PSC BIT(18)
3350
3351 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3352 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3353 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3354 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3355
3356 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3357 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3358
3359 struct wmi_channel {
3360 u32 tlv_header;
3361 u32 mhz;
3362 u32 band_center_freq1;
3363 u32 band_center_freq2;
3364 u32 info;
3365 u32 reg_info_1;
3366 u32 reg_info_2;
3367 } __packed;
3368
3369 struct wmi_mgmt_params {
3370 void *tx_frame;
3371 u16 frm_len;
3372 u8 vdev_id;
3373 u16 chanfreq;
3374 void *pdata;
3375 u16 desc_id;
3376 u8 *macaddr;
3377 };
3378
3379 enum wmi_sta_ps_mode {
3380 WMI_STA_PS_MODE_DISABLED = 0,
3381 WMI_STA_PS_MODE_ENABLED = 1,
3382 };
3383
3384 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3385 #define WMI_SMPS_MASK_UPPER_3BITS 0x7
3386 #define WMI_SMPS_PARAM_VALUE_SHIFT 29
3387
3388 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3389 #define ATH11K_WMI_FW_HANG_DELAY 0
3390
3391 /* type, 0:unused 1: ASSERT 2: not respond detect command
3392 * delay_time_ms, the simulate will delay time
3393 */
3394
3395 struct wmi_force_fw_hang_cmd {
3396 u32 tlv_header;
3397 u32 type;
3398 u32 delay_time_ms;
3399 };
3400
3401 struct wmi_vdev_set_param_cmd {
3402 u32 tlv_header;
3403 u32 vdev_id;
3404 u32 param_id;
3405 u32 param_value;
3406 } __packed;
3407
3408 enum wmi_stats_id {
3409 WMI_REQUEST_PEER_STAT = BIT(0),
3410 WMI_REQUEST_AP_STAT = BIT(1),
3411 WMI_REQUEST_PDEV_STAT = BIT(2),
3412 WMI_REQUEST_VDEV_STAT = BIT(3),
3413 WMI_REQUEST_BCNFLT_STAT = BIT(4),
3414 WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
3415 WMI_REQUEST_INST_STAT = BIT(6),
3416 WMI_REQUEST_MIB_STAT = BIT(7),
3417 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
3418 WMI_REQUEST_CONGESTION_STAT = BIT(9),
3419 WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
3420 WMI_REQUEST_BCN_STAT = BIT(11),
3421 WMI_REQUEST_BCN_STAT_RESET = BIT(12),
3422 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
3423 };
3424
3425 struct wmi_request_stats_cmd {
3426 u32 tlv_header;
3427 enum wmi_stats_id stats_id;
3428 u32 vdev_id;
3429 struct wmi_mac_addr peer_macaddr;
3430 u32 pdev_id;
3431 } __packed;
3432
3433 struct wmi_get_pdev_temperature_cmd {
3434 u32 tlv_header;
3435 u32 param;
3436 u32 pdev_id;
3437 } __packed;
3438
3439 #define WMI_BEACON_TX_BUFFER_SIZE 512
3440
3441 struct wmi_bcn_tmpl_cmd {
3442 u32 tlv_header;
3443 u32 vdev_id;
3444 u32 tim_ie_offset;
3445 u32 buf_len;
3446 u32 csa_switch_count_offset;
3447 u32 ext_csa_switch_count_offset;
3448 u32 csa_event_bitmap;
3449 u32 mbssid_ie_offset;
3450 u32 esp_ie_offset;
3451 } __packed;
3452
3453 struct wmi_key_seq_counter {
3454 u32 key_seq_counter_l;
3455 u32 key_seq_counter_h;
3456 } __packed;
3457
3458 struct wmi_vdev_install_key_cmd {
3459 u32 tlv_header;
3460 u32 vdev_id;
3461 struct wmi_mac_addr peer_macaddr;
3462 u32 key_idx;
3463 u32 key_flags;
3464 u32 key_cipher;
3465 struct wmi_key_seq_counter key_rsc_counter;
3466 struct wmi_key_seq_counter key_global_rsc_counter;
3467 struct wmi_key_seq_counter key_tsc_counter;
3468 u8 wpi_key_rsc_counter[16];
3469 u8 wpi_key_tsc_counter[16];
3470 u32 key_len;
3471 u32 key_txmic_len;
3472 u32 key_rxmic_len;
3473 u32 is_group_key_id_valid;
3474 u32 group_key_id;
3475
3476 /* Followed by key_data containing key followed by
3477 * tx mic and then rx mic
3478 */
3479 } __packed;
3480
3481 struct wmi_vdev_install_key_arg {
3482 u32 vdev_id;
3483 const u8 *macaddr;
3484 u32 key_idx;
3485 u32 key_flags;
3486 u32 key_cipher;
3487 u32 key_len;
3488 u32 key_txmic_len;
3489 u32 key_rxmic_len;
3490 u64 key_rsc_counter;
3491 const void *key_data;
3492 };
3493
3494 #define WMI_MAX_SUPPORTED_RATES 128
3495 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3
3496 #define WMI_HOST_MAX_HE_RATE_SET 3
3497 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3498 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3499 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
3500
3501 struct wmi_rate_set_arg {
3502 u32 num_rates;
3503 u8 rates[WMI_MAX_SUPPORTED_RATES];
3504 };
3505
3506 struct peer_assoc_params {
3507 struct wmi_mac_addr peer_macaddr;
3508 u32 vdev_id;
3509 u32 peer_new_assoc;
3510 u32 peer_associd;
3511 u32 peer_flags;
3512 u32 peer_caps;
3513 u32 peer_listen_intval;
3514 u32 peer_ht_caps;
3515 u32 peer_max_mpdu;
3516 u32 peer_mpdu_density;
3517 u32 peer_rate_caps;
3518 u32 peer_nss;
3519 u32 peer_vht_caps;
3520 u32 peer_phymode;
3521 u32 peer_ht_info[2];
3522 struct wmi_rate_set_arg peer_legacy_rates;
3523 struct wmi_rate_set_arg peer_ht_rates;
3524 u32 rx_max_rate;
3525 u32 rx_mcs_set;
3526 u32 tx_max_rate;
3527 u32 tx_mcs_set;
3528 u8 vht_capable;
3529 u8 min_data_rate;
3530 u32 tx_max_mcs_nss;
3531 u32 peer_bw_rxnss_override;
3532 bool is_pmf_enabled;
3533 bool is_wme_set;
3534 bool qos_flag;
3535 bool apsd_flag;
3536 bool ht_flag;
3537 bool bw_40;
3538 bool bw_80;
3539 bool bw_160;
3540 bool stbc_flag;
3541 bool ldpc_flag;
3542 bool static_mimops_flag;
3543 bool dynamic_mimops_flag;
3544 bool spatial_mux_flag;
3545 bool vht_flag;
3546 bool vht_ng_flag;
3547 bool need_ptk_4_way;
3548 bool need_gtk_2_way;
3549 bool auth_flag;
3550 bool safe_mode_enabled;
3551 bool amsdu_disable;
3552 /* Use common structure */
3553 u8 peer_mac[ETH_ALEN];
3554
3555 bool he_flag;
3556 u32 peer_he_cap_macinfo[2];
3557 u32 peer_he_cap_macinfo_internal;
3558 u32 peer_he_caps_6ghz;
3559 u32 peer_he_ops;
3560 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3561 u32 peer_he_mcs_count;
3562 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3563 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3564 bool twt_responder;
3565 bool twt_requester;
3566 struct ath11k_ppe_threshold peer_ppet;
3567 };
3568
3569 struct wmi_peer_assoc_complete_cmd {
3570 u32 tlv_header;
3571 struct wmi_mac_addr peer_macaddr;
3572 u32 vdev_id;
3573 u32 peer_new_assoc;
3574 u32 peer_associd;
3575 u32 peer_flags;
3576 u32 peer_caps;
3577 u32 peer_listen_intval;
3578 u32 peer_ht_caps;
3579 u32 peer_max_mpdu;
3580 u32 peer_mpdu_density;
3581 u32 peer_rate_caps;
3582 u32 peer_nss;
3583 u32 peer_vht_caps;
3584 u32 peer_phymode;
3585 u32 peer_ht_info[2];
3586 u32 num_peer_legacy_rates;
3587 u32 num_peer_ht_rates;
3588 u32 peer_bw_rxnss_override;
3589 struct wmi_ppe_threshold peer_ppet;
3590 u32 peer_he_cap_info;
3591 u32 peer_he_ops;
3592 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3593 u32 peer_he_mcs;
3594 u32 peer_he_cap_info_ext;
3595 u32 peer_he_cap_info_internal;
3596 u32 min_data_rate;
3597 u32 peer_he_caps_6ghz;
3598 } __packed;
3599
3600 struct wmi_stop_scan_cmd {
3601 u32 tlv_header;
3602 u32 requestor;
3603 u32 scan_id;
3604 u32 req_type;
3605 u32 vdev_id;
3606 u32 pdev_id;
3607 };
3608
3609 struct scan_chan_list_params {
3610 u32 pdev_id;
3611 u16 nallchans;
3612 struct channel_param ch_param[1];
3613 };
3614
3615 struct wmi_scan_chan_list_cmd {
3616 u32 tlv_header;
3617 u32 num_scan_chans;
3618 u32 flags;
3619 u32 pdev_id;
3620 } __packed;
3621
3622 #define WMI_MGMT_SEND_DOWNLD_LEN 64
3623
3624 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3625 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3626 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3627 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3628
3629 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3630 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3631 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3632 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3633 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3634
3635 struct wmi_mgmt_send_params {
3636 u32 tlv_header;
3637 u32 tx_params_dword0;
3638 u32 tx_params_dword1;
3639 };
3640
3641 struct wmi_mgmt_send_cmd {
3642 u32 tlv_header;
3643 u32 vdev_id;
3644 u32 desc_id;
3645 u32 chanfreq;
3646 u32 paddr_lo;
3647 u32 paddr_hi;
3648 u32 frame_len;
3649 u32 buf_len;
3650 u32 tx_params_valid;
3651
3652 /* This TLV is followed by struct wmi_mgmt_frame */
3653
3654 /* Followed by struct wmi_mgmt_send_params */
3655 } __packed;
3656
3657 struct wmi_sta_powersave_mode_cmd {
3658 u32 tlv_header;
3659 u32 vdev_id;
3660 u32 sta_ps_mode;
3661 };
3662
3663 struct wmi_sta_smps_force_mode_cmd {
3664 u32 tlv_header;
3665 u32 vdev_id;
3666 u32 forced_mode;
3667 };
3668
3669 struct wmi_sta_smps_param_cmd {
3670 u32 tlv_header;
3671 u32 vdev_id;
3672 u32 param;
3673 u32 value;
3674 };
3675
3676 struct wmi_bcn_prb_info {
3677 u32 tlv_header;
3678 u32 caps;
3679 u32 erp;
3680 } __packed;
3681
3682 enum {
3683 WMI_PDEV_SUSPEND,
3684 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3685 };
3686
3687 struct green_ap_ps_params {
3688 u32 value;
3689 };
3690
3691 struct wmi_pdev_green_ap_ps_enable_cmd_param {
3692 u32 tlv_header;
3693 u32 pdev_id;
3694 u32 enable;
3695 };
3696
3697 struct ap_ps_params {
3698 u32 vdev_id;
3699 u32 param;
3700 u32 value;
3701 };
3702
3703 struct vdev_set_params {
3704 u32 if_id;
3705 u32 param_id;
3706 u32 param_value;
3707 };
3708
3709 struct stats_request_params {
3710 u32 stats_id;
3711 u32 vdev_id;
3712 u32 pdev_id;
3713 };
3714
3715 enum set_init_cc_type {
3716 WMI_COUNTRY_INFO_TYPE_ALPHA,
3717 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3718 WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3719 };
3720
3721 enum set_init_cc_flags {
3722 INVALID_CC,
3723 CC_IS_SET,
3724 REGDMN_IS_SET,
3725 ALPHA_IS_SET,
3726 };
3727
3728 struct wmi_init_country_params {
3729 union {
3730 u16 country_code;
3731 u16 regdom_id;
3732 u8 alpha2[3];
3733 } cc_info;
3734 enum set_init_cc_flags flags;
3735 };
3736
3737 struct wmi_init_country_cmd {
3738 u32 tlv_header;
3739 u32 pdev_id;
3740 u32 init_cc_type;
3741 union {
3742 u32 country_code;
3743 u32 regdom_id;
3744 u32 alpha2;
3745 } cc_info;
3746 } __packed;
3747
3748 #define THERMAL_LEVELS 1
3749 struct tt_level_config {
3750 u32 tmplwm;
3751 u32 tmphwm;
3752 u32 dcoffpercent;
3753 u32 priority;
3754 };
3755
3756 struct thermal_mitigation_params {
3757 u32 pdev_id;
3758 u32 enable;
3759 u32 dc;
3760 u32 dc_per_event;
3761 struct tt_level_config levelconf[THERMAL_LEVELS];
3762 };
3763
3764 struct wmi_therm_throt_config_request_cmd {
3765 u32 tlv_header;
3766 u32 pdev_id;
3767 u32 enable;
3768 u32 dc;
3769 u32 dc_per_event;
3770 u32 therm_throt_levels;
3771 } __packed;
3772
3773 struct wmi_therm_throt_level_config_info {
3774 u32 tlv_header;
3775 u32 temp_lwm;
3776 u32 temp_hwm;
3777 u32 dc_off_percent;
3778 u32 prio;
3779 } __packed;
3780
3781 struct wmi_delba_send_cmd {
3782 u32 tlv_header;
3783 u32 vdev_id;
3784 struct wmi_mac_addr peer_macaddr;
3785 u32 tid;
3786 u32 initiator;
3787 u32 reasoncode;
3788 } __packed;
3789
3790 struct wmi_addba_setresponse_cmd {
3791 u32 tlv_header;
3792 u32 vdev_id;
3793 struct wmi_mac_addr peer_macaddr;
3794 u32 tid;
3795 u32 statuscode;
3796 } __packed;
3797
3798 struct wmi_addba_send_cmd {
3799 u32 tlv_header;
3800 u32 vdev_id;
3801 struct wmi_mac_addr peer_macaddr;
3802 u32 tid;
3803 u32 buffersize;
3804 } __packed;
3805
3806 struct wmi_addba_clear_resp_cmd {
3807 u32 tlv_header;
3808 u32 vdev_id;
3809 struct wmi_mac_addr peer_macaddr;
3810 } __packed;
3811
3812 struct wmi_pdev_pktlog_filter_info {
3813 u32 tlv_header;
3814 struct wmi_mac_addr peer_macaddr;
3815 } __packed;
3816
3817 struct wmi_pdev_pktlog_filter_cmd {
3818 u32 tlv_header;
3819 u32 pdev_id;
3820 u32 enable;
3821 u32 filter_type;
3822 u32 num_mac;
3823 } __packed;
3824
3825 enum ath11k_wmi_pktlog_enable {
3826 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
3827 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
3828 };
3829
3830 struct wmi_pktlog_enable_cmd {
3831 u32 tlv_header;
3832 u32 pdev_id;
3833 u32 evlist; /* WMI_PKTLOG_EVENT */
3834 u32 enable;
3835 } __packed;
3836
3837 struct wmi_pktlog_disable_cmd {
3838 u32 tlv_header;
3839 u32 pdev_id;
3840 } __packed;
3841
3842 #define DFS_PHYERR_UNIT_TEST_CMD 0
3843 #define DFS_UNIT_TEST_MODULE 0x2b
3844 #define DFS_UNIT_TEST_TOKEN 0xAA
3845
3846 enum dfs_test_args_idx {
3847 DFS_TEST_CMDID = 0,
3848 DFS_TEST_PDEV_ID,
3849 DFS_TEST_RADAR_PARAM,
3850 DFS_MAX_TEST_ARGS,
3851 };
3852
3853 struct wmi_dfs_unit_test_arg {
3854 u32 cmd_id;
3855 u32 pdev_id;
3856 u32 radar_param;
3857 };
3858
3859 struct wmi_unit_test_cmd {
3860 u32 tlv_header;
3861 u32 vdev_id;
3862 u32 module_id;
3863 u32 num_args;
3864 u32 diag_token;
3865 /* Followed by test args*/
3866 } __packed;
3867
3868 #define MAX_SUPPORTED_RATES 128
3869
3870 #define WMI_PEER_AUTH 0x00000001
3871 #define WMI_PEER_QOS 0x00000002
3872 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004
3873 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010
3874 #define WMI_PEER_HE 0x00000400
3875 #define WMI_PEER_APSD 0x00000800
3876 #define WMI_PEER_HT 0x00001000
3877 #define WMI_PEER_40MHZ 0x00002000
3878 #define WMI_PEER_STBC 0x00008000
3879 #define WMI_PEER_LDPC 0x00010000
3880 #define WMI_PEER_DYN_MIMOPS 0x00020000
3881 #define WMI_PEER_STATIC_MIMOPS 0x00040000
3882 #define WMI_PEER_SPATIAL_MUX 0x00200000
3883 #define WMI_PEER_TWT_REQ 0x00400000
3884 #define WMI_PEER_TWT_RESP 0x00800000
3885 #define WMI_PEER_VHT 0x02000000
3886 #define WMI_PEER_80MHZ 0x04000000
3887 #define WMI_PEER_PMF 0x08000000
3888 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
3889 * Need to be cleaned up
3890 */
3891 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000
3892 #define WMI_PEER_160MHZ 0x40000000
3893 #define WMI_PEER_SAFEMODE_EN 0x80000000
3894
3895 struct beacon_tmpl_params {
3896 u8 vdev_id;
3897 u32 tim_ie_offset;
3898 u32 tmpl_len;
3899 u32 tmpl_len_aligned;
3900 u32 csa_switch_count_offset;
3901 u32 ext_csa_switch_count_offset;
3902 u8 *frm;
3903 };
3904
3905 struct wmi_rate_set {
3906 u32 num_rates;
3907 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
3908 };
3909
3910 struct wmi_vht_rate_set {
3911 u32 tlv_header;
3912 u32 rx_max_rate;
3913 u32 rx_mcs_set;
3914 u32 tx_max_rate;
3915 u32 tx_mcs_set;
3916 u32 tx_max_mcs_nss;
3917 } __packed;
3918
3919 struct wmi_he_rate_set {
3920 u32 tlv_header;
3921 u32 rx_mcs_set;
3922 u32 tx_mcs_set;
3923 } __packed;
3924
3925 #define MAX_REG_RULES 10
3926 #define REG_ALPHA2_LEN 2
3927
3928 enum wmi_start_event_param {
3929 WMI_VDEV_START_RESP_EVENT = 0,
3930 WMI_VDEV_RESTART_RESP_EVENT,
3931 };
3932
3933 struct wmi_vdev_start_resp_event {
3934 u32 vdev_id;
3935 u32 requestor_id;
3936 enum wmi_start_event_param resp_type;
3937 u32 status;
3938 u32 chain_mask;
3939 u32 smps_mode;
3940 union {
3941 u32 mac_id;
3942 u32 pdev_id;
3943 };
3944 u32 cfgd_tx_streams;
3945 u32 cfgd_rx_streams;
3946 } __packed;
3947
3948 /* VDEV start response status codes */
3949 enum wmi_vdev_start_resp_status_code {
3950 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
3951 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
3952 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
3953 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
3954 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
3955 };
3956
3957 ;
3958 enum cc_setting_code {
3959 REG_SET_CC_STATUS_PASS = 0,
3960 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3961 REG_INIT_ALPHA2_NOT_FOUND = 2,
3962 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3963 REG_SET_CC_STATUS_NO_MEMORY = 4,
3964 REG_SET_CC_STATUS_FAIL = 5,
3965 };
3966
3967 /* Regaulatory Rule Flags Passed by FW */
3968 #define REGULATORY_CHAN_DISABLED BIT(0)
3969 #define REGULATORY_CHAN_NO_IR BIT(1)
3970 #define REGULATORY_CHAN_RADAR BIT(3)
3971 #define REGULATORY_CHAN_NO_OFDM BIT(6)
3972 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
3973
3974 #define REGULATORY_CHAN_NO_HT40 BIT(4)
3975 #define REGULATORY_CHAN_NO_80MHZ BIT(7)
3976 #define REGULATORY_CHAN_NO_160MHZ BIT(8)
3977 #define REGULATORY_CHAN_NO_20MHZ BIT(11)
3978 #define REGULATORY_CHAN_NO_10MHZ BIT(12)
3979
3980 enum {
3981 WMI_REG_SET_CC_STATUS_PASS = 0,
3982 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3983 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
3984 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3985 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
3986 WMI_REG_SET_CC_STATUS_FAIL = 5,
3987 };
3988
3989 struct cur_reg_rule {
3990 u16 start_freq;
3991 u16 end_freq;
3992 u16 max_bw;
3993 u8 reg_power;
3994 u8 ant_gain;
3995 u16 flags;
3996 };
3997
3998 struct cur_regulatory_info {
3999 enum cc_setting_code status_code;
4000 u8 num_phy;
4001 u8 phy_id;
4002 u16 reg_dmn_pair;
4003 u16 ctry_code;
4004 u8 alpha2[REG_ALPHA2_LEN + 1];
4005 u32 dfs_region;
4006 u32 phybitmap;
4007 u32 min_bw_2g;
4008 u32 max_bw_2g;
4009 u32 min_bw_5g;
4010 u32 max_bw_5g;
4011 u32 num_2g_reg_rules;
4012 u32 num_5g_reg_rules;
4013 struct cur_reg_rule *reg_rules_2g_ptr;
4014 struct cur_reg_rule *reg_rules_5g_ptr;
4015 };
4016
4017 struct wmi_reg_chan_list_cc_event {
4018 u32 status_code;
4019 u32 phy_id;
4020 u32 alpha2;
4021 u32 num_phy;
4022 u32 country_id;
4023 u32 domain_code;
4024 u32 dfs_region;
4025 u32 phybitmap;
4026 u32 min_bw_2g;
4027 u32 max_bw_2g;
4028 u32 min_bw_5g;
4029 u32 max_bw_5g;
4030 u32 num_2g_reg_rules;
4031 u32 num_5g_reg_rules;
4032 } __packed;
4033
4034 struct wmi_regulatory_rule_struct {
4035 u32 tlv_header;
4036 u32 freq_info;
4037 u32 bw_pwr_info;
4038 u32 flag_info;
4039 };
4040
4041 struct wmi_vdev_delete_resp_event {
4042 u32 vdev_id;
4043 } __packed;
4044
4045 struct wmi_peer_delete_resp_event {
4046 u32 vdev_id;
4047 struct wmi_mac_addr peer_macaddr;
4048 } __packed;
4049
4050 struct wmi_bcn_tx_status_event {
4051 u32 vdev_id;
4052 u32 tx_status;
4053 } __packed;
4054
4055 struct wmi_vdev_stopped_event {
4056 u32 vdev_id;
4057 } __packed;
4058
4059 struct wmi_pdev_bss_chan_info_event {
4060 u32 freq; /* Units in MHz */
4061 u32 noise_floor; /* units are dBm */
4062 /* rx clear - how often the channel was unused */
4063 u32 rx_clear_count_low;
4064 u32 rx_clear_count_high;
4065 /* cycle count - elapsed time during measured period, in clock ticks */
4066 u32 cycle_count_low;
4067 u32 cycle_count_high;
4068 /* tx cycle count - elapsed time spent in tx, in clock ticks */
4069 u32 tx_cycle_count_low;
4070 u32 tx_cycle_count_high;
4071 /* rx cycle count - elapsed time spent in rx, in clock ticks */
4072 u32 rx_cycle_count_low;
4073 u32 rx_cycle_count_high;
4074 /*rx_cycle cnt for my bss in 64bits format */
4075 u32 rx_bss_cycle_count_low;
4076 u32 rx_bss_cycle_count_high;
4077 u32 pdev_id;
4078 } __packed;
4079
4080 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4081
4082 struct wmi_vdev_install_key_compl_event {
4083 u32 vdev_id;
4084 struct wmi_mac_addr peer_macaddr;
4085 u32 key_idx;
4086 u32 key_flags;
4087 u32 status;
4088 } __packed;
4089
4090 struct wmi_vdev_install_key_complete_arg {
4091 u32 vdev_id;
4092 const u8 *macaddr;
4093 u32 key_idx;
4094 u32 key_flags;
4095 u32 status;
4096 };
4097
4098 struct wmi_peer_assoc_conf_event {
4099 u32 vdev_id;
4100 struct wmi_mac_addr peer_macaddr;
4101 } __packed;
4102
4103 struct wmi_peer_assoc_conf_arg {
4104 u32 vdev_id;
4105 const u8 *macaddr;
4106 };
4107
4108 struct wmi_fils_discovery_event {
4109 u32 vdev_id;
4110 u32 fils_tt;
4111 u32 tbtt;
4112 } __packed;
4113
4114 struct wmi_probe_resp_tx_status_event {
4115 u32 vdev_id;
4116 u32 tx_status;
4117 } __packed;
4118
4119 /*
4120 * PDEV statistics
4121 */
4122 struct wmi_pdev_stats_base {
4123 s32 chan_nf;
4124 u32 tx_frame_count; /* Cycles spent transmitting frames */
4125 u32 rx_frame_count; /* Cycles spent receiving frames */
4126 u32 rx_clear_count; /* Total channel busy time, evidently */
4127 u32 cycle_count; /* Total on-channel time */
4128 u32 phy_err_count;
4129 u32 chan_tx_pwr;
4130 } __packed;
4131
4132 struct wmi_pdev_stats_extra {
4133 u32 ack_rx_bad;
4134 u32 rts_bad;
4135 u32 rts_good;
4136 u32 fcs_bad;
4137 u32 no_beacons;
4138 u32 mib_int_count;
4139 } __packed;
4140
4141 struct wmi_pdev_stats_tx {
4142 /* Num HTT cookies queued to dispatch list */
4143 s32 comp_queued;
4144
4145 /* Num HTT cookies dispatched */
4146 s32 comp_delivered;
4147
4148 /* Num MSDU queued to WAL */
4149 s32 msdu_enqued;
4150
4151 /* Num MPDU queue to WAL */
4152 s32 mpdu_enqued;
4153
4154 /* Num MSDUs dropped by WMM limit */
4155 s32 wmm_drop;
4156
4157 /* Num Local frames queued */
4158 s32 local_enqued;
4159
4160 /* Num Local frames done */
4161 s32 local_freed;
4162
4163 /* Num queued to HW */
4164 s32 hw_queued;
4165
4166 /* Num PPDU reaped from HW */
4167 s32 hw_reaped;
4168
4169 /* Num underruns */
4170 s32 underrun;
4171
4172 /* Num PPDUs cleaned up in TX abort */
4173 s32 tx_abort;
4174
4175 /* Num MPDUs requeued by SW */
4176 s32 mpdus_requeued;
4177
4178 /* excessive retries */
4179 u32 tx_ko;
4180
4181 /* data hw rate code */
4182 u32 data_rc;
4183
4184 /* Scheduler self triggers */
4185 u32 self_triggers;
4186
4187 /* frames dropped due to excessive sw retries */
4188 u32 sw_retry_failure;
4189
4190 /* illegal rate phy errors */
4191 u32 illgl_rate_phy_err;
4192
4193 /* wal pdev continuous xretry */
4194 u32 pdev_cont_xretry;
4195
4196 /* wal pdev tx timeouts */
4197 u32 pdev_tx_timeout;
4198
4199 /* wal pdev resets */
4200 u32 pdev_resets;
4201
4202 /* frames dropped due to non-availability of stateless TIDs */
4203 u32 stateless_tid_alloc_failure;
4204
4205 /* PhY/BB underrun */
4206 u32 phy_underrun;
4207
4208 /* MPDU is more than txop limit */
4209 u32 txop_ovf;
4210 } __packed;
4211
4212 struct wmi_pdev_stats_rx {
4213 /* Cnts any change in ring routing mid-ppdu */
4214 s32 mid_ppdu_route_change;
4215
4216 /* Total number of statuses processed */
4217 s32 status_rcvd;
4218
4219 /* Extra frags on rings 0-3 */
4220 s32 r0_frags;
4221 s32 r1_frags;
4222 s32 r2_frags;
4223 s32 r3_frags;
4224
4225 /* MSDUs / MPDUs delivered to HTT */
4226 s32 htt_msdus;
4227 s32 htt_mpdus;
4228
4229 /* MSDUs / MPDUs delivered to local stack */
4230 s32 loc_msdus;
4231 s32 loc_mpdus;
4232
4233 /* AMSDUs that have more MSDUs than the status ring size */
4234 s32 oversize_amsdu;
4235
4236 /* Number of PHY errors */
4237 s32 phy_errs;
4238
4239 /* Number of PHY errors drops */
4240 s32 phy_err_drop;
4241
4242 /* Number of mpdu errors - FCS, MIC, ENC etc. */
4243 s32 mpdu_errs;
4244 } __packed;
4245
4246 struct wmi_pdev_stats {
4247 struct wmi_pdev_stats_base base;
4248 struct wmi_pdev_stats_tx tx;
4249 struct wmi_pdev_stats_rx rx;
4250 } __packed;
4251
4252 #define WLAN_MAX_AC 4
4253 #define MAX_TX_RATE_VALUES 10
4254 #define MAX_TX_RATE_VALUES 10
4255
4256 struct wmi_vdev_stats {
4257 u32 vdev_id;
4258 u32 beacon_snr;
4259 u32 data_snr;
4260 u32 num_tx_frames[WLAN_MAX_AC];
4261 u32 num_rx_frames;
4262 u32 num_tx_frames_retries[WLAN_MAX_AC];
4263 u32 num_tx_frames_failures[WLAN_MAX_AC];
4264 u32 num_rts_fail;
4265 u32 num_rts_success;
4266 u32 num_rx_err;
4267 u32 num_rx_discard;
4268 u32 num_tx_not_acked;
4269 u32 tx_rate_history[MAX_TX_RATE_VALUES];
4270 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4271 } __packed;
4272
4273 struct wmi_bcn_stats {
4274 u32 vdev_id;
4275 u32 tx_bcn_succ_cnt;
4276 u32 tx_bcn_outage_cnt;
4277 } __packed;
4278
4279 struct wmi_stats_event {
4280 u32 stats_id;
4281 u32 num_pdev_stats;
4282 u32 num_vdev_stats;
4283 u32 num_peer_stats;
4284 u32 num_bcnflt_stats;
4285 u32 num_chan_stats;
4286 u32 num_mib_stats;
4287 u32 pdev_id;
4288 u32 num_bcn_stats;
4289 u32 num_peer_extd_stats;
4290 u32 num_peer_extd2_stats;
4291 } __packed;
4292
4293 struct wmi_pdev_ctl_failsafe_chk_event {
4294 u32 pdev_id;
4295 u32 ctl_failsafe_status;
4296 } __packed;
4297
4298 struct wmi_pdev_csa_switch_ev {
4299 u32 pdev_id;
4300 u32 current_switch_count;
4301 u32 num_vdevs;
4302 } __packed;
4303
4304 struct wmi_pdev_radar_ev {
4305 u32 pdev_id;
4306 u32 detection_mode;
4307 u32 chan_freq;
4308 u32 chan_width;
4309 u32 detector_id;
4310 u32 segment_id;
4311 u32 timestamp;
4312 u32 is_chirp;
4313 s32 freq_offset;
4314 s32 sidx;
4315 } __packed;
4316
4317 struct wmi_pdev_temperature_event {
4318 /* temperature value in Celcius degree */
4319 s32 temp;
4320 u32 pdev_id;
4321 } __packed;
4322
4323 #define WMI_RX_STATUS_OK 0x00
4324 #define WMI_RX_STATUS_ERR_CRC 0x01
4325 #define WMI_RX_STATUS_ERR_DECRYPT 0x08
4326 #define WMI_RX_STATUS_ERR_MIC 0x10
4327 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4328
4329 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4330
4331 struct mgmt_rx_event_params {
4332 u32 chan_freq;
4333 u32 channel;
4334 u32 snr;
4335 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4336 u32 rate;
4337 enum wmi_phy_mode phy_mode;
4338 u32 buf_len;
4339 int status;
4340 u32 flags;
4341 int rssi;
4342 u32 tsf_delta;
4343 u8 pdev_id;
4344 };
4345
4346 #define ATH_MAX_ANTENNA 4
4347
4348 struct wmi_mgmt_rx_hdr {
4349 u32 channel;
4350 u32 snr;
4351 u32 rate;
4352 u32 phy_mode;
4353 u32 buf_len;
4354 u32 status;
4355 u32 rssi_ctl[ATH_MAX_ANTENNA];
4356 u32 flags;
4357 int rssi;
4358 u32 tsf_delta;
4359 u32 rx_tsf_l32;
4360 u32 rx_tsf_u32;
4361 u32 pdev_id;
4362 u32 chan_freq;
4363 } __packed;
4364
4365 #define MAX_ANTENNA_EIGHT 8
4366
4367 struct wmi_rssi_ctl_ext {
4368 u32 tlv_header;
4369 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4370 };
4371
4372 struct wmi_mgmt_tx_compl_event {
4373 u32 desc_id;
4374 u32 status;
4375 u32 pdev_id;
4376 } __packed;
4377
4378 struct wmi_scan_event {
4379 u32 event_type; /* %WMI_SCAN_EVENT_ */
4380 u32 reason; /* %WMI_SCAN_REASON_ */
4381 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4382 u32 scan_req_id;
4383 u32 scan_id;
4384 u32 vdev_id;
4385 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4386 * In case of AP it is TSF of the AP vdev
4387 * In case of STA connected state, this is the TSF of the AP
4388 * In case of STA not connected, it will be the free running HW timer
4389 */
4390 u32 tsf_timestamp;
4391 } __packed;
4392
4393 struct wmi_peer_sta_kickout_arg {
4394 const u8 *mac_addr;
4395 };
4396
4397 struct wmi_peer_sta_kickout_event {
4398 struct wmi_mac_addr peer_macaddr;
4399 } __packed;
4400
4401 enum wmi_roam_reason {
4402 WMI_ROAM_REASON_BETTER_AP = 1,
4403 WMI_ROAM_REASON_BEACON_MISS = 2,
4404 WMI_ROAM_REASON_LOW_RSSI = 3,
4405 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4406 WMI_ROAM_REASON_HO_FAILED = 5,
4407
4408 /* keep last */
4409 WMI_ROAM_REASON_MAX,
4410 };
4411
4412 struct wmi_roam_event {
4413 u32 vdev_id;
4414 u32 reason;
4415 u32 rssi;
4416 } __packed;
4417
4418 #define WMI_CHAN_INFO_START_RESP 0
4419 #define WMI_CHAN_INFO_END_RESP 1
4420
4421 struct wmi_chan_info_event {
4422 u32 err_code;
4423 u32 freq;
4424 u32 cmd_flags;
4425 u32 noise_floor;
4426 u32 rx_clear_count;
4427 u32 cycle_count;
4428 u32 chan_tx_pwr_range;
4429 u32 chan_tx_pwr_tp;
4430 u32 rx_frame_count;
4431 u32 my_bss_rx_cycle_count;
4432 u32 rx_11b_mode_data_duration;
4433 u32 tx_frame_cnt;
4434 u32 mac_clk_mhz;
4435 u32 vdev_id;
4436 } __packed;
4437
4438 struct ath11k_targ_cap {
4439 u32 phy_capability;
4440 u32 max_frag_entry;
4441 u32 num_rf_chains;
4442 u32 ht_cap_info;
4443 u32 vht_cap_info;
4444 u32 vht_supp_mcs;
4445 u32 hw_min_tx_power;
4446 u32 hw_max_tx_power;
4447 u32 sys_cap_info;
4448 u32 min_pkt_size_enable;
4449 u32 max_bcn_ie_size;
4450 u32 max_num_scan_channels;
4451 u32 max_supported_macs;
4452 u32 wmi_fw_sub_feat_caps;
4453 u32 txrx_chainmask;
4454 u32 default_dbs_hw_mode_index;
4455 u32 num_msdu_desc;
4456 };
4457
4458 enum wmi_vdev_type {
4459 WMI_VDEV_TYPE_AP = 1,
4460 WMI_VDEV_TYPE_STA = 2,
4461 WMI_VDEV_TYPE_IBSS = 3,
4462 WMI_VDEV_TYPE_MONITOR = 4,
4463 };
4464
4465 enum wmi_vdev_subtype {
4466 WMI_VDEV_SUBTYPE_NONE,
4467 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4468 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4469 WMI_VDEV_SUBTYPE_P2P_GO,
4470 WMI_VDEV_SUBTYPE_PROXY_STA,
4471 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4472 WMI_VDEV_SUBTYPE_MESH_11S,
4473 };
4474
4475 enum wmi_sta_powersave_param {
4476 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4477 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4478 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4479 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4480 WMI_STA_PS_PARAM_UAPSD = 4,
4481 };
4482
4483 #define WMI_UAPSD_AC_TYPE_DELI 0
4484 #define WMI_UAPSD_AC_TYPE_TRIG 1
4485
4486 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
4487 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \
4488 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
4489
4490 enum wmi_sta_ps_param_uapsd {
4491 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4492 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4493 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4494 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4495 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4496 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4497 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4498 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4499 };
4500
4501 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
4502
4503 struct wmi_sta_uapsd_auto_trig_param {
4504 u32 wmm_ac;
4505 u32 user_priority;
4506 u32 service_interval;
4507 u32 suspend_interval;
4508 u32 delay_interval;
4509 };
4510
4511 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
4512 u32 vdev_id;
4513 struct wmi_mac_addr peer_macaddr;
4514 u32 num_ac;
4515 };
4516
4517 struct wmi_sta_uapsd_auto_trig_arg {
4518 u32 wmm_ac;
4519 u32 user_priority;
4520 u32 service_interval;
4521 u32 suspend_interval;
4522 u32 delay_interval;
4523 };
4524
4525 enum wmi_sta_ps_param_tx_wake_threshold {
4526 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4527 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4528
4529 /* Values greater than one indicate that many TX attempts per beacon
4530 * interval before the STA will wake up
4531 */
4532 };
4533
4534 /* The maximum number of PS-Poll frames the FW will send in response to
4535 * traffic advertised in TIM before waking up (by sending a null frame with PS
4536 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
4537 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
4538 * parameter is used when the RX wake policy is
4539 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4540 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4541 */
4542 enum wmi_sta_ps_param_pspoll_count {
4543 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4544 /* Values greater than 0 indicate the maximum numer of PS-Poll frames
4545 * FW will send before waking up.
4546 */
4547 };
4548
4549 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4550 enum wmi_ap_ps_param_uapsd {
4551 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4552 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4553 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4554 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4555 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4556 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4557 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4558 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4559 };
4560
4561 /* U-APSD maximum service period of peer station */
4562 enum wmi_ap_ps_peer_param_max_sp {
4563 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4564 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4565 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4566 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4567 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4568 };
4569
4570 enum wmi_ap_ps_peer_param {
4571 /** Set uapsd configuration for a given peer.
4572 *
4573 * This include the delivery and trigger enabled state for each AC.
4574 * The host MLME needs to set this based on AP capability and stations
4575 * request Set in the association request received from the station.
4576 *
4577 * Lower 8 bits of the value specify the UAPSD configuration.
4578 *
4579 * (see enum wmi_ap_ps_param_uapsd)
4580 * The default value is 0.
4581 */
4582 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4583
4584 /**
4585 * Set the service period for a UAPSD capable station
4586 *
4587 * The service period from wme ie in the (re)assoc request frame.
4588 *
4589 * (see enum wmi_ap_ps_peer_param_max_sp)
4590 */
4591 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4592
4593 /** Time in seconds for aging out buffered frames
4594 * for STA in power save
4595 */
4596 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4597
4598 /** Specify frame types that are considered SIFS
4599 * RESP trigger frame
4600 */
4601 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4602
4603 /** Specifies the trigger state of TID.
4604 * Valid only for UAPSD frame type
4605 */
4606 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4607
4608 /* Specifies the WNM sleep state of a STA */
4609 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4610 };
4611
4612 #define DISABLE_SIFS_RESPONSE_TRIGGER 0
4613
4614 #define WMI_MAX_KEY_INDEX 3
4615 #define WMI_MAX_KEY_LEN 32
4616
4617 #define WMI_KEY_PAIRWISE 0x00
4618 #define WMI_KEY_GROUP 0x01
4619
4620 #define WMI_CIPHER_NONE 0x0 /* clear key */
4621 #define WMI_CIPHER_WEP 0x1
4622 #define WMI_CIPHER_TKIP 0x2
4623 #define WMI_CIPHER_AES_OCB 0x3
4624 #define WMI_CIPHER_AES_CCM 0x4
4625 #define WMI_CIPHER_WAPI 0x5
4626 #define WMI_CIPHER_CKIP 0x6
4627 #define WMI_CIPHER_AES_CMAC 0x7
4628 #define WMI_CIPHER_ANY 0x8
4629 #define WMI_CIPHER_AES_GCM 0x9
4630 #define WMI_CIPHER_AES_GMAC 0xa
4631
4632 /* Value to disable fixed rate setting */
4633 #define WMI_FIXED_RATE_NONE (0xffff)
4634
4635 #define ATH11K_RC_VERSION_OFFSET 28
4636 #define ATH11K_RC_PREAMBLE_OFFSET 8
4637 #define ATH11K_RC_NSS_OFFSET 5
4638
4639 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
4640 ((1 << ATH11K_RC_VERSION_OFFSET) | \
4641 ((nss) << ATH11K_RC_NSS_OFFSET) | \
4642 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
4643 (rate))
4644
4645 /* Preamble types to be used with VDEV fixed rate configuration */
4646 enum wmi_rate_preamble {
4647 WMI_RATE_PREAMBLE_OFDM,
4648 WMI_RATE_PREAMBLE_CCK,
4649 WMI_RATE_PREAMBLE_HT,
4650 WMI_RATE_PREAMBLE_VHT,
4651 WMI_RATE_PREAMBLE_HE,
4652 };
4653
4654 /**
4655 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4656 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
4657 * @WMI_USE_RTS_CTS : RTS/CTS Enabled.
4658 * @WMI_USE_CTS2SELF : CTS to self protection Enabled.
4659 */
4660 enum wmi_rtscts_prot_mode {
4661 WMI_RTS_CTS_DISABLED = 0,
4662 WMI_USE_RTS_CTS = 1,
4663 WMI_USE_CTS2SELF = 2,
4664 };
4665
4666 /**
4667 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4668 * protection mode.
4669 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
4670 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
4671 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
4672 * but if there's a sw retry, both the rate
4673 * series will use RTS-CTS.
4674 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
4675 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
4676 */
4677 enum wmi_rtscts_profile {
4678 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4679 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4680 WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4681 WMI_RTSCTS_ERP = 3,
4682 WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4683 };
4684
4685 struct ath11k_hal_reg_cap {
4686 u32 eeprom_rd;
4687 u32 eeprom_rd_ext;
4688 u32 regcap1;
4689 u32 regcap2;
4690 u32 wireless_modes;
4691 u32 low_2ghz_chan;
4692 u32 high_2ghz_chan;
4693 u32 low_5ghz_chan;
4694 u32 high_5ghz_chan;
4695 };
4696
4697 struct ath11k_mem_chunk {
4698 void *vaddr;
4699 dma_addr_t paddr;
4700 u32 len;
4701 u32 req_id;
4702 };
4703
4704 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4705
4706 enum wmi_sta_ps_param_rx_wake_policy {
4707 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4708 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4709 };
4710
4711 /* Do not change existing values! Used by ath11k_frame_mode parameter
4712 * module parameter.
4713 */
4714 enum ath11k_hw_txrx_mode {
4715 ATH11K_HW_TXRX_RAW = 0,
4716 ATH11K_HW_TXRX_NATIVE_WIFI = 1,
4717 ATH11K_HW_TXRX_ETHERNET = 2,
4718 };
4719
4720 struct wmi_wmm_params {
4721 u32 tlv_header;
4722 u32 cwmin;
4723 u32 cwmax;
4724 u32 aifs;
4725 u32 txoplimit;
4726 u32 acm;
4727 u32 no_ack;
4728 } __packed;
4729
4730 struct wmi_wmm_params_arg {
4731 u8 acm;
4732 u8 aifs;
4733 u16 cwmin;
4734 u16 cwmax;
4735 u16 txop;
4736 u8 no_ack;
4737 };
4738
4739 struct wmi_vdev_set_wmm_params_cmd {
4740 u32 tlv_header;
4741 u32 vdev_id;
4742 struct wmi_wmm_params wmm_params[4];
4743 u32 wmm_param_type;
4744 } __packed;
4745
4746 struct wmi_wmm_params_all_arg {
4747 struct wmi_wmm_params_arg ac_be;
4748 struct wmi_wmm_params_arg ac_bk;
4749 struct wmi_wmm_params_arg ac_vi;
4750 struct wmi_wmm_params_arg ac_vo;
4751 };
4752
4753 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000
4754 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10
4755 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50
4756 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
4757 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
4758 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
4759 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
4760 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10
4761 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
4762 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
4763 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2
4764 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500
4765 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000
4766 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
4767 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
4768
4769 struct wmi_twt_enable_params_cmd {
4770 u32 tlv_header;
4771 u32 pdev_id;
4772 u32 sta_cong_timer_ms;
4773 u32 mbss_support;
4774 u32 default_slot_size;
4775 u32 congestion_thresh_setup;
4776 u32 congestion_thresh_teardown;
4777 u32 congestion_thresh_critical;
4778 u32 interference_thresh_teardown;
4779 u32 interference_thresh_setup;
4780 u32 min_no_sta_setup;
4781 u32 min_no_sta_teardown;
4782 u32 no_of_bcast_mcast_slots;
4783 u32 min_no_twt_slots;
4784 u32 max_no_sta_twt;
4785 u32 mode_check_interval;
4786 u32 add_sta_slot_interval;
4787 u32 remove_sta_slot_interval;
4788 } __packed;
4789
4790 struct wmi_twt_disable_params_cmd {
4791 u32 tlv_header;
4792 u32 pdev_id;
4793 } __packed;
4794
4795 struct wmi_obss_spatial_reuse_params_cmd {
4796 u32 tlv_header;
4797 u32 pdev_id;
4798 u32 enable;
4799 s32 obss_min;
4800 s32 obss_max;
4801 u32 vdev_id;
4802 } __packed;
4803
4804 struct wmi_pdev_obss_pd_bitmap_cmd {
4805 u32 tlv_header;
4806 u32 pdev_id;
4807 u32 bitmap[2];
4808 } __packed;
4809
4810 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200
4811 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0
4812 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1
4813
4814 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000
4815 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000
4816
4817 struct wmi_obss_color_collision_cfg_params_cmd {
4818 u32 tlv_header;
4819 u32 vdev_id;
4820 u32 flags;
4821 u32 evt_type;
4822 u32 current_bss_color;
4823 u32 detection_period_ms;
4824 u32 scan_period_ms;
4825 u32 free_slot_expiry_time_ms;
4826 } __packed;
4827
4828 struct wmi_bss_color_change_enable_params_cmd {
4829 u32 tlv_header;
4830 u32 vdev_id;
4831 u32 enable;
4832 } __packed;
4833
4834 #define ATH11K_IPV4_TH_SEED_SIZE 5
4835 #define ATH11K_IPV6_TH_SEED_SIZE 11
4836
4837 struct ath11k_wmi_pdev_lro_config_cmd {
4838 u32 tlv_header;
4839 u32 lro_enable;
4840 u32 res;
4841 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
4842 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
4843 u32 pdev_id;
4844 } __packed;
4845
4846 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0
4847 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224
4848 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1
4849 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
4850 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1
4851 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
4852 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
4853 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
4854 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
4855 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
4856 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
4857 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
4858 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
4859 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
4860 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2
4861 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
4862 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
4863 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1
4864
4865 struct ath11k_wmi_vdev_spectral_conf_param {
4866 u32 vdev_id;
4867 u32 scan_count;
4868 u32 scan_period;
4869 u32 scan_priority;
4870 u32 scan_fft_size;
4871 u32 scan_gc_ena;
4872 u32 scan_restart_ena;
4873 u32 scan_noise_floor_ref;
4874 u32 scan_init_delay;
4875 u32 scan_nb_tone_thr;
4876 u32 scan_str_bin_thr;
4877 u32 scan_wb_rpt_mode;
4878 u32 scan_rssi_rpt_mode;
4879 u32 scan_rssi_thr;
4880 u32 scan_pwr_format;
4881 u32 scan_rpt_mode;
4882 u32 scan_bin_scale;
4883 u32 scan_dbm_adj;
4884 u32 scan_chn_mask;
4885 } __packed;
4886
4887 struct ath11k_wmi_vdev_spectral_conf_cmd {
4888 u32 tlv_header;
4889 struct ath11k_wmi_vdev_spectral_conf_param param;
4890 } __packed;
4891
4892 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
4893 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
4894 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
4895 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
4896
4897 struct ath11k_wmi_vdev_spectral_enable_cmd {
4898 u32 tlv_header;
4899 u32 vdev_id;
4900 u32 trigger_cmd;
4901 u32 enable_cmd;
4902 } __packed;
4903
4904 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
4905 u32 tlv_header;
4906 u32 pdev_id;
4907 u32 module_id; /* see enum wmi_direct_buffer_module */
4908 u32 base_paddr_lo;
4909 u32 base_paddr_hi;
4910 u32 head_idx_paddr_lo;
4911 u32 head_idx_paddr_hi;
4912 u32 tail_idx_paddr_lo;
4913 u32 tail_idx_paddr_hi;
4914 u32 num_elems; /* Number of elems in the ring */
4915 u32 buf_size; /* size of allocated buffer in bytes */
4916
4917 /* Number of wmi_dma_buf_release_entry packed together */
4918 u32 num_resp_per_event;
4919
4920 /* Target should timeout and send whatever resp
4921 * it has if this time expires, units in milliseconds
4922 */
4923 u32 event_timeout_ms;
4924 } __packed;
4925
4926 struct ath11k_wmi_dma_buf_release_fixed_param {
4927 u32 pdev_id;
4928 u32 module_id;
4929 u32 num_buf_release_entry;
4930 u32 num_meta_data_entry;
4931 } __packed;
4932
4933 struct wmi_dma_buf_release_entry {
4934 u32 tlv_header;
4935 u32 paddr_lo;
4936
4937 /* Bits 11:0: address of data
4938 * Bits 31:12: host context data
4939 */
4940 u32 paddr_hi;
4941 } __packed;
4942
4943 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0)
4944 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16)
4945
4946 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0)
4947
4948 struct wmi_dma_buf_release_meta_data {
4949 u32 tlv_header;
4950 s32 noise_floor[WMI_MAX_CHAINS];
4951 u32 reset_delay;
4952 u32 freq1;
4953 u32 freq2;
4954 u32 ch_width;
4955 } __packed;
4956
4957 enum wmi_fils_discovery_cmd_type {
4958 WMI_FILS_DISCOVERY_CMD,
4959 WMI_UNSOL_BCAST_PROBE_RESP,
4960 };
4961
4962 struct wmi_fils_discovery_cmd {
4963 u32 tlv_header;
4964 u32 vdev_id;
4965 u32 interval;
4966 u32 config; /* enum wmi_fils_discovery_cmd_type */
4967 } __packed;
4968
4969 struct wmi_fils_discovery_tmpl_cmd {
4970 u32 tlv_header;
4971 u32 vdev_id;
4972 u32 buf_len;
4973 } __packed;
4974
4975 struct wmi_probe_tmpl_cmd {
4976 u32 tlv_header;
4977 u32 vdev_id;
4978 u32 buf_len;
4979 } __packed;
4980
4981 struct target_resource_config {
4982 u32 num_vdevs;
4983 u32 num_peers;
4984 u32 num_active_peers;
4985 u32 num_offload_peers;
4986 u32 num_offload_reorder_buffs;
4987 u32 num_peer_keys;
4988 u32 num_tids;
4989 u32 ast_skid_limit;
4990 u32 tx_chain_mask;
4991 u32 rx_chain_mask;
4992 u32 rx_timeout_pri[4];
4993 u32 rx_decap_mode;
4994 u32 scan_max_pending_req;
4995 u32 bmiss_offload_max_vdev;
4996 u32 roam_offload_max_vdev;
4997 u32 roam_offload_max_ap_profiles;
4998 u32 num_mcast_groups;
4999 u32 num_mcast_table_elems;
5000 u32 mcast2ucast_mode;
5001 u32 tx_dbg_log_size;
5002 u32 num_wds_entries;
5003 u32 dma_burst_size;
5004 u32 mac_aggr_delim;
5005 u32 rx_skip_defrag_timeout_dup_detection_check;
5006 u32 vow_config;
5007 u32 gtk_offload_max_vdev;
5008 u32 num_msdu_desc;
5009 u32 max_frag_entries;
5010 u32 max_peer_ext_stats;
5011 u32 smart_ant_cap;
5012 u32 bk_minfree;
5013 u32 be_minfree;
5014 u32 vi_minfree;
5015 u32 vo_minfree;
5016 u32 rx_batchmode;
5017 u32 tt_support;
5018 u32 atf_config;
5019 u32 iphdr_pad_config;
5020 u32 qwrap_config:16,
5021 alloc_frag_desc_for_data_pkt:16;
5022 u32 num_tdls_vdevs;
5023 u32 num_tdls_conn_table_entries;
5024 u32 beacon_tx_offload_max_vdev;
5025 u32 num_multicast_filter_entries;
5026 u32 num_wow_filters;
5027 u32 num_keep_alive_pattern;
5028 u32 keep_alive_pattern_size;
5029 u32 max_tdls_concurrent_sleep_sta;
5030 u32 max_tdls_concurrent_buffer_sta;
5031 u32 wmi_send_separate;
5032 u32 num_ocb_vdevs;
5033 u32 num_ocb_channels;
5034 u32 num_ocb_schedules;
5035 u32 num_ns_ext_tuples_cfg;
5036 u32 bpf_instruction_size;
5037 u32 max_bssid_rx_filters;
5038 u32 use_pdev_id;
5039 u32 peer_map_unmap_v2_support;
5040 u32 sched_params;
5041 u32 twt_ap_pdev_count;
5042 u32 twt_ap_sta_count;
5043 };
5044
5045 #define WMI_MAX_MEM_REQS 32
5046
5047 #define MAX_RADIOS 3
5048
5049 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
5050 #define WMI_SEND_TIMEOUT_HZ (3 * HZ)
5051
5052 struct ath11k_wmi_base {
5053 struct ath11k_base *ab;
5054 struct ath11k_pdev_wmi wmi[MAX_RADIOS];
5055 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
5056 u32 max_msg_len[MAX_RADIOS];
5057
5058 struct completion service_ready;
5059 struct completion unified_ready;
5060 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE);
5061 wait_queue_head_t tx_credits_wq;
5062 const struct wmi_peer_flags_map *peer_flags;
5063 u32 num_mem_chunks;
5064 u32 rx_decap_mode;
5065 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
5066
5067 enum wmi_host_hw_mode_config_type preferred_hw_mode;
5068 struct target_resource_config wlan_resource_config;
5069
5070 struct ath11k_targ_cap *targ_cap;
5071 };
5072
5073 /* WOW structures */
5074 enum wmi_wow_wakeup_event {
5075 WOW_BMISS_EVENT = 0,
5076 WOW_BETTER_AP_EVENT,
5077 WOW_DEAUTH_RECVD_EVENT,
5078 WOW_MAGIC_PKT_RECVD_EVENT,
5079 WOW_GTK_ERR_EVENT,
5080 WOW_FOURWAY_HSHAKE_EVENT,
5081 WOW_EAPOL_RECVD_EVENT,
5082 WOW_NLO_DETECTED_EVENT,
5083 WOW_DISASSOC_RECVD_EVENT,
5084 WOW_PATTERN_MATCH_EVENT,
5085 WOW_CSA_IE_EVENT,
5086 WOW_PROBE_REQ_WPS_IE_EVENT,
5087 WOW_AUTH_REQ_EVENT,
5088 WOW_ASSOC_REQ_EVENT,
5089 WOW_HTT_EVENT,
5090 WOW_RA_MATCH_EVENT,
5091 WOW_HOST_AUTO_SHUTDOWN_EVENT,
5092 WOW_IOAC_MAGIC_EVENT,
5093 WOW_IOAC_SHORT_EVENT,
5094 WOW_IOAC_EXTEND_EVENT,
5095 WOW_IOAC_TIMER_EVENT,
5096 WOW_DFS_PHYERR_RADAR_EVENT,
5097 WOW_BEACON_EVENT,
5098 WOW_CLIENT_KICKOUT_EVENT,
5099 WOW_EVENT_MAX,
5100 };
5101
5102 enum wmi_wow_interface_cfg {
5103 WOW_IFACE_PAUSE_ENABLED,
5104 WOW_IFACE_PAUSE_DISABLED
5105 };
5106
5107 #define C2S(x) case x: return #x
5108
wow_wakeup_event(enum wmi_wow_wakeup_event ev)5109 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
5110 {
5111 switch (ev) {
5112 C2S(WOW_BMISS_EVENT);
5113 C2S(WOW_BETTER_AP_EVENT);
5114 C2S(WOW_DEAUTH_RECVD_EVENT);
5115 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
5116 C2S(WOW_GTK_ERR_EVENT);
5117 C2S(WOW_FOURWAY_HSHAKE_EVENT);
5118 C2S(WOW_EAPOL_RECVD_EVENT);
5119 C2S(WOW_NLO_DETECTED_EVENT);
5120 C2S(WOW_DISASSOC_RECVD_EVENT);
5121 C2S(WOW_PATTERN_MATCH_EVENT);
5122 C2S(WOW_CSA_IE_EVENT);
5123 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
5124 C2S(WOW_AUTH_REQ_EVENT);
5125 C2S(WOW_ASSOC_REQ_EVENT);
5126 C2S(WOW_HTT_EVENT);
5127 C2S(WOW_RA_MATCH_EVENT);
5128 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
5129 C2S(WOW_IOAC_MAGIC_EVENT);
5130 C2S(WOW_IOAC_SHORT_EVENT);
5131 C2S(WOW_IOAC_EXTEND_EVENT);
5132 C2S(WOW_IOAC_TIMER_EVENT);
5133 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
5134 C2S(WOW_BEACON_EVENT);
5135 C2S(WOW_CLIENT_KICKOUT_EVENT);
5136 C2S(WOW_EVENT_MAX);
5137 default:
5138 return NULL;
5139 }
5140 }
5141
5142 enum wmi_wow_wake_reason {
5143 WOW_REASON_UNSPECIFIED = -1,
5144 WOW_REASON_NLOD = 0,
5145 WOW_REASON_AP_ASSOC_LOST,
5146 WOW_REASON_LOW_RSSI,
5147 WOW_REASON_DEAUTH_RECVD,
5148 WOW_REASON_DISASSOC_RECVD,
5149 WOW_REASON_GTK_HS_ERR,
5150 WOW_REASON_EAP_REQ,
5151 WOW_REASON_FOURWAY_HS_RECV,
5152 WOW_REASON_TIMER_INTR_RECV,
5153 WOW_REASON_PATTERN_MATCH_FOUND,
5154 WOW_REASON_RECV_MAGIC_PATTERN,
5155 WOW_REASON_P2P_DISC,
5156 WOW_REASON_WLAN_HB,
5157 WOW_REASON_CSA_EVENT,
5158 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
5159 WOW_REASON_AUTH_REQ_RECV,
5160 WOW_REASON_ASSOC_REQ_RECV,
5161 WOW_REASON_HTT_EVENT,
5162 WOW_REASON_RA_MATCH,
5163 WOW_REASON_HOST_AUTO_SHUTDOWN,
5164 WOW_REASON_IOAC_MAGIC_EVENT,
5165 WOW_REASON_IOAC_SHORT_EVENT,
5166 WOW_REASON_IOAC_EXTEND_EVENT,
5167 WOW_REASON_IOAC_TIMER_EVENT,
5168 WOW_REASON_ROAM_HO,
5169 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
5170 WOW_REASON_BEACON_RECV,
5171 WOW_REASON_CLIENT_KICKOUT_EVENT,
5172 WOW_REASON_PAGE_FAULT = 0x3a,
5173 WOW_REASON_DEBUG_TEST = 0xFF,
5174 };
5175
wow_reason(enum wmi_wow_wake_reason reason)5176 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
5177 {
5178 switch (reason) {
5179 C2S(WOW_REASON_UNSPECIFIED);
5180 C2S(WOW_REASON_NLOD);
5181 C2S(WOW_REASON_AP_ASSOC_LOST);
5182 C2S(WOW_REASON_LOW_RSSI);
5183 C2S(WOW_REASON_DEAUTH_RECVD);
5184 C2S(WOW_REASON_DISASSOC_RECVD);
5185 C2S(WOW_REASON_GTK_HS_ERR);
5186 C2S(WOW_REASON_EAP_REQ);
5187 C2S(WOW_REASON_FOURWAY_HS_RECV);
5188 C2S(WOW_REASON_TIMER_INTR_RECV);
5189 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
5190 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
5191 C2S(WOW_REASON_P2P_DISC);
5192 C2S(WOW_REASON_WLAN_HB);
5193 C2S(WOW_REASON_CSA_EVENT);
5194 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
5195 C2S(WOW_REASON_AUTH_REQ_RECV);
5196 C2S(WOW_REASON_ASSOC_REQ_RECV);
5197 C2S(WOW_REASON_HTT_EVENT);
5198 C2S(WOW_REASON_RA_MATCH);
5199 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
5200 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
5201 C2S(WOW_REASON_IOAC_SHORT_EVENT);
5202 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
5203 C2S(WOW_REASON_IOAC_TIMER_EVENT);
5204 C2S(WOW_REASON_ROAM_HO);
5205 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
5206 C2S(WOW_REASON_BEACON_RECV);
5207 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
5208 C2S(WOW_REASON_PAGE_FAULT);
5209 C2S(WOW_REASON_DEBUG_TEST);
5210 default:
5211 return NULL;
5212 }
5213 }
5214
5215 #undef C2S
5216
5217 struct wmi_wow_enable_cmd {
5218 u32 tlv_header;
5219 u32 enable;
5220 u32 pause_iface_config;
5221 u32 flags;
5222 } __packed;
5223
5224 struct wmi_wow_host_wakeup_ind {
5225 u32 tlv_header;
5226 u32 reserved;
5227 } __packed;
5228
5229 struct wmi_wow_ev_arg {
5230 u32 vdev_id;
5231 u32 flag;
5232 enum wmi_wow_wake_reason wake_reason;
5233 u32 data_len;
5234 };
5235
5236 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
5237 u32 cmd_id);
5238 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
5239 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
5240 struct sk_buff *frame);
5241 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
5242 struct ieee80211_mutable_offsets *offs,
5243 struct sk_buff *bcn);
5244 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
5245 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
5246 const u8 *bssid);
5247 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
5248 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
5249 bool restart);
5250 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
5251 u32 vdev_id, u32 param_id, u32 param_val);
5252 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
5253 u32 param_value, u8 pdev_id);
5254 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable);
5255 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
5256 int ath11k_wmi_cmd_init(struct ath11k_base *ab);
5257 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
5258 int ath11k_wmi_connect(struct ath11k_base *ab);
5259 int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
5260 u8 pdev_id);
5261 int ath11k_wmi_attach(struct ath11k_base *ab);
5262 void ath11k_wmi_detach(struct ath11k_base *ab);
5263 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
5264 struct vdev_create_params *param);
5265 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
5266 const u8 *addr, dma_addr_t paddr,
5267 u8 tid, u8 ba_window_size_valid,
5268 u32 ba_window_size);
5269 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
5270 struct peer_create_params *param);
5271 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
5272 u32 param_id, u32 param_value);
5273
5274 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
5275 u32 param, u32 param_value);
5276 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
5277 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
5278 const u8 *peer_addr, u8 vdev_id);
5279 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
5280 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
5281 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
5282 struct scan_req_params *params);
5283 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
5284 struct scan_cancel_param *param);
5285 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
5286 struct wmi_wmm_params_all_arg *param);
5287 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
5288 u32 pdev_id);
5289 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
5290
5291 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
5292 struct peer_assoc_params *param);
5293 int ath11k_wmi_vdev_install_key(struct ath11k *ar,
5294 struct wmi_vdev_install_key_arg *arg);
5295 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
5296 enum wmi_bss_chan_info_req_type type);
5297 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
5298 struct stats_request_params *param);
5299 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
5300 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
5301 u8 peer_addr[ETH_ALEN],
5302 struct peer_flush_params *param);
5303 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
5304 struct ap_ps_params *param);
5305 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
5306 struct scan_chan_list_params *chan_list);
5307 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
5308 u32 pdev_id);
5309 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
5310 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5311 u32 tid, u32 buf_size);
5312 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5313 u32 tid, u32 status);
5314 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5315 u32 tid, u32 initiator, u32 reason);
5316 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
5317 u32 vdev_id, u32 bcn_ctrl_op);
5318 int
5319 ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
5320 struct wmi_init_country_params init_cc_param);
5321 int
5322 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
5323 struct thermal_mitigation_params *param);
5324 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
5325 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
5326 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
5327 int
5328 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
5329 struct rx_reorder_queue_remove_params *param);
5330 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
5331 struct pdev_set_regdomain_params *param);
5332 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
5333 struct ath11k_fw_stats *stats);
5334 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
5335 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
5336 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
5337 void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
5338 struct ath11k_fw_stats *fw_stats, u32 stats_id,
5339 char *buf);
5340 int ath11k_wmi_simulate_radar(struct ath11k *ar);
5341 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id);
5342 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
5343 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
5344 struct ieee80211_he_obss_pd *he_obss_pd);
5345 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap);
5346 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap);
5347 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar,
5348 u32 *bitmap);
5349 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
5350 u32 *bitmap);
5351 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar,
5352 u32 *bitmap);
5353 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
5354 u32 *bitmap);
5355 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
5356 u8 bss_color, u32 period,
5357 bool enable);
5358 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
5359 bool enable);
5360 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
5361 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
5362 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
5363 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
5364 u32 trigger, u32 enable);
5365 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
5366 struct ath11k_wmi_vdev_spectral_conf_param *param);
5367 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id,
5368 struct sk_buff *tmpl);
5369 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
5370 bool unsol_bcast_probe_resp_enabled);
5371 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id,
5372 struct sk_buff *tmpl);
5373 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab,
5374 enum wmi_host_hw_mode_config_type mode);
5375 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar);
5376 int ath11k_wmi_wow_enable(struct ath11k *ar);
5377
5378 #endif
5379