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/drivers/staging/media/atomisp/pci/
Dsh_css_param_dvs.h33 #define DVS_NUM_BLOCKS_X(X) (CEIL_MUL(CEIL_DIV((X), DVS_BLOCKDIM_X), 2)) argument
37 #define DVS_NUM_BLOCKS_Y(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_LUMA)) argument
38 #define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) argument
39 #define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) argument
41 #define DVS_TABLE_IN_BLOCKDIM_X_LUMA(X) (DVS_NUM_BLOCKS_X(X) + 1) /* N blocks have N + 1 set of co… argument
42 #define DVS_TABLE_IN_BLOCKDIM_X_CHROMA(X) (DVS_NUM_BLOCKS_X_CHROMA(X) + 1) argument
43 #define DVS_TABLE_IN_BLOCKDIM_Y_LUMA(X) (DVS_NUM_BLOCKS_Y(X) + 1) argument
44 #define DVS_TABLE_IN_BLOCKDIM_Y_CHROMA(X) (DVS_NUM_BLOCKS_Y_CHROMA(X) + 1) argument
46 #define DVS_ENVELOPE_X(X) (((X) == 0) ? (DVS_ENV_MIN_X) : (X)) argument
47 #define DVS_ENVELOPE_Y(X) (((X) == 0) ? (DVS_ENV_MIN_Y) : (X)) argument
Dsh_css_dvs_info.h22 #define DVS_NUM_BLOCKS_X(X) (CEIL_MUL(CEIL_DIV((X), DVS_BLOCKDIM_X), 2)) argument
25 #define DVS_NUM_BLOCKS_Y(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_LUMA)) argument
33 #define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) argument
35 #define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) argument
/drivers/gpu/drm/amd/pm/inc/
Dpp_endian.h27 #define PP_HOST_TO_SMC_UL(X) cpu_to_be32(X) argument
28 #define PP_SMC_TO_HOST_UL(X) be32_to_cpu(X) argument
30 #define PP_HOST_TO_SMC_US(X) cpu_to_be16(X) argument
31 #define PP_SMC_TO_HOST_US(X) be16_to_cpu(X) argument
33 #define CONVERT_FROM_HOST_TO_SMC_UL(X) ((X) = PP_HOST_TO_SMC_UL(X)) argument
34 #define CONVERT_FROM_SMC_TO_HOST_UL(X) ((X) = PP_SMC_TO_HOST_UL(X)) argument
36 #define CONVERT_FROM_HOST_TO_SMC_US(X) ((X) = PP_HOST_TO_SMC_US(X)) argument
/drivers/gpu/drm/nouveau/include/nvhw/
Ddrf.h63 #define NVVAL_N(X,d,r,f, v) NVVAL_X(d##_##r##_##f, (v)) argument
64 #define NVVAL_I(X,d,r,f,i,v) NVVAL_X(d##_##r##_##f(i), (v)) argument
65 #define NVVAL_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL argument
68 #define NVDEF_N(X,d,r,f, v) NVVAL_X(d##_##r##_##f, d##_##r##_##f##_##v) argument
69 #define NVDEF_I(X,d,r,f,i,v) NVVAL_X(d##_##r##_##f(i), d##_##r##_##f##_##v) argument
70 #define NVDEF_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL argument
74 #define NVVAL_GET_N(X,o,d,r,f ) NVVAL_GET_X(o, d##_##r##_##f) argument
75 #define NVVAL_GET_I(X,o,d,r,f,i) NVVAL_GET_X(o, d##_##r##_##f(i)) argument
76 #define NVVAL_GET_(X,_1,_2,_3,_4,_5,IMPL,...) IMPL argument
80 #define NVVAL_TEST_N(X,o,d,r,f, cmp,v) NVVAL_TEST_X(o, d##_##r##_##f , cmp, (v)) argument
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/drivers/gpu/drm/nouveau/include/nvif/
Dpush.h91 #define PUSH_DATA_(X,p,m,i0,i1,d,s,f,a...) PUSH_DATA__((p), (d), "-> "#m f, ##a) argument
103 #define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \ argument
116 #define PUSH_DATAp(X,p,m,i,o,d,s,f,a...) do { \ argument
126 #define PUSH_1(X,f,ds,n,o,p,s,mA,dA) do { \ argument
130 #define PUSH_2(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
135 #define PUSH_3(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
140 #define PUSH_4(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
145 #define PUSH_5(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
150 #define PUSH_6(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
155 #define PUSH_7(X,f,ds,n,o,p,s,mB,dB,mA,dA,a...) do { \ argument
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/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dppevvmath.h218 static fInt ConvertToFraction(int X) /*Add all range checking here. Is it possible to make fInt a p… in ConvertToFraction()
230 static fInt fNegate(fInt X) in fNegate()
236 static fInt Convert_ULONG_ToFraction(uint32_t X) in Convert_ULONG_ToFraction()
248 static fInt GetScaledFraction(int X, int factor) in GetScaledFraction()
297 static fInt fAdd (fInt X, fInt Y) in fAdd()
307 static fInt fSubtract (fInt X, fInt Y) in fSubtract()
332 static fInt fMultiply (fInt X, fInt Y) /* Uses 64-bit integers (int64_t) */ in fMultiply()
356 static fInt fDivide (fInt X, fInt Y) in fDivide()
497 static fInt Divide (int X, int Y) in Divide()
532 static int uAbs(int X) in uAbs()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_dcb.c29 #define QLC_DCB_GET_TC_PRIO(X, P) ((X >> (P * 3)) & 0x7) argument
30 #define QLC_DCB_GET_PGID_PRIO(X, P) ((X >> (P * 8)) & 0xff) argument
31 #define QLC_DCB_GET_BWPER_PG(X, P) ((X >> (P * 8)) & 0xff) argument
32 #define QLC_DCB_GET_TSA_PG(X, P) ((X >> (P * 8)) & 0xff) argument
33 #define QLC_DCB_GET_PFC_PRIO(X, P) (((X >> 24) >> P) & 0x1) argument
34 #define QLC_DCB_GET_PROTO_ID_APP(X) ((X >> 8) & 0xffff) argument
35 #define QLC_DCB_GET_SELECTOR_APP(X) (X & 0xff) argument
41 #define QLC_83XX_DCB_GET_NUMAPP(X) ((X >> 2) & 0xf) argument
42 #define QLC_83XX_DCB_TSA_VALID(X) (X & 0x1) argument
43 #define QLC_83XX_DCB_PFC_VALID(X) ((X >> 1) & 0x1) argument
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/drivers/media/dvb-frontends/
Dstv0367_priv.h28 #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y)) argument
29 #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y)) argument
30 #define INRANGE(X, Y, Z) \ argument
35 #define MAKEWORD(X, Y) (((X) << 8) + (Y)) argument
38 #define LSB(X) (((X) & 0xff)) argument
Dstv0900_priv.h17 #define INRANGE(X, Y, Z) ((((X) <= (Y)) && ((Y) <= (Z))) \ argument
21 #define MAKEWORD(X, Y) (((X) << 8) + (Y)) argument
24 #define LSB(X) (((X) & 0xFF)) argument
/drivers/net/ethernet/amd/
Dau1000_eth.c78 # define MAC_SET_BL(X) (((X) & 0x3) << 6) argument
104 # define MAC_SET_MII_SELECT_REG(X) (((X) & 0x1f) << 6) argument
105 # define MAC_SET_MII_SELECT_PHY(X) (((X) & 0x1f) << 11) argument
111 # define MAC_SET_PAUSE(X) (((X) & 0xffff) << 16) argument
142 # define TX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) argument
182 # define RX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) argument
183 # define RX_SET_BUFF_ADDR(X) ((X) & 0xffffffc0) argument
/drivers/net/ethernet/freescale/
Dfec.h310 #define FEC_R_DES_START(X) (((X) == 1) ? FEC_R_DES_START_1 : \ argument
313 #define FEC_X_DES_START(X) (((X) == 1) ? FEC_X_DES_START_1 : \ argument
316 #define FEC_R_BUFF_SIZE(X) (((X) == 1) ? FEC_R_BUFF_SIZE_1 : \ argument
320 #define FEC_DMA_CFG(X) (((X) == 2) ? FEC_DMA_CFG_2 : FEC_DMA_CFG_1) argument
323 #define FEC_RCMR(X) (((X) == 2) ? FEC_RCMR_2 : FEC_RCMR_1) argument
327 #define IDLE_SLOPE(X) (((X) == 1) ? \ argument
336 #define RCMR_CMP(X) (((X) == 1) ? RCMR_CMP_1 : RCMR_CMP_2) argument
337 #define FEC_TX_BD_FTYPE(X) (((X) & 0xf) << 20) argument
380 #define FEC_ENET_RXF_GET(X) (((X) == 0) ? FEC_ENET_RXF_0 : \ argument
395 #define FEC_ITR_ICFT(X) (((X) & 0xff) << 20) argument
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/drivers/hwmon/
Dw83l786ng.c620 #define IN_UNIT_ATTRS(X) \ argument
625 #define FAN_UNIT_ATTRS(X) \ argument
630 #define TEMP_UNIT_ATTRS(X) \ argument
635 #define PWM_UNIT_ATTRS(X) \ argument
640 #define TOLERANCE_UNIT_ATTRS(X) \ argument
/drivers/input/keyboard/
Dcap11xx.c25 #define CAP11XX_REG_SENOR_DELTA(X) (0x10 + (X)) argument
39 #define CAP11XX_REG_SENSOR_THRESH(X) (0x30 + (X)) argument
47 #define CAP11XX_REG_SENSOR_BASE_CNT(X) (0x50 + (X)) argument
/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_mdss.h48 #define DPU_FORMAT_IS_YUV(X) \ argument
50 #define DPU_FORMAT_IS_DX(X) \ argument
52 #define DPU_FORMAT_IS_LINEAR(X) ((X)->fetch_mode == DPU_FETCH_LINEAR) argument
53 #define DPU_FORMAT_IS_TILE(X) \ argument
56 #define DPU_FORMAT_IS_UBWC(X) \ argument
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_link_encoder.c53 #define MAX(X, Y) ((X) > (Y) ? (X) : (Y)) argument
56 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y)) argument
/drivers/net/ethernet/marvell/octeontx2/af/
Dcgx.h82 #define CGX_CMR_RX_OVR_BP_EN(X) BIT_ULL(((X) + 8)) argument
83 #define CGX_CMR_RX_OVR_BP_BP(X) BIT_ULL(((X) + 4)) argument
/drivers/spmi/
Dspmi-pmic-arb.c38 #define SPMI_MAPPING_BIT_INDEX(X) (((X) >> 18) & 0xF) argument
39 #define SPMI_MAPPING_BIT_IS_0_FLAG(X) (((X) >> 17) & 0x1) argument
40 #define SPMI_MAPPING_BIT_IS_0_RESULT(X) (((X) >> 9) & 0xFF) argument
41 #define SPMI_MAPPING_BIT_IS_1_FLAG(X) (((X) >> 8) & 0x1) argument
42 #define SPMI_MAPPING_BIT_IS_1_RESULT(X) (((X) >> 0) & 0xFF) argument
52 #define SPMI_OWNERSHIP_PERIPH2OWNER(X) ((X) & 0x7) argument
/drivers/net/wireless/ath/
Ddfs_pattern_detector.c43 #define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100) argument
44 #define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100) argument
/drivers/staging/media/ipu3/
Dipu3-tables.c6 #define X 0 /* Don't care value */ macro
/drivers/staging/r8188eu/hal/
DHalPhyRf_8188e.c105 s32 ele_A = 0, ele_D, TempCCk, X, value32; in odm_TXPowerTrackingCallback_ThermalMeter_8188E() local
545 u32 Oldval_0, X, TX0_A, reg; in patha_fill_iqk() local
589 u32 Oldval_1, X, TX1_A, reg; in pathb_fill_iqk() local
/drivers/net/ethernet/mellanox/mlx4/
Den_main.c55 #define MLX4_EN_PARM_INT(X, def_val, desc) \ argument
/drivers/staging/sm750fb/
Dddk750_chip.c319 int N, M, X, d; in sm750_calc_pll_value() local
/drivers/spi/
Dspi-butterfly.c131 #define spidelay(X) do { } while (0) argument
/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dgm107.c350 int E = -1, X; in gm107_gr_init_bios() local
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dio_link_encoder.c67 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y)) argument

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