| /drivers/clk/sunxi-ng/ |
| D | ccu_div.h | 43 #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ argument
51 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ argument
54 #define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) \ argument
63 #define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \ argument
66 #define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \ argument
69 #define _SUNXI_CCU_DIV_MAX(_shift, _width, _max) \ argument
72 #define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) \ argument
75 #define _SUNXI_CCU_DIV(_shift, _width) \ argument
88 _shift, _width, \ argument
105 _shift, _width, \ argument
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| D | ccu_mult.h | 17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ argument
26 #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \ argument
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ argument
32 #define _SUNXI_CCU_MULT(_shift, _width) \ argument
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| D | ccu_mux.h | 32 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ argument
39 #define _SUNXI_CCU_MUX(_shift, _width) \ argument
51 _reg, _shift, _width, _gate, \ argument
66 _shift, _width, _gate, _flags) \ argument
71 #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ argument
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| /drivers/clk/mediatek/ |
| D | clk-mt8183-ipu_conn.c | 44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
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| D | clk-mt8167.c | 657 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
687 #define DIV_ADJ_FLAG(_id, _name, _parent, _reg, _shift, _width, _flag) { \ argument
738 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
747 #define GATE_TOP0_I(_id, _name, _parent, _shift) { \ argument
756 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
765 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
774 #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ argument
783 #define GATE_TOP3(_id, _name, _parent, _shift) { \ argument
792 #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ argument
801 #define GATE_TOP5(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt8192.c | 880 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
923 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
926 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
930 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
933 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
936 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
940 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
943 #define GATE_INFRA4(_id, _name, _parent, _shift) \ argument
946 #define GATE_INFRA5_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
950 #define GATE_INFRA5(_id, _name, _parent, _shift) \ argument
[all …]
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| D | clk-mt2701-aud.c | 18 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
27 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
36 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
45 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt7622-aud.c | 19 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
28 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
37 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
46 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt8516.c | 467 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
527 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
536 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
545 #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ argument
554 #define GATE_TOP3(_id, _name, _parent, _shift) { \ argument
563 #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ argument
572 #define GATE_TOP5(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt8192-vdec.c | 33 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
36 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
39 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
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| D | clk-mt8173.c | 622 #define GATE_ICG(_id, _name, _parent, _shift) { \ argument
661 #define GATE_PERI0(_id, _name, _parent, _shift) { \ argument
670 #define GATE_PERI1(_id, _name, _parent, _shift) { \ argument
737 #define GATE_IMG(_id, _name, _parent, _shift) { \ argument
768 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ argument
777 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ argument
791 #define GATE_VENC(_id, _name, _parent, _shift) { \ argument
807 #define GATE_VENCLT(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt6765.c | 485 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
494 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
503 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
561 #define GATE_IFR2(_id, _name, _parent, _shift) { \ argument
570 #define GATE_IFR3(_id, _name, _parent, _shift) { \ argument
579 #define GATE_IFR4(_id, _name, _parent, _shift) { \ argument
588 #define GATE_IFR5(_id, _name, _parent, _shift) { \ argument
676 #define GATE_APMIXED(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt8183.c | 756 #define GATE_TOP(_id, _name, _parent, _shift) \ argument
790 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
794 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
798 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
802 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
1013 #define GATE_PERI(_id, _name, _parent, _shift) \ argument
1027 #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
1031 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
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| D | clk-mt2712-mm.c | 33 #define GATE_MM0(_id, _name, _parent, _shift) { \ argument
42 #define GATE_MM1(_id, _name, _parent, _shift) { \ argument
51 #define GATE_MM2(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt8192-aud.c | 33 #define GATE_AUD0(_id, _name, _parent, _shift) \ argument
36 #define GATE_AUD1(_id, _name, _parent, _shift) \ argument
39 #define GATE_AUD2(_id, _name, _parent, _shift) \ argument
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| D | clk-mt8192-mm.c | 32 #define GATE_MM0(_id, _name, _parent, _shift) \ argument
35 #define GATE_MM1(_id, _name, _parent, _shift) \ argument
38 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
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| D | clk-mt7622.c | 52 #define GATE_APMIXED(_id, _name, _parent, _shift) { \ argument
61 #define GATE_INFRA(_id, _name, _parent, _shift) { \ argument
70 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
79 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
88 #define GATE_PERI0(_id, _name, _parent, _shift) { \ argument
97 #define GATE_PERI1(_id, _name, _parent, _shift) { \ argument
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| D | clk-mt6779.c | 868 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
871 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
874 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
877 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
1106 #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
1110 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
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| D | clk-mt6797.c | 424 #define GATE_ICG0(_id, _name, _parent, _shift) { \ argument
433 #define GATE_ICG1(_id, _name, _parent, _shift) \ argument
436 #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \ argument
446 #define GATE_ICG2(_id, _name, _parent, _shift) \ argument
449 #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \ argument
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| D | clk-mux.h | 41 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
63 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
71 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
79 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
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| /drivers/clk/sprd/ |
| D | mux.h | 32 #define _SPRD_MUX_CLK(_shift, _width, _table) \ argument
40 _reg, _shift, _width, _flags, _fn) \ argument
52 _reg, _shift, _width, _flags) \ argument
58 _shift, _width, _flags) \ argument
63 _reg, _shift, _width, _flags) \ argument
69 _shift, _width, _flags) \ argument
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| D | div.h | 27 #define _SPRD_DIV_CLK(_shift, _width) \ argument
39 _shift, _width, _flags, _fn) \ argument
51 _shift, _width, _flags) \ argument
56 _shift, _width, _flags) \ argument
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| /drivers/iio/dac/ |
| D | ad5686.c | 191 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ argument
208 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ argument
213 #define DECLARE_AD5338_CHANNELS(name, bits, _shift) \ argument
219 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ argument
227 #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \ argument
239 #define DECLARE_AD5679_CHANNELS(name, bits, _shift) \ argument
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| /drivers/net/ethernet/mellanox/mlxsw/ |
| D | item.h | 266 #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
282 #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
307 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
323 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
348 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
364 #define MLXSW_ITEM32_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
389 #define MLXSW_ITEM64(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
405 #define MLXSW_ITEM64_INDEXED(_type, _cname, _iname, _offset, _shift, \ argument
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| /drivers/clk/actions/ |
| D | owl-pll.h | 41 #define OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ argument
56 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
71 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
85 _shift, _width, _min_mul, _max_mul, _delay, _table, \ argument
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