1 /* Broadcom NetXtreme-C/E network driver.
2 *
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
9 */
10
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/linkmode.h>
15 #include <linux/interrupt.h>
16 #include <linux/pci.h>
17 #include <linux/etherdevice.h>
18 #include <linux/crc32.h>
19 #include <linux/firmware.h>
20 #include <linux/utsname.h>
21 #include <linux/time.h>
22 #include <linux/ptp_clock_kernel.h>
23 #include <linux/net_tstamp.h>
24 #include <linux/timecounter.h>
25 #include "bnxt_hsi.h"
26 #include "bnxt.h"
27 #include "bnxt_hwrm.h"
28 #include "bnxt_ulp.h"
29 #include "bnxt_xdp.h"
30 #include "bnxt_ptp.h"
31 #include "bnxt_ethtool.h"
32 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
33 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
34 #include "bnxt_coredump.h"
35
bnxt_get_msglevel(struct net_device * dev)36 static u32 bnxt_get_msglevel(struct net_device *dev)
37 {
38 struct bnxt *bp = netdev_priv(dev);
39
40 return bp->msg_enable;
41 }
42
bnxt_set_msglevel(struct net_device * dev,u32 value)43 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
44 {
45 struct bnxt *bp = netdev_priv(dev);
46
47 bp->msg_enable = value;
48 }
49
bnxt_get_coalesce(struct net_device * dev,struct ethtool_coalesce * coal,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)50 static int bnxt_get_coalesce(struct net_device *dev,
51 struct ethtool_coalesce *coal,
52 struct kernel_ethtool_coalesce *kernel_coal,
53 struct netlink_ext_ack *extack)
54 {
55 struct bnxt *bp = netdev_priv(dev);
56 struct bnxt_coal *hw_coal;
57 u16 mult;
58
59 memset(coal, 0, sizeof(*coal));
60
61 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
62
63 hw_coal = &bp->rx_coal;
64 mult = hw_coal->bufs_per_record;
65 coal->rx_coalesce_usecs = hw_coal->coal_ticks;
66 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
67 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
68 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
69
70 hw_coal = &bp->tx_coal;
71 mult = hw_coal->bufs_per_record;
72 coal->tx_coalesce_usecs = hw_coal->coal_ticks;
73 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
74 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
75 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
76
77 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
78
79 return 0;
80 }
81
bnxt_set_coalesce(struct net_device * dev,struct ethtool_coalesce * coal,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)82 static int bnxt_set_coalesce(struct net_device *dev,
83 struct ethtool_coalesce *coal,
84 struct kernel_ethtool_coalesce *kernel_coal,
85 struct netlink_ext_ack *extack)
86 {
87 struct bnxt *bp = netdev_priv(dev);
88 bool update_stats = false;
89 struct bnxt_coal *hw_coal;
90 int rc = 0;
91 u16 mult;
92
93 if (coal->use_adaptive_rx_coalesce) {
94 bp->flags |= BNXT_FLAG_DIM;
95 } else {
96 if (bp->flags & BNXT_FLAG_DIM) {
97 bp->flags &= ~(BNXT_FLAG_DIM);
98 goto reset_coalesce;
99 }
100 }
101
102 hw_coal = &bp->rx_coal;
103 mult = hw_coal->bufs_per_record;
104 hw_coal->coal_ticks = coal->rx_coalesce_usecs;
105 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
106 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
107 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
108
109 hw_coal = &bp->tx_coal;
110 mult = hw_coal->bufs_per_record;
111 hw_coal->coal_ticks = coal->tx_coalesce_usecs;
112 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
113 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
114 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
115
116 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
117 u32 stats_ticks = coal->stats_block_coalesce_usecs;
118
119 /* Allow 0, which means disable. */
120 if (stats_ticks)
121 stats_ticks = clamp_t(u32, stats_ticks,
122 BNXT_MIN_STATS_COAL_TICKS,
123 BNXT_MAX_STATS_COAL_TICKS);
124 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
125 bp->stats_coal_ticks = stats_ticks;
126 if (bp->stats_coal_ticks)
127 bp->current_interval =
128 bp->stats_coal_ticks * HZ / 1000000;
129 else
130 bp->current_interval = BNXT_TIMER_INTERVAL;
131 update_stats = true;
132 }
133
134 reset_coalesce:
135 if (test_bit(BNXT_STATE_OPEN, &bp->state)) {
136 if (update_stats) {
137 rc = bnxt_close_nic(bp, true, false);
138 if (!rc)
139 rc = bnxt_open_nic(bp, true, false);
140 } else {
141 rc = bnxt_hwrm_set_coal(bp);
142 }
143 }
144
145 return rc;
146 }
147
148 static const char * const bnxt_ring_rx_stats_str[] = {
149 "rx_ucast_packets",
150 "rx_mcast_packets",
151 "rx_bcast_packets",
152 "rx_discards",
153 "rx_errors",
154 "rx_ucast_bytes",
155 "rx_mcast_bytes",
156 "rx_bcast_bytes",
157 };
158
159 static const char * const bnxt_ring_tx_stats_str[] = {
160 "tx_ucast_packets",
161 "tx_mcast_packets",
162 "tx_bcast_packets",
163 "tx_errors",
164 "tx_discards",
165 "tx_ucast_bytes",
166 "tx_mcast_bytes",
167 "tx_bcast_bytes",
168 };
169
170 static const char * const bnxt_ring_tpa_stats_str[] = {
171 "tpa_packets",
172 "tpa_bytes",
173 "tpa_events",
174 "tpa_aborts",
175 };
176
177 static const char * const bnxt_ring_tpa2_stats_str[] = {
178 "rx_tpa_eligible_pkt",
179 "rx_tpa_eligible_bytes",
180 "rx_tpa_pkt",
181 "rx_tpa_bytes",
182 "rx_tpa_errors",
183 "rx_tpa_events",
184 };
185
186 static const char * const bnxt_rx_sw_stats_str[] = {
187 "rx_l4_csum_errors",
188 "rx_resets",
189 "rx_buf_errors",
190 };
191
192 static const char * const bnxt_cmn_sw_stats_str[] = {
193 "missed_irqs",
194 };
195
196 #define BNXT_RX_STATS_ENTRY(counter) \
197 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
198
199 #define BNXT_TX_STATS_ENTRY(counter) \
200 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
201
202 #define BNXT_RX_STATS_EXT_ENTRY(counter) \
203 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
204
205 #define BNXT_TX_STATS_EXT_ENTRY(counter) \
206 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
207
208 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \
209 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \
210 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
211
212 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \
213 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \
214 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
215
216 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \
217 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \
218 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \
219 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \
220 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \
221 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \
222 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \
223 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \
224 BNXT_RX_STATS_EXT_PFC_ENTRY(7)
225
226 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \
227 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \
228 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \
229 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \
230 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \
231 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \
232 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \
233 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \
234 BNXT_TX_STATS_EXT_PFC_ENTRY(7)
235
236 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \
237 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \
238 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
239
240 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \
241 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \
242 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
243
244 #define BNXT_RX_STATS_EXT_COS_ENTRIES \
245 BNXT_RX_STATS_EXT_COS_ENTRY(0), \
246 BNXT_RX_STATS_EXT_COS_ENTRY(1), \
247 BNXT_RX_STATS_EXT_COS_ENTRY(2), \
248 BNXT_RX_STATS_EXT_COS_ENTRY(3), \
249 BNXT_RX_STATS_EXT_COS_ENTRY(4), \
250 BNXT_RX_STATS_EXT_COS_ENTRY(5), \
251 BNXT_RX_STATS_EXT_COS_ENTRY(6), \
252 BNXT_RX_STATS_EXT_COS_ENTRY(7) \
253
254 #define BNXT_TX_STATS_EXT_COS_ENTRIES \
255 BNXT_TX_STATS_EXT_COS_ENTRY(0), \
256 BNXT_TX_STATS_EXT_COS_ENTRY(1), \
257 BNXT_TX_STATS_EXT_COS_ENTRY(2), \
258 BNXT_TX_STATS_EXT_COS_ENTRY(3), \
259 BNXT_TX_STATS_EXT_COS_ENTRY(4), \
260 BNXT_TX_STATS_EXT_COS_ENTRY(5), \
261 BNXT_TX_STATS_EXT_COS_ENTRY(6), \
262 BNXT_TX_STATS_EXT_COS_ENTRY(7) \
263
264 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \
265 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \
266 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
267
268 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \
269 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \
270 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \
271 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \
272 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \
273 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \
274 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \
275 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \
276 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
277
278 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \
279 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \
280 __stringify(counter##_pri##n) }
281
282 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \
283 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \
284 __stringify(counter##_pri##n) }
285
286 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \
287 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \
288 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \
289 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \
290 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \
291 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \
292 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \
293 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \
294 BNXT_RX_STATS_PRI_ENTRY(counter, 7)
295
296 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \
297 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \
298 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \
299 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \
300 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \
301 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \
302 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \
303 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \
304 BNXT_TX_STATS_PRI_ENTRY(counter, 7)
305
306 enum {
307 RX_TOTAL_DISCARDS,
308 TX_TOTAL_DISCARDS,
309 RX_NETPOLL_DISCARDS,
310 };
311
312 static struct {
313 u64 counter;
314 char string[ETH_GSTRING_LEN];
315 } bnxt_sw_func_stats[] = {
316 {0, "rx_total_discard_pkts"},
317 {0, "tx_total_discard_pkts"},
318 {0, "rx_total_netpoll_discards"},
319 };
320
321 #define NUM_RING_RX_SW_STATS ARRAY_SIZE(bnxt_rx_sw_stats_str)
322 #define NUM_RING_CMN_SW_STATS ARRAY_SIZE(bnxt_cmn_sw_stats_str)
323 #define NUM_RING_RX_HW_STATS ARRAY_SIZE(bnxt_ring_rx_stats_str)
324 #define NUM_RING_TX_HW_STATS ARRAY_SIZE(bnxt_ring_tx_stats_str)
325
326 static const struct {
327 long offset;
328 char string[ETH_GSTRING_LEN];
329 } bnxt_port_stats_arr[] = {
330 BNXT_RX_STATS_ENTRY(rx_64b_frames),
331 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
332 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
333 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
334 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
335 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
336 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
337 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
338 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
339 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
340 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
341 BNXT_RX_STATS_ENTRY(rx_total_frames),
342 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
343 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
344 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
345 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
346 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
347 BNXT_RX_STATS_ENTRY(rx_pause_frames),
348 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
349 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
350 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
351 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
352 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
353 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
354 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
355 BNXT_RX_STATS_ENTRY(rx_good_frames),
356 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
357 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
358 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
359 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
360 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
361 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
362 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
363 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
364 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
365 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
366 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
367 BNXT_RX_STATS_ENTRY(rx_bytes),
368 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
369 BNXT_RX_STATS_ENTRY(rx_runt_frames),
370 BNXT_RX_STATS_ENTRY(rx_stat_discard),
371 BNXT_RX_STATS_ENTRY(rx_stat_err),
372
373 BNXT_TX_STATS_ENTRY(tx_64b_frames),
374 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
375 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
376 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
377 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
378 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
379 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
380 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
381 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
382 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
383 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
384 BNXT_TX_STATS_ENTRY(tx_good_frames),
385 BNXT_TX_STATS_ENTRY(tx_total_frames),
386 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
387 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
388 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
389 BNXT_TX_STATS_ENTRY(tx_pause_frames),
390 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
391 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
392 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
393 BNXT_TX_STATS_ENTRY(tx_err),
394 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
395 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
396 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
397 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
398 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
399 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
400 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
401 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
402 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
403 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
404 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
405 BNXT_TX_STATS_ENTRY(tx_total_collisions),
406 BNXT_TX_STATS_ENTRY(tx_bytes),
407 BNXT_TX_STATS_ENTRY(tx_xthol_frames),
408 BNXT_TX_STATS_ENTRY(tx_stat_discard),
409 BNXT_TX_STATS_ENTRY(tx_stat_error),
410 };
411
412 static const struct {
413 long offset;
414 char string[ETH_GSTRING_LEN];
415 } bnxt_port_stats_ext_arr[] = {
416 BNXT_RX_STATS_EXT_ENTRY(link_down_events),
417 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
418 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
419 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
420 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
421 BNXT_RX_STATS_EXT_COS_ENTRIES,
422 BNXT_RX_STATS_EXT_PFC_ENTRIES,
423 BNXT_RX_STATS_EXT_ENTRY(rx_bits),
424 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
425 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
426 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
427 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
428 };
429
430 static const struct {
431 long offset;
432 char string[ETH_GSTRING_LEN];
433 } bnxt_tx_port_stats_ext_arr[] = {
434 BNXT_TX_STATS_EXT_COS_ENTRIES,
435 BNXT_TX_STATS_EXT_PFC_ENTRIES,
436 };
437
438 static const struct {
439 long base_off;
440 char string[ETH_GSTRING_LEN];
441 } bnxt_rx_bytes_pri_arr[] = {
442 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
443 };
444
445 static const struct {
446 long base_off;
447 char string[ETH_GSTRING_LEN];
448 } bnxt_rx_pkts_pri_arr[] = {
449 BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
450 };
451
452 static const struct {
453 long base_off;
454 char string[ETH_GSTRING_LEN];
455 } bnxt_tx_bytes_pri_arr[] = {
456 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
457 };
458
459 static const struct {
460 long base_off;
461 char string[ETH_GSTRING_LEN];
462 } bnxt_tx_pkts_pri_arr[] = {
463 BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
464 };
465
466 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
467 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
468 #define BNXT_NUM_STATS_PRI \
469 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \
470 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \
471 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \
472 ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
473
bnxt_get_num_tpa_ring_stats(struct bnxt * bp)474 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
475 {
476 if (BNXT_SUPPORTS_TPA(bp)) {
477 if (bp->max_tpa_v2) {
478 if (BNXT_CHIP_P5_THOR(bp))
479 return BNXT_NUM_TPA_RING_STATS_P5;
480 return BNXT_NUM_TPA_RING_STATS_P5_SR2;
481 }
482 return BNXT_NUM_TPA_RING_STATS;
483 }
484 return 0;
485 }
486
bnxt_get_num_ring_stats(struct bnxt * bp)487 static int bnxt_get_num_ring_stats(struct bnxt *bp)
488 {
489 int rx, tx, cmn;
490
491 rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
492 bnxt_get_num_tpa_ring_stats(bp);
493 tx = NUM_RING_TX_HW_STATS;
494 cmn = NUM_RING_CMN_SW_STATS;
495 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
496 cmn * bp->cp_nr_rings;
497 }
498
bnxt_get_num_stats(struct bnxt * bp)499 static int bnxt_get_num_stats(struct bnxt *bp)
500 {
501 int num_stats = bnxt_get_num_ring_stats(bp);
502
503 num_stats += BNXT_NUM_SW_FUNC_STATS;
504
505 if (bp->flags & BNXT_FLAG_PORT_STATS)
506 num_stats += BNXT_NUM_PORT_STATS;
507
508 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
509 num_stats += bp->fw_rx_stats_ext_size +
510 bp->fw_tx_stats_ext_size;
511 if (bp->pri2cos_valid)
512 num_stats += BNXT_NUM_STATS_PRI;
513 }
514
515 return num_stats;
516 }
517
bnxt_get_sset_count(struct net_device * dev,int sset)518 static int bnxt_get_sset_count(struct net_device *dev, int sset)
519 {
520 struct bnxt *bp = netdev_priv(dev);
521
522 switch (sset) {
523 case ETH_SS_STATS:
524 return bnxt_get_num_stats(bp);
525 case ETH_SS_TEST:
526 if (!bp->num_tests)
527 return -EOPNOTSUPP;
528 return bp->num_tests;
529 default:
530 return -EOPNOTSUPP;
531 }
532 }
533
is_rx_ring(struct bnxt * bp,int ring_num)534 static bool is_rx_ring(struct bnxt *bp, int ring_num)
535 {
536 return ring_num < bp->rx_nr_rings;
537 }
538
is_tx_ring(struct bnxt * bp,int ring_num)539 static bool is_tx_ring(struct bnxt *bp, int ring_num)
540 {
541 int tx_base = 0;
542
543 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
544 tx_base = bp->rx_nr_rings;
545
546 if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
547 return true;
548 return false;
549 }
550
bnxt_get_ethtool_stats(struct net_device * dev,struct ethtool_stats * stats,u64 * buf)551 static void bnxt_get_ethtool_stats(struct net_device *dev,
552 struct ethtool_stats *stats, u64 *buf)
553 {
554 u32 i, j = 0;
555 struct bnxt *bp = netdev_priv(dev);
556 u32 tpa_stats;
557
558 if (!bp->bnapi) {
559 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
560 goto skip_ring_stats;
561 }
562
563 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
564 bnxt_sw_func_stats[i].counter = 0;
565
566 tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
567 for (i = 0; i < bp->cp_nr_rings; i++) {
568 struct bnxt_napi *bnapi = bp->bnapi[i];
569 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
570 u64 *sw_stats = cpr->stats.sw_stats;
571 u64 *sw;
572 int k;
573
574 if (is_rx_ring(bp, i)) {
575 for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
576 buf[j] = sw_stats[k];
577 }
578 if (is_tx_ring(bp, i)) {
579 k = NUM_RING_RX_HW_STATS;
580 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
581 j++, k++)
582 buf[j] = sw_stats[k];
583 }
584 if (!tpa_stats || !is_rx_ring(bp, i))
585 goto skip_tpa_ring_stats;
586
587 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
588 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
589 tpa_stats; j++, k++)
590 buf[j] = sw_stats[k];
591
592 skip_tpa_ring_stats:
593 sw = (u64 *)&cpr->sw_stats.rx;
594 if (is_rx_ring(bp, i)) {
595 for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
596 buf[j] = sw[k];
597 }
598
599 sw = (u64 *)&cpr->sw_stats.cmn;
600 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
601 buf[j] = sw[k];
602
603 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
604 BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts);
605 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
606 BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts);
607 bnxt_sw_func_stats[RX_NETPOLL_DISCARDS].counter +=
608 cpr->sw_stats.rx.rx_netpoll_discards;
609 }
610
611 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
612 buf[j] = bnxt_sw_func_stats[i].counter;
613
614 skip_ring_stats:
615 if (bp->flags & BNXT_FLAG_PORT_STATS) {
616 u64 *port_stats = bp->port_stats.sw_stats;
617
618 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
619 buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
620 }
621 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
622 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
623 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
624
625 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
626 buf[j] = *(rx_port_stats_ext +
627 bnxt_port_stats_ext_arr[i].offset);
628 }
629 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
630 buf[j] = *(tx_port_stats_ext +
631 bnxt_tx_port_stats_ext_arr[i].offset);
632 }
633 if (bp->pri2cos_valid) {
634 for (i = 0; i < 8; i++, j++) {
635 long n = bnxt_rx_bytes_pri_arr[i].base_off +
636 bp->pri2cos_idx[i];
637
638 buf[j] = *(rx_port_stats_ext + n);
639 }
640 for (i = 0; i < 8; i++, j++) {
641 long n = bnxt_rx_pkts_pri_arr[i].base_off +
642 bp->pri2cos_idx[i];
643
644 buf[j] = *(rx_port_stats_ext + n);
645 }
646 for (i = 0; i < 8; i++, j++) {
647 long n = bnxt_tx_bytes_pri_arr[i].base_off +
648 bp->pri2cos_idx[i];
649
650 buf[j] = *(tx_port_stats_ext + n);
651 }
652 for (i = 0; i < 8; i++, j++) {
653 long n = bnxt_tx_pkts_pri_arr[i].base_off +
654 bp->pri2cos_idx[i];
655
656 buf[j] = *(tx_port_stats_ext + n);
657 }
658 }
659 }
660 }
661
bnxt_get_strings(struct net_device * dev,u32 stringset,u8 * buf)662 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
663 {
664 struct bnxt *bp = netdev_priv(dev);
665 static const char * const *str;
666 u32 i, j, num_str;
667
668 switch (stringset) {
669 case ETH_SS_STATS:
670 for (i = 0; i < bp->cp_nr_rings; i++) {
671 if (is_rx_ring(bp, i)) {
672 num_str = NUM_RING_RX_HW_STATS;
673 for (j = 0; j < num_str; j++) {
674 sprintf(buf, "[%d]: %s", i,
675 bnxt_ring_rx_stats_str[j]);
676 buf += ETH_GSTRING_LEN;
677 }
678 }
679 if (is_tx_ring(bp, i)) {
680 num_str = NUM_RING_TX_HW_STATS;
681 for (j = 0; j < num_str; j++) {
682 sprintf(buf, "[%d]: %s", i,
683 bnxt_ring_tx_stats_str[j]);
684 buf += ETH_GSTRING_LEN;
685 }
686 }
687 num_str = bnxt_get_num_tpa_ring_stats(bp);
688 if (!num_str || !is_rx_ring(bp, i))
689 goto skip_tpa_stats;
690
691 if (bp->max_tpa_v2)
692 str = bnxt_ring_tpa2_stats_str;
693 else
694 str = bnxt_ring_tpa_stats_str;
695
696 for (j = 0; j < num_str; j++) {
697 sprintf(buf, "[%d]: %s", i, str[j]);
698 buf += ETH_GSTRING_LEN;
699 }
700 skip_tpa_stats:
701 if (is_rx_ring(bp, i)) {
702 num_str = NUM_RING_RX_SW_STATS;
703 for (j = 0; j < num_str; j++) {
704 sprintf(buf, "[%d]: %s", i,
705 bnxt_rx_sw_stats_str[j]);
706 buf += ETH_GSTRING_LEN;
707 }
708 }
709 num_str = NUM_RING_CMN_SW_STATS;
710 for (j = 0; j < num_str; j++) {
711 sprintf(buf, "[%d]: %s", i,
712 bnxt_cmn_sw_stats_str[j]);
713 buf += ETH_GSTRING_LEN;
714 }
715 }
716 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
717 strcpy(buf, bnxt_sw_func_stats[i].string);
718 buf += ETH_GSTRING_LEN;
719 }
720
721 if (bp->flags & BNXT_FLAG_PORT_STATS) {
722 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
723 strcpy(buf, bnxt_port_stats_arr[i].string);
724 buf += ETH_GSTRING_LEN;
725 }
726 }
727 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
728 for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
729 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
730 buf += ETH_GSTRING_LEN;
731 }
732 for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
733 strcpy(buf,
734 bnxt_tx_port_stats_ext_arr[i].string);
735 buf += ETH_GSTRING_LEN;
736 }
737 if (bp->pri2cos_valid) {
738 for (i = 0; i < 8; i++) {
739 strcpy(buf,
740 bnxt_rx_bytes_pri_arr[i].string);
741 buf += ETH_GSTRING_LEN;
742 }
743 for (i = 0; i < 8; i++) {
744 strcpy(buf,
745 bnxt_rx_pkts_pri_arr[i].string);
746 buf += ETH_GSTRING_LEN;
747 }
748 for (i = 0; i < 8; i++) {
749 strcpy(buf,
750 bnxt_tx_bytes_pri_arr[i].string);
751 buf += ETH_GSTRING_LEN;
752 }
753 for (i = 0; i < 8; i++) {
754 strcpy(buf,
755 bnxt_tx_pkts_pri_arr[i].string);
756 buf += ETH_GSTRING_LEN;
757 }
758 }
759 }
760 break;
761 case ETH_SS_TEST:
762 if (bp->num_tests)
763 memcpy(buf, bp->test_info->string,
764 bp->num_tests * ETH_GSTRING_LEN);
765 break;
766 default:
767 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
768 stringset);
769 break;
770 }
771 }
772
bnxt_get_ringparam(struct net_device * dev,struct ethtool_ringparam * ering)773 static void bnxt_get_ringparam(struct net_device *dev,
774 struct ethtool_ringparam *ering)
775 {
776 struct bnxt *bp = netdev_priv(dev);
777
778 if (bp->flags & BNXT_FLAG_AGG_RINGS) {
779 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA;
780 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
781 } else {
782 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
783 ering->rx_jumbo_max_pending = 0;
784 }
785 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
786
787 ering->rx_pending = bp->rx_ring_size;
788 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
789 ering->tx_pending = bp->tx_ring_size;
790 }
791
bnxt_set_ringparam(struct net_device * dev,struct ethtool_ringparam * ering)792 static int bnxt_set_ringparam(struct net_device *dev,
793 struct ethtool_ringparam *ering)
794 {
795 struct bnxt *bp = netdev_priv(dev);
796
797 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
798 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
799 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT))
800 return -EINVAL;
801
802 if (netif_running(dev))
803 bnxt_close_nic(bp, false, false);
804
805 bp->rx_ring_size = ering->rx_pending;
806 bp->tx_ring_size = ering->tx_pending;
807 bnxt_set_ring_params(bp);
808
809 if (netif_running(dev))
810 return bnxt_open_nic(bp, false, false);
811
812 return 0;
813 }
814
bnxt_get_channels(struct net_device * dev,struct ethtool_channels * channel)815 static void bnxt_get_channels(struct net_device *dev,
816 struct ethtool_channels *channel)
817 {
818 struct bnxt *bp = netdev_priv(dev);
819 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
820 int max_rx_rings, max_tx_rings, tcs;
821 int max_tx_sch_inputs, tx_grps;
822
823 /* Get the most up-to-date max_tx_sch_inputs. */
824 if (netif_running(dev) && BNXT_NEW_RM(bp))
825 bnxt_hwrm_func_resc_qcaps(bp, false);
826 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
827
828 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
829 if (max_tx_sch_inputs)
830 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
831
832 tcs = netdev_get_num_tc(dev);
833 tx_grps = max(tcs, 1);
834 if (bp->tx_nr_rings_xdp)
835 tx_grps++;
836 max_tx_rings /= tx_grps;
837 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
838
839 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
840 max_rx_rings = 0;
841 max_tx_rings = 0;
842 }
843 if (max_tx_sch_inputs)
844 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
845
846 if (tcs > 1)
847 max_tx_rings /= tcs;
848
849 channel->max_rx = max_rx_rings;
850 channel->max_tx = max_tx_rings;
851 channel->max_other = 0;
852 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
853 channel->combined_count = bp->rx_nr_rings;
854 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
855 channel->combined_count--;
856 } else {
857 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
858 channel->rx_count = bp->rx_nr_rings;
859 channel->tx_count = bp->tx_nr_rings_per_tc;
860 }
861 }
862 }
863
bnxt_set_channels(struct net_device * dev,struct ethtool_channels * channel)864 static int bnxt_set_channels(struct net_device *dev,
865 struct ethtool_channels *channel)
866 {
867 struct bnxt *bp = netdev_priv(dev);
868 int req_tx_rings, req_rx_rings, tcs;
869 bool sh = false;
870 int tx_xdp = 0;
871 int rc = 0;
872
873 if (channel->other_count)
874 return -EINVAL;
875
876 if (!channel->combined_count &&
877 (!channel->rx_count || !channel->tx_count))
878 return -EINVAL;
879
880 if (channel->combined_count &&
881 (channel->rx_count || channel->tx_count))
882 return -EINVAL;
883
884 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
885 channel->tx_count))
886 return -EINVAL;
887
888 if (channel->combined_count)
889 sh = true;
890
891 tcs = netdev_get_num_tc(dev);
892
893 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
894 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
895 if (bp->tx_nr_rings_xdp) {
896 if (!sh) {
897 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
898 return -EINVAL;
899 }
900 tx_xdp = req_rx_rings;
901 }
902 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
903 if (rc) {
904 netdev_warn(dev, "Unable to allocate the requested rings\n");
905 return rc;
906 }
907
908 if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
909 bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
910 (dev->priv_flags & IFF_RXFH_CONFIGURED)) {
911 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
912 return -EINVAL;
913 }
914
915 if (netif_running(dev)) {
916 if (BNXT_PF(bp)) {
917 /* TODO CHIMP_FW: Send message to all VF's
918 * before PF unload
919 */
920 }
921 rc = bnxt_close_nic(bp, true, false);
922 if (rc) {
923 netdev_err(bp->dev, "Set channel failure rc :%x\n",
924 rc);
925 return rc;
926 }
927 }
928
929 if (sh) {
930 bp->flags |= BNXT_FLAG_SHARED_RINGS;
931 bp->rx_nr_rings = channel->combined_count;
932 bp->tx_nr_rings_per_tc = channel->combined_count;
933 } else {
934 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
935 bp->rx_nr_rings = channel->rx_count;
936 bp->tx_nr_rings_per_tc = channel->tx_count;
937 }
938 bp->tx_nr_rings_xdp = tx_xdp;
939 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
940 if (tcs > 1)
941 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
942
943 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
944 bp->tx_nr_rings + bp->rx_nr_rings;
945
946 /* After changing number of rx channels, update NTUPLE feature. */
947 netdev_update_features(dev);
948 if (netif_running(dev)) {
949 rc = bnxt_open_nic(bp, true, false);
950 if ((!rc) && BNXT_PF(bp)) {
951 /* TODO CHIMP_FW: Send message to all VF's
952 * to renable
953 */
954 }
955 } else {
956 rc = bnxt_reserve_rings(bp, true);
957 }
958
959 return rc;
960 }
961
962 #ifdef CONFIG_RFS_ACCEL
bnxt_grxclsrlall(struct bnxt * bp,struct ethtool_rxnfc * cmd,u32 * rule_locs)963 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
964 u32 *rule_locs)
965 {
966 int i, j = 0;
967
968 cmd->data = bp->ntp_fltr_count;
969 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
970 struct hlist_head *head;
971 struct bnxt_ntuple_filter *fltr;
972
973 head = &bp->ntp_fltr_hash_tbl[i];
974 rcu_read_lock();
975 hlist_for_each_entry_rcu(fltr, head, hash) {
976 if (j == cmd->rule_cnt)
977 break;
978 rule_locs[j++] = fltr->sw_id;
979 }
980 rcu_read_unlock();
981 if (j == cmd->rule_cnt)
982 break;
983 }
984 cmd->rule_cnt = j;
985 return 0;
986 }
987
bnxt_grxclsrule(struct bnxt * bp,struct ethtool_rxnfc * cmd)988 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
989 {
990 struct ethtool_rx_flow_spec *fs =
991 (struct ethtool_rx_flow_spec *)&cmd->fs;
992 struct bnxt_ntuple_filter *fltr;
993 struct flow_keys *fkeys;
994 int i, rc = -EINVAL;
995
996 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
997 return rc;
998
999 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
1000 struct hlist_head *head;
1001
1002 head = &bp->ntp_fltr_hash_tbl[i];
1003 rcu_read_lock();
1004 hlist_for_each_entry_rcu(fltr, head, hash) {
1005 if (fltr->sw_id == fs->location)
1006 goto fltr_found;
1007 }
1008 rcu_read_unlock();
1009 }
1010 return rc;
1011
1012 fltr_found:
1013 fkeys = &fltr->fkeys;
1014 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
1015 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1016 fs->flow_type = TCP_V4_FLOW;
1017 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1018 fs->flow_type = UDP_V4_FLOW;
1019 else
1020 goto fltr_err;
1021
1022 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
1023 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
1024
1025 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
1026 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
1027
1028 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1029 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
1030
1031 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1032 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
1033 } else {
1034 int i;
1035
1036 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1037 fs->flow_type = TCP_V6_FLOW;
1038 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1039 fs->flow_type = UDP_V6_FLOW;
1040 else
1041 goto fltr_err;
1042
1043 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1044 fkeys->addrs.v6addrs.src;
1045 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1046 fkeys->addrs.v6addrs.dst;
1047 for (i = 0; i < 4; i++) {
1048 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
1049 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
1050 }
1051 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1052 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
1053
1054 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1055 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
1056 }
1057
1058 fs->ring_cookie = fltr->rxq;
1059 rc = 0;
1060
1061 fltr_err:
1062 rcu_read_unlock();
1063
1064 return rc;
1065 }
1066 #endif
1067
get_ethtool_ipv4_rss(struct bnxt * bp)1068 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1069 {
1070 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1071 return RXH_IP_SRC | RXH_IP_DST;
1072 return 0;
1073 }
1074
get_ethtool_ipv6_rss(struct bnxt * bp)1075 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1076 {
1077 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1078 return RXH_IP_SRC | RXH_IP_DST;
1079 return 0;
1080 }
1081
bnxt_grxfh(struct bnxt * bp,struct ethtool_rxnfc * cmd)1082 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1083 {
1084 cmd->data = 0;
1085 switch (cmd->flow_type) {
1086 case TCP_V4_FLOW:
1087 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1088 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1089 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1090 cmd->data |= get_ethtool_ipv4_rss(bp);
1091 break;
1092 case UDP_V4_FLOW:
1093 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1094 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1095 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1096 fallthrough;
1097 case SCTP_V4_FLOW:
1098 case AH_ESP_V4_FLOW:
1099 case AH_V4_FLOW:
1100 case ESP_V4_FLOW:
1101 case IPV4_FLOW:
1102 cmd->data |= get_ethtool_ipv4_rss(bp);
1103 break;
1104
1105 case TCP_V6_FLOW:
1106 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1107 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1108 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1109 cmd->data |= get_ethtool_ipv6_rss(bp);
1110 break;
1111 case UDP_V6_FLOW:
1112 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1113 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1114 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1115 fallthrough;
1116 case SCTP_V6_FLOW:
1117 case AH_ESP_V6_FLOW:
1118 case AH_V6_FLOW:
1119 case ESP_V6_FLOW:
1120 case IPV6_FLOW:
1121 cmd->data |= get_ethtool_ipv6_rss(bp);
1122 break;
1123 }
1124 return 0;
1125 }
1126
1127 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1128 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1129
bnxt_srxfh(struct bnxt * bp,struct ethtool_rxnfc * cmd)1130 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1131 {
1132 u32 rss_hash_cfg = bp->rss_hash_cfg;
1133 int tuple, rc = 0;
1134
1135 if (cmd->data == RXH_4TUPLE)
1136 tuple = 4;
1137 else if (cmd->data == RXH_2TUPLE)
1138 tuple = 2;
1139 else if (!cmd->data)
1140 tuple = 0;
1141 else
1142 return -EINVAL;
1143
1144 if (cmd->flow_type == TCP_V4_FLOW) {
1145 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1146 if (tuple == 4)
1147 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1148 } else if (cmd->flow_type == UDP_V4_FLOW) {
1149 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1150 return -EINVAL;
1151 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1152 if (tuple == 4)
1153 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1154 } else if (cmd->flow_type == TCP_V6_FLOW) {
1155 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1156 if (tuple == 4)
1157 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1158 } else if (cmd->flow_type == UDP_V6_FLOW) {
1159 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1160 return -EINVAL;
1161 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1162 if (tuple == 4)
1163 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1164 } else if (tuple == 4) {
1165 return -EINVAL;
1166 }
1167
1168 switch (cmd->flow_type) {
1169 case TCP_V4_FLOW:
1170 case UDP_V4_FLOW:
1171 case SCTP_V4_FLOW:
1172 case AH_ESP_V4_FLOW:
1173 case AH_V4_FLOW:
1174 case ESP_V4_FLOW:
1175 case IPV4_FLOW:
1176 if (tuple == 2)
1177 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1178 else if (!tuple)
1179 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1180 break;
1181
1182 case TCP_V6_FLOW:
1183 case UDP_V6_FLOW:
1184 case SCTP_V6_FLOW:
1185 case AH_ESP_V6_FLOW:
1186 case AH_V6_FLOW:
1187 case ESP_V6_FLOW:
1188 case IPV6_FLOW:
1189 if (tuple == 2)
1190 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1191 else if (!tuple)
1192 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1193 break;
1194 }
1195
1196 if (bp->rss_hash_cfg == rss_hash_cfg)
1197 return 0;
1198
1199 bp->rss_hash_cfg = rss_hash_cfg;
1200 if (netif_running(bp->dev)) {
1201 bnxt_close_nic(bp, false, false);
1202 rc = bnxt_open_nic(bp, false, false);
1203 }
1204 return rc;
1205 }
1206
bnxt_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd,u32 * rule_locs)1207 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1208 u32 *rule_locs)
1209 {
1210 struct bnxt *bp = netdev_priv(dev);
1211 int rc = 0;
1212
1213 switch (cmd->cmd) {
1214 #ifdef CONFIG_RFS_ACCEL
1215 case ETHTOOL_GRXRINGS:
1216 cmd->data = bp->rx_nr_rings;
1217 break;
1218
1219 case ETHTOOL_GRXCLSRLCNT:
1220 cmd->rule_cnt = bp->ntp_fltr_count;
1221 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1222 break;
1223
1224 case ETHTOOL_GRXCLSRLALL:
1225 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1226 break;
1227
1228 case ETHTOOL_GRXCLSRULE:
1229 rc = bnxt_grxclsrule(bp, cmd);
1230 break;
1231 #endif
1232
1233 case ETHTOOL_GRXFH:
1234 rc = bnxt_grxfh(bp, cmd);
1235 break;
1236
1237 default:
1238 rc = -EOPNOTSUPP;
1239 break;
1240 }
1241
1242 return rc;
1243 }
1244
bnxt_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)1245 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1246 {
1247 struct bnxt *bp = netdev_priv(dev);
1248 int rc;
1249
1250 switch (cmd->cmd) {
1251 case ETHTOOL_SRXFH:
1252 rc = bnxt_srxfh(bp, cmd);
1253 break;
1254
1255 default:
1256 rc = -EOPNOTSUPP;
1257 break;
1258 }
1259 return rc;
1260 }
1261
bnxt_get_rxfh_indir_size(struct net_device * dev)1262 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1263 {
1264 struct bnxt *bp = netdev_priv(dev);
1265
1266 if (bp->flags & BNXT_FLAG_CHIP_P5)
1267 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1268 return HW_HASH_INDEX_SIZE;
1269 }
1270
bnxt_get_rxfh_key_size(struct net_device * dev)1271 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1272 {
1273 return HW_HASH_KEY_SIZE;
1274 }
1275
bnxt_get_rxfh(struct net_device * dev,u32 * indir,u8 * key,u8 * hfunc)1276 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1277 u8 *hfunc)
1278 {
1279 struct bnxt *bp = netdev_priv(dev);
1280 struct bnxt_vnic_info *vnic;
1281 u32 i, tbl_size;
1282
1283 if (hfunc)
1284 *hfunc = ETH_RSS_HASH_TOP;
1285
1286 if (!bp->vnic_info)
1287 return 0;
1288
1289 vnic = &bp->vnic_info[0];
1290 if (indir && bp->rss_indir_tbl) {
1291 tbl_size = bnxt_get_rxfh_indir_size(dev);
1292 for (i = 0; i < tbl_size; i++)
1293 indir[i] = bp->rss_indir_tbl[i];
1294 }
1295
1296 if (key && vnic->rss_hash_key)
1297 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1298
1299 return 0;
1300 }
1301
bnxt_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * key,const u8 hfunc)1302 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir,
1303 const u8 *key, const u8 hfunc)
1304 {
1305 struct bnxt *bp = netdev_priv(dev);
1306 int rc = 0;
1307
1308 if (hfunc && hfunc != ETH_RSS_HASH_TOP)
1309 return -EOPNOTSUPP;
1310
1311 if (key)
1312 return -EOPNOTSUPP;
1313
1314 if (indir) {
1315 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
1316
1317 for (i = 0; i < tbl_size; i++)
1318 bp->rss_indir_tbl[i] = indir[i];
1319 pad = bp->rss_indir_tbl_entries - tbl_size;
1320 if (pad)
1321 memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
1322 }
1323
1324 if (netif_running(bp->dev)) {
1325 bnxt_close_nic(bp, false, false);
1326 rc = bnxt_open_nic(bp, false, false);
1327 }
1328 return rc;
1329 }
1330
bnxt_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1331 static void bnxt_get_drvinfo(struct net_device *dev,
1332 struct ethtool_drvinfo *info)
1333 {
1334 struct bnxt *bp = netdev_priv(dev);
1335
1336 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1337 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1338 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1339 info->n_stats = bnxt_get_num_stats(bp);
1340 info->testinfo_len = bp->num_tests;
1341 /* TODO CHIMP_FW: eeprom dump details */
1342 info->eedump_len = 0;
1343 /* TODO CHIMP FW: reg dump details */
1344 info->regdump_len = 0;
1345 }
1346
bnxt_get_regs_len(struct net_device * dev)1347 static int bnxt_get_regs_len(struct net_device *dev)
1348 {
1349 struct bnxt *bp = netdev_priv(dev);
1350 int reg_len;
1351
1352 if (!BNXT_PF(bp))
1353 return -EOPNOTSUPP;
1354
1355 reg_len = BNXT_PXP_REG_LEN;
1356
1357 if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
1358 reg_len += sizeof(struct pcie_ctx_hw_stats);
1359
1360 return reg_len;
1361 }
1362
bnxt_get_regs(struct net_device * dev,struct ethtool_regs * regs,void * _p)1363 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1364 void *_p)
1365 {
1366 struct pcie_ctx_hw_stats *hw_pcie_stats;
1367 struct hwrm_pcie_qstats_input *req;
1368 struct bnxt *bp = netdev_priv(dev);
1369 dma_addr_t hw_pcie_stats_addr;
1370 int rc;
1371
1372 regs->version = 0;
1373 bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
1374
1375 if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
1376 return;
1377
1378 if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))
1379 return;
1380
1381 hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),
1382 &hw_pcie_stats_addr);
1383 if (!hw_pcie_stats) {
1384 hwrm_req_drop(bp, req);
1385 return;
1386 }
1387
1388 regs->version = 1;
1389 hwrm_req_hold(bp, req); /* hold on to slice */
1390 req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
1391 req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
1392 rc = hwrm_req_send(bp, req);
1393 if (!rc) {
1394 __le64 *src = (__le64 *)hw_pcie_stats;
1395 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
1396 int i;
1397
1398 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
1399 dst[i] = le64_to_cpu(src[i]);
1400 }
1401 hwrm_req_drop(bp, req);
1402 }
1403
bnxt_get_wol(struct net_device * dev,struct ethtool_wolinfo * wol)1404 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1405 {
1406 struct bnxt *bp = netdev_priv(dev);
1407
1408 wol->supported = 0;
1409 wol->wolopts = 0;
1410 memset(&wol->sopass, 0, sizeof(wol->sopass));
1411 if (bp->flags & BNXT_FLAG_WOL_CAP) {
1412 wol->supported = WAKE_MAGIC;
1413 if (bp->wol)
1414 wol->wolopts = WAKE_MAGIC;
1415 }
1416 }
1417
bnxt_set_wol(struct net_device * dev,struct ethtool_wolinfo * wol)1418 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1419 {
1420 struct bnxt *bp = netdev_priv(dev);
1421
1422 if (wol->wolopts & ~WAKE_MAGIC)
1423 return -EINVAL;
1424
1425 if (wol->wolopts & WAKE_MAGIC) {
1426 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1427 return -EINVAL;
1428 if (!bp->wol) {
1429 if (bnxt_hwrm_alloc_wol_fltr(bp))
1430 return -EBUSY;
1431 bp->wol = 1;
1432 }
1433 } else {
1434 if (bp->wol) {
1435 if (bnxt_hwrm_free_wol_fltr(bp))
1436 return -EBUSY;
1437 bp->wol = 0;
1438 }
1439 }
1440 return 0;
1441 }
1442
_bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds,u8 fw_pause)1443 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1444 {
1445 u32 speed_mask = 0;
1446
1447 /* TODO: support 25GB, 40GB, 50GB with different cable type */
1448 /* set the advertised speeds */
1449 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1450 speed_mask |= ADVERTISED_100baseT_Full;
1451 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1452 speed_mask |= ADVERTISED_1000baseT_Full;
1453 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1454 speed_mask |= ADVERTISED_2500baseX_Full;
1455 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1456 speed_mask |= ADVERTISED_10000baseT_Full;
1457 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1458 speed_mask |= ADVERTISED_40000baseCR4_Full;
1459
1460 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1461 speed_mask |= ADVERTISED_Pause;
1462 else if (fw_pause & BNXT_LINK_PAUSE_TX)
1463 speed_mask |= ADVERTISED_Asym_Pause;
1464 else if (fw_pause & BNXT_LINK_PAUSE_RX)
1465 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1466
1467 return speed_mask;
1468 }
1469
1470 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1471 { \
1472 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
1473 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1474 100baseT_Full); \
1475 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
1476 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1477 1000baseT_Full); \
1478 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
1479 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1480 10000baseT_Full); \
1481 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
1482 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1483 25000baseCR_Full); \
1484 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
1485 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1486 40000baseCR4_Full);\
1487 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
1488 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1489 50000baseCR2_Full);\
1490 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
1491 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1492 100000baseCR4_Full);\
1493 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
1494 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1495 Pause); \
1496 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
1497 ethtool_link_ksettings_add_link_mode( \
1498 lk_ksettings, name, Asym_Pause);\
1499 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
1500 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1501 Asym_Pause); \
1502 } \
1503 }
1504
1505 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
1506 { \
1507 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1508 100baseT_Full) || \
1509 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1510 100baseT_Half)) \
1511 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
1512 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1513 1000baseT_Full) || \
1514 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1515 1000baseT_Half)) \
1516 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
1517 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1518 10000baseT_Full)) \
1519 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
1520 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1521 25000baseCR_Full)) \
1522 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
1523 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1524 40000baseCR4_Full)) \
1525 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
1526 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1527 50000baseCR2_Full)) \
1528 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
1529 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1530 100000baseCR4_Full)) \
1531 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
1532 }
1533
1534 #define BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, name) \
1535 { \
1536 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_50GB) \
1537 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1538 50000baseCR_Full); \
1539 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_100GB) \
1540 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1541 100000baseCR2_Full);\
1542 if ((fw_speeds) & BNXT_LINK_PAM4_SPEED_MSK_200GB) \
1543 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1544 200000baseCR4_Full);\
1545 }
1546
1547 #define BNXT_ETHTOOL_TO_FW_PAM4_SPDS(fw_speeds, lk_ksettings, name) \
1548 { \
1549 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1550 50000baseCR_Full)) \
1551 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_50GB; \
1552 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1553 100000baseCR2_Full)) \
1554 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_100GB; \
1555 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1556 200000baseCR4_Full)) \
1557 (fw_speeds) |= BNXT_LINK_PAM4_SPEED_MSK_200GB; \
1558 }
1559
bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info * link_info,struct ethtool_link_ksettings * lk_ksettings)1560 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info,
1561 struct ethtool_link_ksettings *lk_ksettings)
1562 {
1563 u16 fec_cfg = link_info->fec_cfg;
1564
1565 if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) {
1566 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1567 lk_ksettings->link_modes.advertising);
1568 return;
1569 }
1570 if (fec_cfg & BNXT_FEC_ENC_BASE_R)
1571 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1572 lk_ksettings->link_modes.advertising);
1573 if (fec_cfg & BNXT_FEC_ENC_RS)
1574 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1575 lk_ksettings->link_modes.advertising);
1576 if (fec_cfg & BNXT_FEC_ENC_LLRS)
1577 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
1578 lk_ksettings->link_modes.advertising);
1579 }
1580
bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info * link_info,struct ethtool_link_ksettings * lk_ksettings)1581 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1582 struct ethtool_link_ksettings *lk_ksettings)
1583 {
1584 u16 fw_speeds = link_info->advertising;
1585 u8 fw_pause = 0;
1586
1587 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1588 fw_pause = link_info->auto_pause_setting;
1589
1590 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1591 fw_speeds = link_info->advertising_pam4;
1592 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, advertising);
1593 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings);
1594 }
1595
bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info * link_info,struct ethtool_link_ksettings * lk_ksettings)1596 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1597 struct ethtool_link_ksettings *lk_ksettings)
1598 {
1599 u16 fw_speeds = link_info->lp_auto_link_speeds;
1600 u8 fw_pause = 0;
1601
1602 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1603 fw_pause = link_info->lp_pause;
1604
1605 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1606 lp_advertising);
1607 fw_speeds = link_info->lp_auto_pam4_link_speeds;
1608 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, lp_advertising);
1609 }
1610
bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info * link_info,struct ethtool_link_ksettings * lk_ksettings)1611 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info,
1612 struct ethtool_link_ksettings *lk_ksettings)
1613 {
1614 u16 fec_cfg = link_info->fec_cfg;
1615
1616 if (fec_cfg & BNXT_FEC_NONE) {
1617 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1618 lk_ksettings->link_modes.supported);
1619 return;
1620 }
1621 if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)
1622 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1623 lk_ksettings->link_modes.supported);
1624 if (fec_cfg & BNXT_FEC_ENC_RS_CAP)
1625 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1626 lk_ksettings->link_modes.supported);
1627 if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP)
1628 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
1629 lk_ksettings->link_modes.supported);
1630 }
1631
bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info * link_info,struct ethtool_link_ksettings * lk_ksettings)1632 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1633 struct ethtool_link_ksettings *lk_ksettings)
1634 {
1635 u16 fw_speeds = link_info->support_speeds;
1636
1637 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1638 fw_speeds = link_info->support_pam4_speeds;
1639 BNXT_FW_TO_ETHTOOL_PAM4_SPDS(fw_speeds, lk_ksettings, supported);
1640
1641 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1642 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1643 Asym_Pause);
1644
1645 if (link_info->support_auto_speeds ||
1646 link_info->support_pam4_auto_speeds)
1647 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1648 Autoneg);
1649 bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings);
1650 }
1651
bnxt_fw_to_ethtool_speed(u16 fw_link_speed)1652 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1653 {
1654 switch (fw_link_speed) {
1655 case BNXT_LINK_SPEED_100MB:
1656 return SPEED_100;
1657 case BNXT_LINK_SPEED_1GB:
1658 return SPEED_1000;
1659 case BNXT_LINK_SPEED_2_5GB:
1660 return SPEED_2500;
1661 case BNXT_LINK_SPEED_10GB:
1662 return SPEED_10000;
1663 case BNXT_LINK_SPEED_20GB:
1664 return SPEED_20000;
1665 case BNXT_LINK_SPEED_25GB:
1666 return SPEED_25000;
1667 case BNXT_LINK_SPEED_40GB:
1668 return SPEED_40000;
1669 case BNXT_LINK_SPEED_50GB:
1670 return SPEED_50000;
1671 case BNXT_LINK_SPEED_100GB:
1672 return SPEED_100000;
1673 case BNXT_LINK_SPEED_200GB:
1674 return SPEED_200000;
1675 default:
1676 return SPEED_UNKNOWN;
1677 }
1678 }
1679
bnxt_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * lk_ksettings)1680 static int bnxt_get_link_ksettings(struct net_device *dev,
1681 struct ethtool_link_ksettings *lk_ksettings)
1682 {
1683 struct bnxt *bp = netdev_priv(dev);
1684 struct bnxt_link_info *link_info = &bp->link_info;
1685 struct ethtool_link_settings *base = &lk_ksettings->base;
1686 u32 ethtool_speed;
1687
1688 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1689 mutex_lock(&bp->link_lock);
1690 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1691
1692 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1693 if (link_info->autoneg) {
1694 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1695 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1696 advertising, Autoneg);
1697 base->autoneg = AUTONEG_ENABLE;
1698 base->duplex = DUPLEX_UNKNOWN;
1699 if (link_info->phy_link_status == BNXT_LINK_LINK) {
1700 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1701 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1702 base->duplex = DUPLEX_FULL;
1703 else
1704 base->duplex = DUPLEX_HALF;
1705 }
1706 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1707 } else {
1708 base->autoneg = AUTONEG_DISABLE;
1709 ethtool_speed =
1710 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1711 base->duplex = DUPLEX_HALF;
1712 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1713 base->duplex = DUPLEX_FULL;
1714 }
1715 base->speed = ethtool_speed;
1716
1717 base->port = PORT_NONE;
1718 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1719 base->port = PORT_TP;
1720 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1721 TP);
1722 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1723 TP);
1724 } else {
1725 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1726 FIBRE);
1727 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1728 FIBRE);
1729
1730 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1731 base->port = PORT_DA;
1732 else if (link_info->media_type ==
1733 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1734 base->port = PORT_FIBRE;
1735 }
1736 base->phy_address = link_info->phy_addr;
1737 mutex_unlock(&bp->link_lock);
1738
1739 return 0;
1740 }
1741
bnxt_force_link_speed(struct net_device * dev,u32 ethtool_speed)1742 static int bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed)
1743 {
1744 struct bnxt *bp = netdev_priv(dev);
1745 struct bnxt_link_info *link_info = &bp->link_info;
1746 u16 support_pam4_spds = link_info->support_pam4_speeds;
1747 u16 support_spds = link_info->support_speeds;
1748 u8 sig_mode = BNXT_SIG_MODE_NRZ;
1749 u16 fw_speed = 0;
1750
1751 switch (ethtool_speed) {
1752 case SPEED_100:
1753 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1754 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB;
1755 break;
1756 case SPEED_1000:
1757 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1758 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
1759 break;
1760 case SPEED_2500:
1761 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1762 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB;
1763 break;
1764 case SPEED_10000:
1765 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1766 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
1767 break;
1768 case SPEED_20000:
1769 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1770 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB;
1771 break;
1772 case SPEED_25000:
1773 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1774 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
1775 break;
1776 case SPEED_40000:
1777 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1778 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
1779 break;
1780 case SPEED_50000:
1781 if (support_spds & BNXT_LINK_SPEED_MSK_50GB) {
1782 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
1783 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) {
1784 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB;
1785 sig_mode = BNXT_SIG_MODE_PAM4;
1786 }
1787 break;
1788 case SPEED_100000:
1789 if (support_spds & BNXT_LINK_SPEED_MSK_100GB) {
1790 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB;
1791 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) {
1792 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB;
1793 sig_mode = BNXT_SIG_MODE_PAM4;
1794 }
1795 break;
1796 case SPEED_200000:
1797 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) {
1798 fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB;
1799 sig_mode = BNXT_SIG_MODE_PAM4;
1800 }
1801 break;
1802 }
1803
1804 if (!fw_speed) {
1805 netdev_err(dev, "unsupported speed!\n");
1806 return -EINVAL;
1807 }
1808
1809 if (link_info->req_link_speed == fw_speed &&
1810 link_info->req_signal_mode == sig_mode &&
1811 link_info->autoneg == 0)
1812 return -EALREADY;
1813
1814 link_info->req_link_speed = fw_speed;
1815 link_info->req_signal_mode = sig_mode;
1816 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1817 link_info->autoneg = 0;
1818 link_info->advertising = 0;
1819 link_info->advertising_pam4 = 0;
1820
1821 return 0;
1822 }
1823
bnxt_get_fw_auto_link_speeds(u32 advertising)1824 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1825 {
1826 u16 fw_speed_mask = 0;
1827
1828 /* only support autoneg at speed 100, 1000, and 10000 */
1829 if (advertising & (ADVERTISED_100baseT_Full |
1830 ADVERTISED_100baseT_Half)) {
1831 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1832 }
1833 if (advertising & (ADVERTISED_1000baseT_Full |
1834 ADVERTISED_1000baseT_Half)) {
1835 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1836 }
1837 if (advertising & ADVERTISED_10000baseT_Full)
1838 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1839
1840 if (advertising & ADVERTISED_40000baseCR4_Full)
1841 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1842
1843 return fw_speed_mask;
1844 }
1845
bnxt_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * lk_ksettings)1846 static int bnxt_set_link_ksettings(struct net_device *dev,
1847 const struct ethtool_link_ksettings *lk_ksettings)
1848 {
1849 struct bnxt *bp = netdev_priv(dev);
1850 struct bnxt_link_info *link_info = &bp->link_info;
1851 const struct ethtool_link_settings *base = &lk_ksettings->base;
1852 bool set_pause = false;
1853 u32 speed;
1854 int rc = 0;
1855
1856 if (!BNXT_PHY_CFG_ABLE(bp))
1857 return -EOPNOTSUPP;
1858
1859 mutex_lock(&bp->link_lock);
1860 if (base->autoneg == AUTONEG_ENABLE) {
1861 link_info->advertising = 0;
1862 link_info->advertising_pam4 = 0;
1863 BNXT_ETHTOOL_TO_FW_SPDS(link_info->advertising, lk_ksettings,
1864 advertising);
1865 BNXT_ETHTOOL_TO_FW_PAM4_SPDS(link_info->advertising_pam4,
1866 lk_ksettings, advertising);
1867 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1868 if (!link_info->advertising && !link_info->advertising_pam4) {
1869 link_info->advertising = link_info->support_auto_speeds;
1870 link_info->advertising_pam4 =
1871 link_info->support_pam4_auto_speeds;
1872 }
1873 /* any change to autoneg will cause link change, therefore the
1874 * driver should put back the original pause setting in autoneg
1875 */
1876 set_pause = true;
1877 } else {
1878 u8 phy_type = link_info->phy_type;
1879
1880 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1881 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1882 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1883 netdev_err(dev, "10GBase-T devices must autoneg\n");
1884 rc = -EINVAL;
1885 goto set_setting_exit;
1886 }
1887 if (base->duplex == DUPLEX_HALF) {
1888 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1889 rc = -EINVAL;
1890 goto set_setting_exit;
1891 }
1892 speed = base->speed;
1893 rc = bnxt_force_link_speed(dev, speed);
1894 if (rc) {
1895 if (rc == -EALREADY)
1896 rc = 0;
1897 goto set_setting_exit;
1898 }
1899 }
1900
1901 if (netif_running(dev))
1902 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1903
1904 set_setting_exit:
1905 mutex_unlock(&bp->link_lock);
1906 return rc;
1907 }
1908
bnxt_get_fecparam(struct net_device * dev,struct ethtool_fecparam * fec)1909 static int bnxt_get_fecparam(struct net_device *dev,
1910 struct ethtool_fecparam *fec)
1911 {
1912 struct bnxt *bp = netdev_priv(dev);
1913 struct bnxt_link_info *link_info;
1914 u8 active_fec;
1915 u16 fec_cfg;
1916
1917 link_info = &bp->link_info;
1918 fec_cfg = link_info->fec_cfg;
1919 active_fec = link_info->active_fec_sig_mode &
1920 PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK;
1921 if (fec_cfg & BNXT_FEC_NONE) {
1922 fec->fec = ETHTOOL_FEC_NONE;
1923 fec->active_fec = ETHTOOL_FEC_NONE;
1924 return 0;
1925 }
1926 if (fec_cfg & BNXT_FEC_AUTONEG)
1927 fec->fec |= ETHTOOL_FEC_AUTO;
1928 if (fec_cfg & BNXT_FEC_ENC_BASE_R)
1929 fec->fec |= ETHTOOL_FEC_BASER;
1930 if (fec_cfg & BNXT_FEC_ENC_RS)
1931 fec->fec |= ETHTOOL_FEC_RS;
1932 if (fec_cfg & BNXT_FEC_ENC_LLRS)
1933 fec->fec |= ETHTOOL_FEC_LLRS;
1934
1935 switch (active_fec) {
1936 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE:
1937 fec->active_fec |= ETHTOOL_FEC_BASER;
1938 break;
1939 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE:
1940 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE:
1941 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE:
1942 fec->active_fec |= ETHTOOL_FEC_RS;
1943 break;
1944 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE:
1945 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE:
1946 fec->active_fec |= ETHTOOL_FEC_LLRS;
1947 break;
1948 case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE:
1949 fec->active_fec |= ETHTOOL_FEC_OFF;
1950 break;
1951 }
1952 return 0;
1953 }
1954
bnxt_get_fec_stats(struct net_device * dev,struct ethtool_fec_stats * fec_stats)1955 static void bnxt_get_fec_stats(struct net_device *dev,
1956 struct ethtool_fec_stats *fec_stats)
1957 {
1958 struct bnxt *bp = netdev_priv(dev);
1959 u64 *rx;
1960
1961 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
1962 return;
1963
1964 rx = bp->rx_port_stats_ext.sw_stats;
1965 fec_stats->corrected_bits.total =
1966 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits));
1967 }
1968
bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info * link_info,u32 fec)1969 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
1970 u32 fec)
1971 {
1972 u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE;
1973
1974 if (fec & ETHTOOL_FEC_BASER)
1975 fw_fec |= BNXT_FEC_BASE_R_ON(link_info);
1976 else if (fec & ETHTOOL_FEC_RS)
1977 fw_fec |= BNXT_FEC_RS_ON(link_info);
1978 else if (fec & ETHTOOL_FEC_LLRS)
1979 fw_fec |= BNXT_FEC_LLRS_ON;
1980 return fw_fec;
1981 }
1982
bnxt_set_fecparam(struct net_device * dev,struct ethtool_fecparam * fecparam)1983 static int bnxt_set_fecparam(struct net_device *dev,
1984 struct ethtool_fecparam *fecparam)
1985 {
1986 struct hwrm_port_phy_cfg_input *req;
1987 struct bnxt *bp = netdev_priv(dev);
1988 struct bnxt_link_info *link_info;
1989 u32 new_cfg, fec = fecparam->fec;
1990 u16 fec_cfg;
1991 int rc;
1992
1993 link_info = &bp->link_info;
1994 fec_cfg = link_info->fec_cfg;
1995 if (fec_cfg & BNXT_FEC_NONE)
1996 return -EOPNOTSUPP;
1997
1998 if (fec & ETHTOOL_FEC_OFF) {
1999 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE |
2000 BNXT_FEC_ALL_OFF(link_info);
2001 goto apply_fec;
2002 }
2003 if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) ||
2004 ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) ||
2005 ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) ||
2006 ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)))
2007 return -EINVAL;
2008
2009 if (fec & ETHTOOL_FEC_AUTO) {
2010 if (!link_info->autoneg)
2011 return -EINVAL;
2012 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE;
2013 } else {
2014 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec);
2015 }
2016
2017 apply_fec:
2018 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
2019 if (rc)
2020 return rc;
2021 req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2022 rc = hwrm_req_send(bp, req);
2023 /* update current settings */
2024 if (!rc) {
2025 mutex_lock(&bp->link_lock);
2026 bnxt_update_link(bp, false);
2027 mutex_unlock(&bp->link_lock);
2028 }
2029 return rc;
2030 }
2031
bnxt_get_pauseparam(struct net_device * dev,struct ethtool_pauseparam * epause)2032 static void bnxt_get_pauseparam(struct net_device *dev,
2033 struct ethtool_pauseparam *epause)
2034 {
2035 struct bnxt *bp = netdev_priv(dev);
2036 struct bnxt_link_info *link_info = &bp->link_info;
2037
2038 if (BNXT_VF(bp))
2039 return;
2040 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
2041 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
2042 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
2043 }
2044
bnxt_get_pause_stats(struct net_device * dev,struct ethtool_pause_stats * epstat)2045 static void bnxt_get_pause_stats(struct net_device *dev,
2046 struct ethtool_pause_stats *epstat)
2047 {
2048 struct bnxt *bp = netdev_priv(dev);
2049 u64 *rx, *tx;
2050
2051 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
2052 return;
2053
2054 rx = bp->port_stats.sw_stats;
2055 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
2056
2057 epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames);
2058 epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames);
2059 }
2060
bnxt_set_pauseparam(struct net_device * dev,struct ethtool_pauseparam * epause)2061 static int bnxt_set_pauseparam(struct net_device *dev,
2062 struct ethtool_pauseparam *epause)
2063 {
2064 int rc = 0;
2065 struct bnxt *bp = netdev_priv(dev);
2066 struct bnxt_link_info *link_info = &bp->link_info;
2067
2068 if (!BNXT_PHY_CFG_ABLE(bp))
2069 return -EOPNOTSUPP;
2070
2071 mutex_lock(&bp->link_lock);
2072 if (epause->autoneg) {
2073 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2074 rc = -EINVAL;
2075 goto pause_exit;
2076 }
2077
2078 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
2079 link_info->req_flow_ctrl = 0;
2080 } else {
2081 /* when transition from auto pause to force pause,
2082 * force a link change
2083 */
2084 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
2085 link_info->force_link_chng = true;
2086 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
2087 link_info->req_flow_ctrl = 0;
2088 }
2089 if (epause->rx_pause)
2090 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
2091
2092 if (epause->tx_pause)
2093 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
2094
2095 if (netif_running(dev))
2096 rc = bnxt_hwrm_set_pause(bp);
2097
2098 pause_exit:
2099 mutex_unlock(&bp->link_lock);
2100 return rc;
2101 }
2102
bnxt_get_link(struct net_device * dev)2103 static u32 bnxt_get_link(struct net_device *dev)
2104 {
2105 struct bnxt *bp = netdev_priv(dev);
2106
2107 /* TODO: handle MF, VF, driver close case */
2108 return bp->link_info.link_up;
2109 }
2110
bnxt_hwrm_nvm_get_dev_info(struct bnxt * bp,struct hwrm_nvm_get_dev_info_output * nvm_dev_info)2111 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
2112 struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
2113 {
2114 struct hwrm_nvm_get_dev_info_output *resp;
2115 struct hwrm_nvm_get_dev_info_input *req;
2116 int rc;
2117
2118 if (BNXT_VF(bp))
2119 return -EOPNOTSUPP;
2120
2121 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO);
2122 if (rc)
2123 return rc;
2124
2125 resp = hwrm_req_hold(bp, req);
2126 rc = hwrm_req_send(bp, req);
2127 if (!rc)
2128 memcpy(nvm_dev_info, resp, sizeof(*resp));
2129 hwrm_req_drop(bp, req);
2130 return rc;
2131 }
2132
bnxt_print_admin_err(struct bnxt * bp)2133 static void bnxt_print_admin_err(struct bnxt *bp)
2134 {
2135 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
2136 }
2137
2138 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2139 u16 ext, u16 *index, u32 *item_length,
2140 u32 *data_length);
2141
bnxt_flash_nvram(struct net_device * dev,u16 dir_type,u16 dir_ordinal,u16 dir_ext,u16 dir_attr,u32 dir_item_len,const u8 * data,size_t data_len)2142 static int bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
2143 u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
2144 u32 dir_item_len, const u8 *data,
2145 size_t data_len)
2146 {
2147 struct bnxt *bp = netdev_priv(dev);
2148 struct hwrm_nvm_write_input *req;
2149 int rc;
2150
2151 rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE);
2152 if (rc)
2153 return rc;
2154
2155 if (data_len && data) {
2156 dma_addr_t dma_handle;
2157 u8 *kmem;
2158
2159 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle);
2160 if (!kmem) {
2161 hwrm_req_drop(bp, req);
2162 return -ENOMEM;
2163 }
2164
2165 req->dir_data_length = cpu_to_le32(data_len);
2166
2167 memcpy(kmem, data, data_len);
2168 req->host_src_addr = cpu_to_le64(dma_handle);
2169 }
2170
2171 hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout);
2172 req->dir_type = cpu_to_le16(dir_type);
2173 req->dir_ordinal = cpu_to_le16(dir_ordinal);
2174 req->dir_ext = cpu_to_le16(dir_ext);
2175 req->dir_attr = cpu_to_le16(dir_attr);
2176 req->dir_item_length = cpu_to_le32(dir_item_len);
2177 rc = hwrm_req_send(bp, req);
2178
2179 if (rc == -EACCES)
2180 bnxt_print_admin_err(bp);
2181 return rc;
2182 }
2183
bnxt_hwrm_firmware_reset(struct net_device * dev,u8 proc_type,u8 self_reset,u8 flags)2184 static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
2185 u8 self_reset, u8 flags)
2186 {
2187 struct bnxt *bp = netdev_priv(dev);
2188 struct hwrm_fw_reset_input *req;
2189 int rc;
2190
2191 rc = hwrm_req_init(bp, req, HWRM_FW_RESET);
2192 if (rc)
2193 return rc;
2194
2195 req->embedded_proc_type = proc_type;
2196 req->selfrst_status = self_reset;
2197 req->flags = flags;
2198
2199 if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
2200 rc = hwrm_req_send_silent(bp, req);
2201 } else {
2202 rc = hwrm_req_send(bp, req);
2203 if (rc == -EACCES)
2204 bnxt_print_admin_err(bp);
2205 }
2206 return rc;
2207 }
2208
bnxt_firmware_reset(struct net_device * dev,enum bnxt_nvm_directory_type dir_type)2209 static int bnxt_firmware_reset(struct net_device *dev,
2210 enum bnxt_nvm_directory_type dir_type)
2211 {
2212 u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
2213 u8 proc_type, flags = 0;
2214
2215 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
2216 /* (e.g. when firmware isn't already running) */
2217 switch (dir_type) {
2218 case BNX_DIR_TYPE_CHIMP_PATCH:
2219 case BNX_DIR_TYPE_BOOTCODE:
2220 case BNX_DIR_TYPE_BOOTCODE_2:
2221 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
2222 /* Self-reset ChiMP upon next PCIe reset: */
2223 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2224 break;
2225 case BNX_DIR_TYPE_APE_FW:
2226 case BNX_DIR_TYPE_APE_PATCH:
2227 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
2228 /* Self-reset APE upon next PCIe reset: */
2229 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2230 break;
2231 case BNX_DIR_TYPE_KONG_FW:
2232 case BNX_DIR_TYPE_KONG_PATCH:
2233 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
2234 break;
2235 case BNX_DIR_TYPE_BONO_FW:
2236 case BNX_DIR_TYPE_BONO_PATCH:
2237 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
2238 break;
2239 default:
2240 return -EINVAL;
2241 }
2242
2243 return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
2244 }
2245
bnxt_firmware_reset_chip(struct net_device * dev)2246 static int bnxt_firmware_reset_chip(struct net_device *dev)
2247 {
2248 struct bnxt *bp = netdev_priv(dev);
2249 u8 flags = 0;
2250
2251 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
2252 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
2253
2254 return bnxt_hwrm_firmware_reset(dev,
2255 FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
2256 FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
2257 flags);
2258 }
2259
bnxt_firmware_reset_ap(struct net_device * dev)2260 static int bnxt_firmware_reset_ap(struct net_device *dev)
2261 {
2262 return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
2263 FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
2264 0);
2265 }
2266
bnxt_flash_firmware(struct net_device * dev,u16 dir_type,const u8 * fw_data,size_t fw_size)2267 static int bnxt_flash_firmware(struct net_device *dev,
2268 u16 dir_type,
2269 const u8 *fw_data,
2270 size_t fw_size)
2271 {
2272 int rc = 0;
2273 u16 code_type;
2274 u32 stored_crc;
2275 u32 calculated_crc;
2276 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
2277
2278 switch (dir_type) {
2279 case BNX_DIR_TYPE_BOOTCODE:
2280 case BNX_DIR_TYPE_BOOTCODE_2:
2281 code_type = CODE_BOOT;
2282 break;
2283 case BNX_DIR_TYPE_CHIMP_PATCH:
2284 code_type = CODE_CHIMP_PATCH;
2285 break;
2286 case BNX_DIR_TYPE_APE_FW:
2287 code_type = CODE_MCTP_PASSTHRU;
2288 break;
2289 case BNX_DIR_TYPE_APE_PATCH:
2290 code_type = CODE_APE_PATCH;
2291 break;
2292 case BNX_DIR_TYPE_KONG_FW:
2293 code_type = CODE_KONG_FW;
2294 break;
2295 case BNX_DIR_TYPE_KONG_PATCH:
2296 code_type = CODE_KONG_PATCH;
2297 break;
2298 case BNX_DIR_TYPE_BONO_FW:
2299 code_type = CODE_BONO_FW;
2300 break;
2301 case BNX_DIR_TYPE_BONO_PATCH:
2302 code_type = CODE_BONO_PATCH;
2303 break;
2304 default:
2305 netdev_err(dev, "Unsupported directory entry type: %u\n",
2306 dir_type);
2307 return -EINVAL;
2308 }
2309 if (fw_size < sizeof(struct bnxt_fw_header)) {
2310 netdev_err(dev, "Invalid firmware file size: %u\n",
2311 (unsigned int)fw_size);
2312 return -EINVAL;
2313 }
2314 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
2315 netdev_err(dev, "Invalid firmware signature: %08X\n",
2316 le32_to_cpu(header->signature));
2317 return -EINVAL;
2318 }
2319 if (header->code_type != code_type) {
2320 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
2321 code_type, header->code_type);
2322 return -EINVAL;
2323 }
2324 if (header->device != DEVICE_CUMULUS_FAMILY) {
2325 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
2326 DEVICE_CUMULUS_FAMILY, header->device);
2327 return -EINVAL;
2328 }
2329 /* Confirm the CRC32 checksum of the file: */
2330 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2331 sizeof(stored_crc)));
2332 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2333 if (calculated_crc != stored_crc) {
2334 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
2335 (unsigned long)stored_crc,
2336 (unsigned long)calculated_crc);
2337 return -EINVAL;
2338 }
2339 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2340 0, 0, 0, fw_data, fw_size);
2341 if (rc == 0) /* Firmware update successful */
2342 rc = bnxt_firmware_reset(dev, dir_type);
2343
2344 return rc;
2345 }
2346
bnxt_flash_microcode(struct net_device * dev,u16 dir_type,const u8 * fw_data,size_t fw_size)2347 static int bnxt_flash_microcode(struct net_device *dev,
2348 u16 dir_type,
2349 const u8 *fw_data,
2350 size_t fw_size)
2351 {
2352 struct bnxt_ucode_trailer *trailer;
2353 u32 calculated_crc;
2354 u32 stored_crc;
2355 int rc = 0;
2356
2357 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
2358 netdev_err(dev, "Invalid microcode file size: %u\n",
2359 (unsigned int)fw_size);
2360 return -EINVAL;
2361 }
2362 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
2363 sizeof(*trailer)));
2364 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
2365 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
2366 le32_to_cpu(trailer->sig));
2367 return -EINVAL;
2368 }
2369 if (le16_to_cpu(trailer->dir_type) != dir_type) {
2370 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
2371 dir_type, le16_to_cpu(trailer->dir_type));
2372 return -EINVAL;
2373 }
2374 if (le16_to_cpu(trailer->trailer_length) <
2375 sizeof(struct bnxt_ucode_trailer)) {
2376 netdev_err(dev, "Invalid microcode trailer length: %d\n",
2377 le16_to_cpu(trailer->trailer_length));
2378 return -EINVAL;
2379 }
2380
2381 /* Confirm the CRC32 checksum of the file: */
2382 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2383 sizeof(stored_crc)));
2384 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2385 if (calculated_crc != stored_crc) {
2386 netdev_err(dev,
2387 "CRC32 (%08lX) does not match calculated: %08lX\n",
2388 (unsigned long)stored_crc,
2389 (unsigned long)calculated_crc);
2390 return -EINVAL;
2391 }
2392 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2393 0, 0, 0, fw_data, fw_size);
2394
2395 return rc;
2396 }
2397
bnxt_dir_type_is_ape_bin_format(u16 dir_type)2398 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
2399 {
2400 switch (dir_type) {
2401 case BNX_DIR_TYPE_CHIMP_PATCH:
2402 case BNX_DIR_TYPE_BOOTCODE:
2403 case BNX_DIR_TYPE_BOOTCODE_2:
2404 case BNX_DIR_TYPE_APE_FW:
2405 case BNX_DIR_TYPE_APE_PATCH:
2406 case BNX_DIR_TYPE_KONG_FW:
2407 case BNX_DIR_TYPE_KONG_PATCH:
2408 case BNX_DIR_TYPE_BONO_FW:
2409 case BNX_DIR_TYPE_BONO_PATCH:
2410 return true;
2411 }
2412
2413 return false;
2414 }
2415
bnxt_dir_type_is_other_exec_format(u16 dir_type)2416 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
2417 {
2418 switch (dir_type) {
2419 case BNX_DIR_TYPE_AVS:
2420 case BNX_DIR_TYPE_EXP_ROM_MBA:
2421 case BNX_DIR_TYPE_PCIE:
2422 case BNX_DIR_TYPE_TSCF_UCODE:
2423 case BNX_DIR_TYPE_EXT_PHY:
2424 case BNX_DIR_TYPE_CCM:
2425 case BNX_DIR_TYPE_ISCSI_BOOT:
2426 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2427 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2428 return true;
2429 }
2430
2431 return false;
2432 }
2433
bnxt_dir_type_is_executable(u16 dir_type)2434 static bool bnxt_dir_type_is_executable(u16 dir_type)
2435 {
2436 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2437 bnxt_dir_type_is_other_exec_format(dir_type);
2438 }
2439
bnxt_flash_firmware_from_file(struct net_device * dev,u16 dir_type,const char * filename)2440 static int bnxt_flash_firmware_from_file(struct net_device *dev,
2441 u16 dir_type,
2442 const char *filename)
2443 {
2444 const struct firmware *fw;
2445 int rc;
2446
2447 rc = request_firmware(&fw, filename, &dev->dev);
2448 if (rc != 0) {
2449 netdev_err(dev, "Error %d requesting firmware file: %s\n",
2450 rc, filename);
2451 return rc;
2452 }
2453 if (bnxt_dir_type_is_ape_bin_format(dir_type))
2454 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
2455 else if (bnxt_dir_type_is_other_exec_format(dir_type))
2456 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
2457 else
2458 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2459 0, 0, 0, fw->data, fw->size);
2460 release_firmware(fw);
2461 return rc;
2462 }
2463
2464 #define BNXT_PKG_DMA_SIZE 0x40000
2465 #define BNXT_NVM_MORE_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE))
2466 #define BNXT_NVM_LAST_FLAG (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST))
2467
bnxt_flash_package_from_fw_obj(struct net_device * dev,const struct firmware * fw,u32 install_type)2468 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw,
2469 u32 install_type)
2470 {
2471 struct hwrm_nvm_install_update_input *install;
2472 struct hwrm_nvm_install_update_output *resp;
2473 struct hwrm_nvm_modify_input *modify;
2474 struct bnxt *bp = netdev_priv(dev);
2475 bool defrag_attempted = false;
2476 dma_addr_t dma_handle;
2477 u8 *kmem = NULL;
2478 u32 modify_len;
2479 u32 item_len;
2480 u16 index;
2481 int rc;
2482
2483 bnxt_hwrm_fw_set_time(bp);
2484
2485 rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY);
2486 if (rc)
2487 return rc;
2488
2489 /* Try allocating a large DMA buffer first. Older fw will
2490 * cause excessive NVRAM erases when using small blocks.
2491 */
2492 modify_len = roundup_pow_of_two(fw->size);
2493 modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE);
2494 while (1) {
2495 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle);
2496 if (!kmem && modify_len > PAGE_SIZE)
2497 modify_len /= 2;
2498 else
2499 break;
2500 }
2501 if (!kmem) {
2502 hwrm_req_drop(bp, modify);
2503 return -ENOMEM;
2504 }
2505
2506 rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE);
2507 if (rc) {
2508 hwrm_req_drop(bp, modify);
2509 return rc;
2510 }
2511
2512 hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout);
2513 hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout);
2514
2515 hwrm_req_hold(bp, modify);
2516 modify->host_src_addr = cpu_to_le64(dma_handle);
2517
2518 resp = hwrm_req_hold(bp, install);
2519 if ((install_type & 0xffff) == 0)
2520 install_type >>= 16;
2521 install->install_type = cpu_to_le32(install_type);
2522
2523 do {
2524 u32 copied = 0, len = modify_len;
2525
2526 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
2527 BNX_DIR_ORDINAL_FIRST,
2528 BNX_DIR_EXT_NONE,
2529 &index, &item_len, NULL);
2530 if (rc) {
2531 netdev_err(dev, "PKG update area not created in nvram\n");
2532 break;
2533 }
2534 if (fw->size > item_len) {
2535 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n",
2536 (unsigned long)fw->size);
2537 rc = -EFBIG;
2538 break;
2539 }
2540
2541 modify->dir_idx = cpu_to_le16(index);
2542
2543 if (fw->size > modify_len)
2544 modify->flags = BNXT_NVM_MORE_FLAG;
2545 while (copied < fw->size) {
2546 u32 balance = fw->size - copied;
2547
2548 if (balance <= modify_len) {
2549 len = balance;
2550 if (copied)
2551 modify->flags |= BNXT_NVM_LAST_FLAG;
2552 }
2553 memcpy(kmem, fw->data + copied, len);
2554 modify->len = cpu_to_le32(len);
2555 modify->offset = cpu_to_le32(copied);
2556 rc = hwrm_req_send(bp, modify);
2557 if (rc)
2558 goto pkg_abort;
2559 copied += len;
2560 }
2561
2562 rc = hwrm_req_send_silent(bp, install);
2563
2564 if (defrag_attempted) {
2565 /* We have tried to defragment already in the previous
2566 * iteration. Return with the result for INSTALL_UPDATE
2567 */
2568 break;
2569 }
2570
2571 if (rc && ((struct hwrm_err_output *)resp)->cmd_err ==
2572 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2573 install->flags =
2574 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2575
2576 rc = hwrm_req_send_silent(bp, install);
2577
2578 if (rc && ((struct hwrm_err_output *)resp)->cmd_err ==
2579 NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) {
2580 /* FW has cleared NVM area, driver will create
2581 * UPDATE directory and try the flash again
2582 */
2583 defrag_attempted = true;
2584 install->flags = 0;
2585 rc = bnxt_flash_nvram(bp->dev,
2586 BNX_DIR_TYPE_UPDATE,
2587 BNX_DIR_ORDINAL_FIRST,
2588 0, 0, item_len, NULL, 0);
2589 } else if (rc) {
2590 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc);
2591 }
2592 } else if (rc) {
2593 netdev_err(dev, "HWRM_NVM_INSTALL_UPDATE failure rc :%x\n", rc);
2594 }
2595 } while (defrag_attempted && !rc);
2596
2597 pkg_abort:
2598 hwrm_req_drop(bp, modify);
2599 hwrm_req_drop(bp, install);
2600
2601 if (resp->result) {
2602 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2603 (s8)resp->result, (int)resp->problem_item);
2604 rc = -ENOPKG;
2605 }
2606 if (rc == -EACCES)
2607 bnxt_print_admin_err(bp);
2608 return rc;
2609 }
2610
bnxt_flash_package_from_file(struct net_device * dev,const char * filename,u32 install_type)2611 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
2612 u32 install_type)
2613 {
2614 const struct firmware *fw;
2615 int rc;
2616
2617 rc = request_firmware(&fw, filename, &dev->dev);
2618 if (rc != 0) {
2619 netdev_err(dev, "PKG error %d requesting file: %s\n",
2620 rc, filename);
2621 return rc;
2622 }
2623
2624 rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type);
2625
2626 release_firmware(fw);
2627
2628 return rc;
2629 }
2630
bnxt_flash_device(struct net_device * dev,struct ethtool_flash * flash)2631 static int bnxt_flash_device(struct net_device *dev,
2632 struct ethtool_flash *flash)
2633 {
2634 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2635 netdev_err(dev, "flashdev not supported from a virtual function\n");
2636 return -EINVAL;
2637 }
2638
2639 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2640 flash->region > 0xffff)
2641 return bnxt_flash_package_from_file(dev, flash->data,
2642 flash->region);
2643
2644 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2645 }
2646
nvm_get_dir_info(struct net_device * dev,u32 * entries,u32 * length)2647 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2648 {
2649 struct hwrm_nvm_get_dir_info_output *output;
2650 struct hwrm_nvm_get_dir_info_input *req;
2651 struct bnxt *bp = netdev_priv(dev);
2652 int rc;
2653
2654 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO);
2655 if (rc)
2656 return rc;
2657
2658 output = hwrm_req_hold(bp, req);
2659 rc = hwrm_req_send(bp, req);
2660 if (!rc) {
2661 *entries = le32_to_cpu(output->entries);
2662 *length = le32_to_cpu(output->entry_length);
2663 }
2664 hwrm_req_drop(bp, req);
2665 return rc;
2666 }
2667
bnxt_get_eeprom_len(struct net_device * dev)2668 static int bnxt_get_eeprom_len(struct net_device *dev)
2669 {
2670 struct bnxt *bp = netdev_priv(dev);
2671
2672 if (BNXT_VF(bp))
2673 return 0;
2674
2675 /* The -1 return value allows the entire 32-bit range of offsets to be
2676 * passed via the ethtool command-line utility.
2677 */
2678 return -1;
2679 }
2680
bnxt_get_nvram_directory(struct net_device * dev,u32 len,u8 * data)2681 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2682 {
2683 struct bnxt *bp = netdev_priv(dev);
2684 int rc;
2685 u32 dir_entries;
2686 u32 entry_length;
2687 u8 *buf;
2688 size_t buflen;
2689 dma_addr_t dma_handle;
2690 struct hwrm_nvm_get_dir_entries_input *req;
2691
2692 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2693 if (rc != 0)
2694 return rc;
2695
2696 if (!dir_entries || !entry_length)
2697 return -EIO;
2698
2699 /* Insert 2 bytes of directory info (count and size of entries) */
2700 if (len < 2)
2701 return -EINVAL;
2702
2703 *data++ = dir_entries;
2704 *data++ = entry_length;
2705 len -= 2;
2706 memset(data, 0xff, len);
2707
2708 rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES);
2709 if (rc)
2710 return rc;
2711
2712 buflen = mul_u32_u32(dir_entries, entry_length);
2713 buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle);
2714 if (!buf) {
2715 hwrm_req_drop(bp, req);
2716 return -ENOMEM;
2717 }
2718 req->host_dest_addr = cpu_to_le64(dma_handle);
2719
2720 hwrm_req_hold(bp, req); /* hold the slice */
2721 rc = hwrm_req_send(bp, req);
2722 if (rc == 0)
2723 memcpy(data, buf, len > buflen ? buflen : len);
2724 hwrm_req_drop(bp, req);
2725 return rc;
2726 }
2727
bnxt_get_nvram_item(struct net_device * dev,u32 index,u32 offset,u32 length,u8 * data)2728 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2729 u32 length, u8 *data)
2730 {
2731 struct bnxt *bp = netdev_priv(dev);
2732 int rc;
2733 u8 *buf;
2734 dma_addr_t dma_handle;
2735 struct hwrm_nvm_read_input *req;
2736
2737 if (!length)
2738 return -EINVAL;
2739
2740 rc = hwrm_req_init(bp, req, HWRM_NVM_READ);
2741 if (rc)
2742 return rc;
2743
2744 buf = hwrm_req_dma_slice(bp, req, length, &dma_handle);
2745 if (!buf) {
2746 hwrm_req_drop(bp, req);
2747 return -ENOMEM;
2748 }
2749
2750 req->host_dest_addr = cpu_to_le64(dma_handle);
2751 req->dir_idx = cpu_to_le16(index);
2752 req->offset = cpu_to_le32(offset);
2753 req->len = cpu_to_le32(length);
2754
2755 hwrm_req_hold(bp, req); /* hold the slice */
2756 rc = hwrm_req_send(bp, req);
2757 if (rc == 0)
2758 memcpy(data, buf, length);
2759 hwrm_req_drop(bp, req);
2760 return rc;
2761 }
2762
bnxt_find_nvram_item(struct net_device * dev,u16 type,u16 ordinal,u16 ext,u16 * index,u32 * item_length,u32 * data_length)2763 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2764 u16 ext, u16 *index, u32 *item_length,
2765 u32 *data_length)
2766 {
2767 struct hwrm_nvm_find_dir_entry_output *output;
2768 struct hwrm_nvm_find_dir_entry_input *req;
2769 struct bnxt *bp = netdev_priv(dev);
2770 int rc;
2771
2772 rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY);
2773 if (rc)
2774 return rc;
2775
2776 req->enables = 0;
2777 req->dir_idx = 0;
2778 req->dir_type = cpu_to_le16(type);
2779 req->dir_ordinal = cpu_to_le16(ordinal);
2780 req->dir_ext = cpu_to_le16(ext);
2781 req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2782 output = hwrm_req_hold(bp, req);
2783 rc = hwrm_req_send_silent(bp, req);
2784 if (rc == 0) {
2785 if (index)
2786 *index = le16_to_cpu(output->dir_idx);
2787 if (item_length)
2788 *item_length = le32_to_cpu(output->dir_item_length);
2789 if (data_length)
2790 *data_length = le32_to_cpu(output->dir_data_length);
2791 }
2792 hwrm_req_drop(bp, req);
2793 return rc;
2794 }
2795
bnxt_parse_pkglog(int desired_field,u8 * data,size_t datalen)2796 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2797 {
2798 char *retval = NULL;
2799 char *p;
2800 char *value;
2801 int field = 0;
2802
2803 if (datalen < 1)
2804 return NULL;
2805 /* null-terminate the log data (removing last '\n'): */
2806 data[datalen - 1] = 0;
2807 for (p = data; *p != 0; p++) {
2808 field = 0;
2809 retval = NULL;
2810 while (*p != 0 && *p != '\n') {
2811 value = p;
2812 while (*p != 0 && *p != '\t' && *p != '\n')
2813 p++;
2814 if (field == desired_field)
2815 retval = value;
2816 if (*p != '\t')
2817 break;
2818 *p = 0;
2819 field++;
2820 p++;
2821 }
2822 if (*p == 0)
2823 break;
2824 *p = 0;
2825 }
2826 return retval;
2827 }
2828
bnxt_get_pkgver(struct net_device * dev)2829 static void bnxt_get_pkgver(struct net_device *dev)
2830 {
2831 struct bnxt *bp = netdev_priv(dev);
2832 u16 index = 0;
2833 char *pkgver;
2834 u32 pkglen;
2835 u8 *pkgbuf;
2836 int len;
2837
2838 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2839 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2840 &index, NULL, &pkglen) != 0)
2841 return;
2842
2843 pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2844 if (!pkgbuf) {
2845 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2846 pkglen);
2847 return;
2848 }
2849
2850 if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2851 goto err;
2852
2853 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2854 pkglen);
2855 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2856 len = strlen(bp->fw_ver_str);
2857 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2858 "/pkg %s", pkgver);
2859 }
2860 err:
2861 kfree(pkgbuf);
2862 }
2863
bnxt_get_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)2864 static int bnxt_get_eeprom(struct net_device *dev,
2865 struct ethtool_eeprom *eeprom,
2866 u8 *data)
2867 {
2868 u32 index;
2869 u32 offset;
2870
2871 if (eeprom->offset == 0) /* special offset value to get directory */
2872 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2873
2874 index = eeprom->offset >> 24;
2875 offset = eeprom->offset & 0xffffff;
2876
2877 if (index == 0) {
2878 netdev_err(dev, "unsupported index value: %d\n", index);
2879 return -EINVAL;
2880 }
2881
2882 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2883 }
2884
bnxt_erase_nvram_directory(struct net_device * dev,u8 index)2885 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2886 {
2887 struct hwrm_nvm_erase_dir_entry_input *req;
2888 struct bnxt *bp = netdev_priv(dev);
2889 int rc;
2890
2891 rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY);
2892 if (rc)
2893 return rc;
2894
2895 req->dir_idx = cpu_to_le16(index);
2896 return hwrm_req_send(bp, req);
2897 }
2898
bnxt_set_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)2899 static int bnxt_set_eeprom(struct net_device *dev,
2900 struct ethtool_eeprom *eeprom,
2901 u8 *data)
2902 {
2903 struct bnxt *bp = netdev_priv(dev);
2904 u8 index, dir_op;
2905 u16 type, ext, ordinal, attr;
2906
2907 if (!BNXT_PF(bp)) {
2908 netdev_err(dev, "NVM write not supported from a virtual function\n");
2909 return -EINVAL;
2910 }
2911
2912 type = eeprom->magic >> 16;
2913
2914 if (type == 0xffff) { /* special value for directory operations */
2915 index = eeprom->magic & 0xff;
2916 dir_op = eeprom->magic >> 8;
2917 if (index == 0)
2918 return -EINVAL;
2919 switch (dir_op) {
2920 case 0x0e: /* erase */
2921 if (eeprom->offset != ~eeprom->magic)
2922 return -EINVAL;
2923 return bnxt_erase_nvram_directory(dev, index - 1);
2924 default:
2925 return -EINVAL;
2926 }
2927 }
2928
2929 /* Create or re-write an NVM item: */
2930 if (bnxt_dir_type_is_executable(type))
2931 return -EOPNOTSUPP;
2932 ext = eeprom->magic & 0xffff;
2933 ordinal = eeprom->offset >> 16;
2934 attr = eeprom->offset & 0xffff;
2935
2936 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data,
2937 eeprom->len);
2938 }
2939
bnxt_set_eee(struct net_device * dev,struct ethtool_eee * edata)2940 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2941 {
2942 struct bnxt *bp = netdev_priv(dev);
2943 struct ethtool_eee *eee = &bp->eee;
2944 struct bnxt_link_info *link_info = &bp->link_info;
2945 u32 advertising;
2946 int rc = 0;
2947
2948 if (!BNXT_PHY_CFG_ABLE(bp))
2949 return -EOPNOTSUPP;
2950
2951 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
2952 return -EOPNOTSUPP;
2953
2954 mutex_lock(&bp->link_lock);
2955 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2956 if (!edata->eee_enabled)
2957 goto eee_ok;
2958
2959 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2960 netdev_warn(dev, "EEE requires autoneg\n");
2961 rc = -EINVAL;
2962 goto eee_exit;
2963 }
2964 if (edata->tx_lpi_enabled) {
2965 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2966 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2967 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2968 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2969 rc = -EINVAL;
2970 goto eee_exit;
2971 } else if (!bp->lpi_tmr_hi) {
2972 edata->tx_lpi_timer = eee->tx_lpi_timer;
2973 }
2974 }
2975 if (!edata->advertised) {
2976 edata->advertised = advertising & eee->supported;
2977 } else if (edata->advertised & ~advertising) {
2978 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2979 edata->advertised, advertising);
2980 rc = -EINVAL;
2981 goto eee_exit;
2982 }
2983
2984 eee->advertised = edata->advertised;
2985 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2986 eee->tx_lpi_timer = edata->tx_lpi_timer;
2987 eee_ok:
2988 eee->eee_enabled = edata->eee_enabled;
2989
2990 if (netif_running(dev))
2991 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2992
2993 eee_exit:
2994 mutex_unlock(&bp->link_lock);
2995 return rc;
2996 }
2997
bnxt_get_eee(struct net_device * dev,struct ethtool_eee * edata)2998 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2999 {
3000 struct bnxt *bp = netdev_priv(dev);
3001
3002 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
3003 return -EOPNOTSUPP;
3004
3005 *edata = bp->eee;
3006 if (!bp->eee.eee_enabled) {
3007 /* Preserve tx_lpi_timer so that the last value will be used
3008 * by default when it is re-enabled.
3009 */
3010 edata->advertised = 0;
3011 edata->tx_lpi_enabled = 0;
3012 }
3013
3014 if (!bp->eee.eee_active)
3015 edata->lp_advertised = 0;
3016
3017 return 0;
3018 }
3019
bnxt_read_sfp_module_eeprom_info(struct bnxt * bp,u16 i2c_addr,u16 page_number,u16 start_addr,u16 data_length,u8 * buf)3020 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
3021 u16 page_number, u16 start_addr,
3022 u16 data_length, u8 *buf)
3023 {
3024 struct hwrm_port_phy_i2c_read_output *output;
3025 struct hwrm_port_phy_i2c_read_input *req;
3026 int rc, byte_offset = 0;
3027
3028 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ);
3029 if (rc)
3030 return rc;
3031
3032 output = hwrm_req_hold(bp, req);
3033 req->i2c_slave_addr = i2c_addr;
3034 req->page_number = cpu_to_le16(page_number);
3035 req->port_id = cpu_to_le16(bp->pf.port_id);
3036 do {
3037 u16 xfer_size;
3038
3039 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
3040 data_length -= xfer_size;
3041 req->page_offset = cpu_to_le16(start_addr + byte_offset);
3042 req->data_length = xfer_size;
3043 req->enables = cpu_to_le32(start_addr + byte_offset ?
3044 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
3045 rc = hwrm_req_send(bp, req);
3046 if (!rc)
3047 memcpy(buf + byte_offset, output->data, xfer_size);
3048 byte_offset += xfer_size;
3049 } while (!rc && data_length > 0);
3050 hwrm_req_drop(bp, req);
3051
3052 return rc;
3053 }
3054
bnxt_get_module_info(struct net_device * dev,struct ethtool_modinfo * modinfo)3055 static int bnxt_get_module_info(struct net_device *dev,
3056 struct ethtool_modinfo *modinfo)
3057 {
3058 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
3059 struct bnxt *bp = netdev_priv(dev);
3060 int rc;
3061
3062 /* No point in going further if phy status indicates
3063 * module is not inserted or if it is powered down or
3064 * if it is of type 10GBase-T
3065 */
3066 if (bp->link_info.module_status >
3067 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
3068 return -EOPNOTSUPP;
3069
3070 /* This feature is not supported in older firmware versions */
3071 if (bp->hwrm_spec_code < 0x10202)
3072 return -EOPNOTSUPP;
3073
3074 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
3075 SFF_DIAG_SUPPORT_OFFSET + 1,
3076 data);
3077 if (!rc) {
3078 u8 module_id = data[0];
3079 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
3080
3081 switch (module_id) {
3082 case SFF_MODULE_ID_SFP:
3083 modinfo->type = ETH_MODULE_SFF_8472;
3084 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3085 if (!diag_supported)
3086 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
3087 break;
3088 case SFF_MODULE_ID_QSFP:
3089 case SFF_MODULE_ID_QSFP_PLUS:
3090 modinfo->type = ETH_MODULE_SFF_8436;
3091 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
3092 break;
3093 case SFF_MODULE_ID_QSFP28:
3094 modinfo->type = ETH_MODULE_SFF_8636;
3095 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
3096 break;
3097 default:
3098 rc = -EOPNOTSUPP;
3099 break;
3100 }
3101 }
3102 return rc;
3103 }
3104
bnxt_get_module_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)3105 static int bnxt_get_module_eeprom(struct net_device *dev,
3106 struct ethtool_eeprom *eeprom,
3107 u8 *data)
3108 {
3109 struct bnxt *bp = netdev_priv(dev);
3110 u16 start = eeprom->offset, length = eeprom->len;
3111 int rc = 0;
3112
3113 memset(data, 0, eeprom->len);
3114
3115 /* Read A0 portion of the EEPROM */
3116 if (start < ETH_MODULE_SFF_8436_LEN) {
3117 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
3118 length = ETH_MODULE_SFF_8436_LEN - start;
3119 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
3120 start, length, data);
3121 if (rc)
3122 return rc;
3123 start += length;
3124 data += length;
3125 length = eeprom->len - length;
3126 }
3127
3128 /* Read A2 portion of the EEPROM */
3129 if (length) {
3130 start -= ETH_MODULE_SFF_8436_LEN;
3131 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0,
3132 start, length, data);
3133 }
3134 return rc;
3135 }
3136
bnxt_nway_reset(struct net_device * dev)3137 static int bnxt_nway_reset(struct net_device *dev)
3138 {
3139 int rc = 0;
3140
3141 struct bnxt *bp = netdev_priv(dev);
3142 struct bnxt_link_info *link_info = &bp->link_info;
3143
3144 if (!BNXT_PHY_CFG_ABLE(bp))
3145 return -EOPNOTSUPP;
3146
3147 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
3148 return -EINVAL;
3149
3150 if (netif_running(dev))
3151 rc = bnxt_hwrm_set_link_setting(bp, true, false);
3152
3153 return rc;
3154 }
3155
bnxt_set_phys_id(struct net_device * dev,enum ethtool_phys_id_state state)3156 static int bnxt_set_phys_id(struct net_device *dev,
3157 enum ethtool_phys_id_state state)
3158 {
3159 struct hwrm_port_led_cfg_input *req;
3160 struct bnxt *bp = netdev_priv(dev);
3161 struct bnxt_pf_info *pf = &bp->pf;
3162 struct bnxt_led_cfg *led_cfg;
3163 u8 led_state;
3164 __le16 duration;
3165 int rc, i;
3166
3167 if (!bp->num_leds || BNXT_VF(bp))
3168 return -EOPNOTSUPP;
3169
3170 if (state == ETHTOOL_ID_ACTIVE) {
3171 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
3172 duration = cpu_to_le16(500);
3173 } else if (state == ETHTOOL_ID_INACTIVE) {
3174 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
3175 duration = cpu_to_le16(0);
3176 } else {
3177 return -EINVAL;
3178 }
3179 rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG);
3180 if (rc)
3181 return rc;
3182
3183 req->port_id = cpu_to_le16(pf->port_id);
3184 req->num_leds = bp->num_leds;
3185 led_cfg = (struct bnxt_led_cfg *)&req->led0_id;
3186 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
3187 req->enables |= BNXT_LED_DFLT_ENABLES(i);
3188 led_cfg->led_id = bp->leds[i].led_id;
3189 led_cfg->led_state = led_state;
3190 led_cfg->led_blink_on = duration;
3191 led_cfg->led_blink_off = duration;
3192 led_cfg->led_group_id = bp->leds[i].led_group_id;
3193 }
3194 return hwrm_req_send(bp, req);
3195 }
3196
bnxt_hwrm_selftest_irq(struct bnxt * bp,u16 cmpl_ring)3197 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
3198 {
3199 struct hwrm_selftest_irq_input *req;
3200 int rc;
3201
3202 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ);
3203 if (rc)
3204 return rc;
3205
3206 req->cmpl_ring = cpu_to_le16(cmpl_ring);
3207 return hwrm_req_send(bp, req);
3208 }
3209
bnxt_test_irq(struct bnxt * bp)3210 static int bnxt_test_irq(struct bnxt *bp)
3211 {
3212 int i;
3213
3214 for (i = 0; i < bp->cp_nr_rings; i++) {
3215 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
3216 int rc;
3217
3218 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
3219 if (rc)
3220 return rc;
3221 }
3222 return 0;
3223 }
3224
bnxt_hwrm_mac_loopback(struct bnxt * bp,bool enable)3225 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
3226 {
3227 struct hwrm_port_mac_cfg_input *req;
3228 int rc;
3229
3230 rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
3231 if (rc)
3232 return rc;
3233
3234 req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
3235 if (enable)
3236 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
3237 else
3238 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
3239 return hwrm_req_send(bp, req);
3240 }
3241
bnxt_query_force_speeds(struct bnxt * bp,u16 * force_speeds)3242 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
3243 {
3244 struct hwrm_port_phy_qcaps_output *resp;
3245 struct hwrm_port_phy_qcaps_input *req;
3246 int rc;
3247
3248 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS);
3249 if (rc)
3250 return rc;
3251
3252 resp = hwrm_req_hold(bp, req);
3253 rc = hwrm_req_send(bp, req);
3254 if (!rc)
3255 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
3256
3257 hwrm_req_drop(bp, req);
3258 return rc;
3259 }
3260
bnxt_disable_an_for_lpbk(struct bnxt * bp,struct hwrm_port_phy_cfg_input * req)3261 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
3262 struct hwrm_port_phy_cfg_input *req)
3263 {
3264 struct bnxt_link_info *link_info = &bp->link_info;
3265 u16 fw_advertising;
3266 u16 fw_speed;
3267 int rc;
3268
3269 if (!link_info->autoneg ||
3270 (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK))
3271 return 0;
3272
3273 rc = bnxt_query_force_speeds(bp, &fw_advertising);
3274 if (rc)
3275 return rc;
3276
3277 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
3278 if (bp->link_info.link_up)
3279 fw_speed = bp->link_info.link_speed;
3280 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
3281 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
3282 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
3283 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
3284 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
3285 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
3286 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
3287 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
3288
3289 req->force_link_speed = cpu_to_le16(fw_speed);
3290 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
3291 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
3292 rc = hwrm_req_send(bp, req);
3293 req->flags = 0;
3294 req->force_link_speed = cpu_to_le16(0);
3295 return rc;
3296 }
3297
bnxt_hwrm_phy_loopback(struct bnxt * bp,bool enable,bool ext)3298 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
3299 {
3300 struct hwrm_port_phy_cfg_input *req;
3301 int rc;
3302
3303 rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
3304 if (rc)
3305 return rc;
3306
3307 /* prevent bnxt_disable_an_for_lpbk() from consuming the request */
3308 hwrm_req_hold(bp, req);
3309
3310 if (enable) {
3311 bnxt_disable_an_for_lpbk(bp, req);
3312 if (ext)
3313 req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
3314 else
3315 req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
3316 } else {
3317 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
3318 }
3319 req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
3320 rc = hwrm_req_send(bp, req);
3321 hwrm_req_drop(bp, req);
3322 return rc;
3323 }
3324
bnxt_rx_loopback(struct bnxt * bp,struct bnxt_cp_ring_info * cpr,u32 raw_cons,int pkt_size)3325 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
3326 u32 raw_cons, int pkt_size)
3327 {
3328 struct bnxt_napi *bnapi = cpr->bnapi;
3329 struct bnxt_rx_ring_info *rxr;
3330 struct bnxt_sw_rx_bd *rx_buf;
3331 struct rx_cmp *rxcmp;
3332 u16 cp_cons, cons;
3333 u8 *data;
3334 u32 len;
3335 int i;
3336
3337 rxr = bnapi->rx_ring;
3338 cp_cons = RING_CMP(raw_cons);
3339 rxcmp = (struct rx_cmp *)
3340 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
3341 cons = rxcmp->rx_cmp_opaque;
3342 rx_buf = &rxr->rx_buf_ring[cons];
3343 data = rx_buf->data_ptr;
3344 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
3345 if (len != pkt_size)
3346 return -EIO;
3347 i = ETH_ALEN;
3348 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
3349 return -EIO;
3350 i += ETH_ALEN;
3351 for ( ; i < pkt_size; i++) {
3352 if (data[i] != (u8)(i & 0xff))
3353 return -EIO;
3354 }
3355 return 0;
3356 }
3357
bnxt_poll_loopback(struct bnxt * bp,struct bnxt_cp_ring_info * cpr,int pkt_size)3358 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
3359 int pkt_size)
3360 {
3361 struct tx_cmp *txcmp;
3362 int rc = -EIO;
3363 u32 raw_cons;
3364 u32 cons;
3365 int i;
3366
3367 raw_cons = cpr->cp_raw_cons;
3368 for (i = 0; i < 200; i++) {
3369 cons = RING_CMP(raw_cons);
3370 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
3371
3372 if (!TX_CMP_VALID(txcmp, raw_cons)) {
3373 udelay(5);
3374 continue;
3375 }
3376
3377 /* The valid test of the entry must be done first before
3378 * reading any further.
3379 */
3380 dma_rmb();
3381 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
3382 rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
3383 raw_cons = NEXT_RAW_CMP(raw_cons);
3384 raw_cons = NEXT_RAW_CMP(raw_cons);
3385 break;
3386 }
3387 raw_cons = NEXT_RAW_CMP(raw_cons);
3388 }
3389 cpr->cp_raw_cons = raw_cons;
3390 return rc;
3391 }
3392
bnxt_run_loopback(struct bnxt * bp)3393 static int bnxt_run_loopback(struct bnxt *bp)
3394 {
3395 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
3396 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
3397 struct bnxt_cp_ring_info *cpr;
3398 int pkt_size, i = 0;
3399 struct sk_buff *skb;
3400 dma_addr_t map;
3401 u8 *data;
3402 int rc;
3403
3404 cpr = &rxr->bnapi->cp_ring;
3405 if (bp->flags & BNXT_FLAG_CHIP_P5)
3406 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
3407 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
3408 skb = netdev_alloc_skb(bp->dev, pkt_size);
3409 if (!skb)
3410 return -ENOMEM;
3411 data = skb_put(skb, pkt_size);
3412 ether_addr_copy(&data[i], bp->dev->dev_addr);
3413 i += ETH_ALEN;
3414 ether_addr_copy(&data[i], bp->dev->dev_addr);
3415 i += ETH_ALEN;
3416 for ( ; i < pkt_size; i++)
3417 data[i] = (u8)(i & 0xff);
3418
3419 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
3420 DMA_TO_DEVICE);
3421 if (dma_mapping_error(&bp->pdev->dev, map)) {
3422 dev_kfree_skb(skb);
3423 return -EIO;
3424 }
3425 bnxt_xmit_bd(bp, txr, map, pkt_size);
3426
3427 /* Sync BD data before updating doorbell */
3428 wmb();
3429
3430 bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
3431 rc = bnxt_poll_loopback(bp, cpr, pkt_size);
3432
3433 dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE);
3434 dev_kfree_skb(skb);
3435 return rc;
3436 }
3437
bnxt_run_fw_tests(struct bnxt * bp,u8 test_mask,u8 * test_results)3438 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
3439 {
3440 struct hwrm_selftest_exec_output *resp;
3441 struct hwrm_selftest_exec_input *req;
3442 int rc;
3443
3444 rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC);
3445 if (rc)
3446 return rc;
3447
3448 hwrm_req_timeout(bp, req, bp->test_info->timeout);
3449 req->flags = test_mask;
3450
3451 resp = hwrm_req_hold(bp, req);
3452 rc = hwrm_req_send(bp, req);
3453 *test_results = resp->test_success;
3454 hwrm_req_drop(bp, req);
3455 return rc;
3456 }
3457
3458 #define BNXT_DRV_TESTS 4
3459 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
3460 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
3461 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
3462 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3)
3463
bnxt_self_test(struct net_device * dev,struct ethtool_test * etest,u64 * buf)3464 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
3465 u64 *buf)
3466 {
3467 struct bnxt *bp = netdev_priv(dev);
3468 bool do_ext_lpbk = false;
3469 bool offline = false;
3470 u8 test_results = 0;
3471 u8 test_mask = 0;
3472 int rc = 0, i;
3473
3474 if (!bp->num_tests || !BNXT_PF(bp))
3475 return;
3476 memset(buf, 0, sizeof(u64) * bp->num_tests);
3477 if (!netif_running(dev)) {
3478 etest->flags |= ETH_TEST_FL_FAILED;
3479 return;
3480 }
3481
3482 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
3483 (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK))
3484 do_ext_lpbk = true;
3485
3486 if (etest->flags & ETH_TEST_FL_OFFLINE) {
3487 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) {
3488 etest->flags |= ETH_TEST_FL_FAILED;
3489 netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n");
3490 return;
3491 }
3492 offline = true;
3493 }
3494
3495 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3496 u8 bit_val = 1 << i;
3497
3498 if (!(bp->test_info->offline_mask & bit_val))
3499 test_mask |= bit_val;
3500 else if (offline)
3501 test_mask |= bit_val;
3502 }
3503 if (!offline) {
3504 bnxt_run_fw_tests(bp, test_mask, &test_results);
3505 } else {
3506 bnxt_ulp_stop(bp);
3507 rc = bnxt_close_nic(bp, true, false);
3508 if (rc) {
3509 etest->flags |= ETH_TEST_FL_FAILED;
3510 bnxt_ulp_start(bp, rc);
3511 return;
3512 }
3513 bnxt_run_fw_tests(bp, test_mask, &test_results);
3514
3515 buf[BNXT_MACLPBK_TEST_IDX] = 1;
3516 bnxt_hwrm_mac_loopback(bp, true);
3517 msleep(250);
3518 rc = bnxt_half_open_nic(bp);
3519 if (rc) {
3520 bnxt_hwrm_mac_loopback(bp, false);
3521 etest->flags |= ETH_TEST_FL_FAILED;
3522 bnxt_ulp_start(bp, rc);
3523 return;
3524 }
3525 if (bnxt_run_loopback(bp))
3526 etest->flags |= ETH_TEST_FL_FAILED;
3527 else
3528 buf[BNXT_MACLPBK_TEST_IDX] = 0;
3529
3530 bnxt_hwrm_mac_loopback(bp, false);
3531 bnxt_hwrm_phy_loopback(bp, true, false);
3532 msleep(1000);
3533 if (bnxt_run_loopback(bp)) {
3534 buf[BNXT_PHYLPBK_TEST_IDX] = 1;
3535 etest->flags |= ETH_TEST_FL_FAILED;
3536 }
3537 if (do_ext_lpbk) {
3538 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
3539 bnxt_hwrm_phy_loopback(bp, true, true);
3540 msleep(1000);
3541 if (bnxt_run_loopback(bp)) {
3542 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
3543 etest->flags |= ETH_TEST_FL_FAILED;
3544 }
3545 }
3546 bnxt_hwrm_phy_loopback(bp, false, false);
3547 bnxt_half_close_nic(bp);
3548 rc = bnxt_open_nic(bp, true, true);
3549 bnxt_ulp_start(bp, rc);
3550 }
3551 if (rc || bnxt_test_irq(bp)) {
3552 buf[BNXT_IRQ_TEST_IDX] = 1;
3553 etest->flags |= ETH_TEST_FL_FAILED;
3554 }
3555 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3556 u8 bit_val = 1 << i;
3557
3558 if ((test_mask & bit_val) && !(test_results & bit_val)) {
3559 buf[i] = 1;
3560 etest->flags |= ETH_TEST_FL_FAILED;
3561 }
3562 }
3563 }
3564
bnxt_reset(struct net_device * dev,u32 * flags)3565 static int bnxt_reset(struct net_device *dev, u32 *flags)
3566 {
3567 struct bnxt *bp = netdev_priv(dev);
3568 bool reload = false;
3569 u32 req = *flags;
3570
3571 if (!req)
3572 return -EINVAL;
3573
3574 if (!BNXT_PF(bp)) {
3575 netdev_err(dev, "Reset is not supported from a VF\n");
3576 return -EOPNOTSUPP;
3577 }
3578
3579 if (pci_vfs_assigned(bp->pdev) &&
3580 !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
3581 netdev_err(dev,
3582 "Reset not allowed when VFs are assigned to VMs\n");
3583 return -EBUSY;
3584 }
3585
3586 if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
3587 /* This feature is not supported in older firmware versions */
3588 if (bp->hwrm_spec_code >= 0x10803) {
3589 if (!bnxt_firmware_reset_chip(dev)) {
3590 netdev_info(dev, "Firmware reset request successful.\n");
3591 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
3592 reload = true;
3593 *flags &= ~BNXT_FW_RESET_CHIP;
3594 }
3595 } else if (req == BNXT_FW_RESET_CHIP) {
3596 return -EOPNOTSUPP; /* only request, fail hard */
3597 }
3598 }
3599
3600 if (!BNXT_CHIP_P4_PLUS(bp) && (req & BNXT_FW_RESET_AP)) {
3601 /* This feature is not supported in older firmware versions */
3602 if (bp->hwrm_spec_code >= 0x10803) {
3603 if (!bnxt_firmware_reset_ap(dev)) {
3604 netdev_info(dev, "Reset application processor successful.\n");
3605 reload = true;
3606 *flags &= ~BNXT_FW_RESET_AP;
3607 }
3608 } else if (req == BNXT_FW_RESET_AP) {
3609 return -EOPNOTSUPP; /* only request, fail hard */
3610 }
3611 }
3612
3613 if (reload)
3614 netdev_info(dev, "Reload driver to complete reset\n");
3615
3616 return 0;
3617 }
3618
bnxt_set_dump(struct net_device * dev,struct ethtool_dump * dump)3619 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
3620 {
3621 struct bnxt *bp = netdev_priv(dev);
3622
3623 if (dump->flag > BNXT_DUMP_CRASH) {
3624 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
3625 return -EINVAL;
3626 }
3627
3628 if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
3629 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
3630 return -EOPNOTSUPP;
3631 }
3632
3633 bp->dump_flag = dump->flag;
3634 return 0;
3635 }
3636
bnxt_get_dump_flag(struct net_device * dev,struct ethtool_dump * dump)3637 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3638 {
3639 struct bnxt *bp = netdev_priv(dev);
3640
3641 if (bp->hwrm_spec_code < 0x10801)
3642 return -EOPNOTSUPP;
3643
3644 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3645 bp->ver_resp.hwrm_fw_min_8b << 16 |
3646 bp->ver_resp.hwrm_fw_bld_8b << 8 |
3647 bp->ver_resp.hwrm_fw_rsvd_8b;
3648
3649 dump->flag = bp->dump_flag;
3650 dump->len = bnxt_get_coredump_length(bp, bp->dump_flag);
3651 return 0;
3652 }
3653
bnxt_get_dump_data(struct net_device * dev,struct ethtool_dump * dump,void * buf)3654 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3655 void *buf)
3656 {
3657 struct bnxt *bp = netdev_priv(dev);
3658
3659 if (bp->hwrm_spec_code < 0x10801)
3660 return -EOPNOTSUPP;
3661
3662 memset(buf, 0, dump->len);
3663
3664 dump->flag = bp->dump_flag;
3665 return bnxt_get_coredump(bp, dump->flag, buf, &dump->len);
3666 }
3667
bnxt_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)3668 static int bnxt_get_ts_info(struct net_device *dev,
3669 struct ethtool_ts_info *info)
3670 {
3671 struct bnxt *bp = netdev_priv(dev);
3672 struct bnxt_ptp_cfg *ptp;
3673
3674 ptp = bp->ptp_cfg;
3675 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
3676 SOF_TIMESTAMPING_RX_SOFTWARE |
3677 SOF_TIMESTAMPING_SOFTWARE;
3678
3679 info->phc_index = -1;
3680 if (!ptp)
3681 return 0;
3682
3683 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
3684 SOF_TIMESTAMPING_RX_HARDWARE |
3685 SOF_TIMESTAMPING_RAW_HARDWARE;
3686 if (ptp->ptp_clock)
3687 info->phc_index = ptp_clock_index(ptp->ptp_clock);
3688
3689 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
3690
3691 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
3692 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
3693 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
3694 return 0;
3695 }
3696
bnxt_ethtool_init(struct bnxt * bp)3697 void bnxt_ethtool_init(struct bnxt *bp)
3698 {
3699 struct hwrm_selftest_qlist_output *resp;
3700 struct hwrm_selftest_qlist_input *req;
3701 struct bnxt_test_info *test_info;
3702 struct net_device *dev = bp->dev;
3703 int i, rc;
3704
3705 if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3706 bnxt_get_pkgver(dev);
3707
3708 bp->num_tests = 0;
3709 if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp))
3710 return;
3711
3712 test_info = bp->test_info;
3713 if (!test_info) {
3714 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3715 if (!test_info)
3716 return;
3717 bp->test_info = test_info;
3718 }
3719
3720 if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST))
3721 return;
3722
3723 resp = hwrm_req_hold(bp, req);
3724 rc = hwrm_req_send_silent(bp, req);
3725 if (rc)
3726 goto ethtool_init_exit;
3727
3728 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3729 if (bp->num_tests > BNXT_MAX_TEST)
3730 bp->num_tests = BNXT_MAX_TEST;
3731
3732 test_info->offline_mask = resp->offline_tests;
3733 test_info->timeout = le16_to_cpu(resp->test_timeout);
3734 if (!test_info->timeout)
3735 test_info->timeout = HWRM_CMD_TIMEOUT;
3736 for (i = 0; i < bp->num_tests; i++) {
3737 char *str = test_info->string[i];
3738 char *fw_str = resp->test0_name + i * 32;
3739
3740 if (i == BNXT_MACLPBK_TEST_IDX) {
3741 strcpy(str, "Mac loopback test (offline)");
3742 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3743 strcpy(str, "Phy loopback test (offline)");
3744 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3745 strcpy(str, "Ext loopback test (offline)");
3746 } else if (i == BNXT_IRQ_TEST_IDX) {
3747 strcpy(str, "Interrupt_test (offline)");
3748 } else {
3749 strlcpy(str, fw_str, ETH_GSTRING_LEN);
3750 strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3751 if (test_info->offline_mask & (1 << i))
3752 strncat(str, " (offline)",
3753 ETH_GSTRING_LEN - strlen(str));
3754 else
3755 strncat(str, " (online)",
3756 ETH_GSTRING_LEN - strlen(str));
3757 }
3758 }
3759
3760 ethtool_init_exit:
3761 hwrm_req_drop(bp, req);
3762 }
3763
bnxt_get_eth_phy_stats(struct net_device * dev,struct ethtool_eth_phy_stats * phy_stats)3764 static void bnxt_get_eth_phy_stats(struct net_device *dev,
3765 struct ethtool_eth_phy_stats *phy_stats)
3766 {
3767 struct bnxt *bp = netdev_priv(dev);
3768 u64 *rx;
3769
3770 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
3771 return;
3772
3773 rx = bp->rx_port_stats_ext.sw_stats;
3774 phy_stats->SymbolErrorDuringCarrier =
3775 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err));
3776 }
3777
bnxt_get_eth_mac_stats(struct net_device * dev,struct ethtool_eth_mac_stats * mac_stats)3778 static void bnxt_get_eth_mac_stats(struct net_device *dev,
3779 struct ethtool_eth_mac_stats *mac_stats)
3780 {
3781 struct bnxt *bp = netdev_priv(dev);
3782 u64 *rx, *tx;
3783
3784 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
3785 return;
3786
3787 rx = bp->port_stats.sw_stats;
3788 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
3789
3790 mac_stats->FramesReceivedOK =
3791 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames);
3792 mac_stats->FramesTransmittedOK =
3793 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames);
3794 mac_stats->FrameCheckSequenceErrors =
3795 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames);
3796 mac_stats->AlignmentErrors =
3797 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames);
3798 mac_stats->OutOfRangeLengthField =
3799 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames);
3800 }
3801
bnxt_get_eth_ctrl_stats(struct net_device * dev,struct ethtool_eth_ctrl_stats * ctrl_stats)3802 static void bnxt_get_eth_ctrl_stats(struct net_device *dev,
3803 struct ethtool_eth_ctrl_stats *ctrl_stats)
3804 {
3805 struct bnxt *bp = netdev_priv(dev);
3806 u64 *rx;
3807
3808 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
3809 return;
3810
3811 rx = bp->port_stats.sw_stats;
3812 ctrl_stats->MACControlFramesReceived =
3813 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames);
3814 }
3815
3816 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = {
3817 { 0, 64 },
3818 { 65, 127 },
3819 { 128, 255 },
3820 { 256, 511 },
3821 { 512, 1023 },
3822 { 1024, 1518 },
3823 { 1519, 2047 },
3824 { 2048, 4095 },
3825 { 4096, 9216 },
3826 { 9217, 16383 },
3827 {}
3828 };
3829
bnxt_get_rmon_stats(struct net_device * dev,struct ethtool_rmon_stats * rmon_stats,const struct ethtool_rmon_hist_range ** ranges)3830 static void bnxt_get_rmon_stats(struct net_device *dev,
3831 struct ethtool_rmon_stats *rmon_stats,
3832 const struct ethtool_rmon_hist_range **ranges)
3833 {
3834 struct bnxt *bp = netdev_priv(dev);
3835 u64 *rx, *tx;
3836
3837 if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
3838 return;
3839
3840 rx = bp->port_stats.sw_stats;
3841 tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
3842
3843 rmon_stats->jabbers =
3844 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames);
3845 rmon_stats->oversize_pkts =
3846 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames);
3847 rmon_stats->undersize_pkts =
3848 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames);
3849
3850 rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames);
3851 rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames);
3852 rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames);
3853 rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames);
3854 rmon_stats->hist[4] =
3855 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames);
3856 rmon_stats->hist[5] =
3857 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames);
3858 rmon_stats->hist[6] =
3859 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames);
3860 rmon_stats->hist[7] =
3861 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames);
3862 rmon_stats->hist[8] =
3863 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames);
3864 rmon_stats->hist[9] =
3865 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames);
3866
3867 rmon_stats->hist_tx[0] =
3868 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames);
3869 rmon_stats->hist_tx[1] =
3870 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames);
3871 rmon_stats->hist_tx[2] =
3872 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames);
3873 rmon_stats->hist_tx[3] =
3874 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames);
3875 rmon_stats->hist_tx[4] =
3876 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames);
3877 rmon_stats->hist_tx[5] =
3878 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames);
3879 rmon_stats->hist_tx[6] =
3880 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames);
3881 rmon_stats->hist_tx[7] =
3882 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames);
3883 rmon_stats->hist_tx[8] =
3884 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames);
3885 rmon_stats->hist_tx[9] =
3886 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames);
3887
3888 *ranges = bnxt_rmon_ranges;
3889 }
3890
bnxt_ethtool_free(struct bnxt * bp)3891 void bnxt_ethtool_free(struct bnxt *bp)
3892 {
3893 kfree(bp->test_info);
3894 bp->test_info = NULL;
3895 }
3896
3897 const struct ethtool_ops bnxt_ethtool_ops = {
3898 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
3899 ETHTOOL_COALESCE_MAX_FRAMES |
3900 ETHTOOL_COALESCE_USECS_IRQ |
3901 ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
3902 ETHTOOL_COALESCE_STATS_BLOCK_USECS |
3903 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
3904 .get_link_ksettings = bnxt_get_link_ksettings,
3905 .set_link_ksettings = bnxt_set_link_ksettings,
3906 .get_fec_stats = bnxt_get_fec_stats,
3907 .get_fecparam = bnxt_get_fecparam,
3908 .set_fecparam = bnxt_set_fecparam,
3909 .get_pause_stats = bnxt_get_pause_stats,
3910 .get_pauseparam = bnxt_get_pauseparam,
3911 .set_pauseparam = bnxt_set_pauseparam,
3912 .get_drvinfo = bnxt_get_drvinfo,
3913 .get_regs_len = bnxt_get_regs_len,
3914 .get_regs = bnxt_get_regs,
3915 .get_wol = bnxt_get_wol,
3916 .set_wol = bnxt_set_wol,
3917 .get_coalesce = bnxt_get_coalesce,
3918 .set_coalesce = bnxt_set_coalesce,
3919 .get_msglevel = bnxt_get_msglevel,
3920 .set_msglevel = bnxt_set_msglevel,
3921 .get_sset_count = bnxt_get_sset_count,
3922 .get_strings = bnxt_get_strings,
3923 .get_ethtool_stats = bnxt_get_ethtool_stats,
3924 .set_ringparam = bnxt_set_ringparam,
3925 .get_ringparam = bnxt_get_ringparam,
3926 .get_channels = bnxt_get_channels,
3927 .set_channels = bnxt_set_channels,
3928 .get_rxnfc = bnxt_get_rxnfc,
3929 .set_rxnfc = bnxt_set_rxnfc,
3930 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
3931 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
3932 .get_rxfh = bnxt_get_rxfh,
3933 .set_rxfh = bnxt_set_rxfh,
3934 .flash_device = bnxt_flash_device,
3935 .get_eeprom_len = bnxt_get_eeprom_len,
3936 .get_eeprom = bnxt_get_eeprom,
3937 .set_eeprom = bnxt_set_eeprom,
3938 .get_link = bnxt_get_link,
3939 .get_eee = bnxt_get_eee,
3940 .set_eee = bnxt_set_eee,
3941 .get_module_info = bnxt_get_module_info,
3942 .get_module_eeprom = bnxt_get_module_eeprom,
3943 .nway_reset = bnxt_nway_reset,
3944 .set_phys_id = bnxt_set_phys_id,
3945 .self_test = bnxt_self_test,
3946 .get_ts_info = bnxt_get_ts_info,
3947 .reset = bnxt_reset,
3948 .set_dump = bnxt_set_dump,
3949 .get_dump_flag = bnxt_get_dump_flag,
3950 .get_dump_data = bnxt_get_dump_data,
3951 .get_eth_phy_stats = bnxt_get_eth_phy_stats,
3952 .get_eth_mac_stats = bnxt_get_eth_mac_stats,
3953 .get_eth_ctrl_stats = bnxt_get_eth_ctrl_stats,
3954 .get_rmon_stats = bnxt_get_rmon_stats,
3955 };
3956