1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * This control block defines the PACA which defines the processor
4 * specific data for each logical processor on the system.
5 * There are some pointers defined that are utilized by PLIC.
6 *
7 * C 2001 PPC 64 Team, IBM Corp
8 */
9 #ifndef _ASM_POWERPC_PACA_H
10 #define _ASM_POWERPC_PACA_H
11 #ifdef __KERNEL__
12
13 #ifdef CONFIG_PPC64
14
15 #include <linux/string.h>
16 #include <asm/types.h>
17 #include <asm/mmu.h>
18 #include <asm/page.h>
19 #ifdef CONFIG_PPC_BOOK3E
20 #include <asm/exception-64e.h>
21 #else
22 #include <asm/exception-64s.h>
23 #endif
24 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
25 #include <asm/kvm_book3s_asm.h>
26 #endif
27 #include <asm/accounting.h>
28 #include <asm/hmi.h>
29 #include <asm/cpuidle.h>
30 #include <asm/atomic.h>
31 #include <asm/mce.h>
32
33 #include <asm-generic/mmiowb_types.h>
34
35 register struct paca_struct *local_paca asm("r13");
36
37 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
38 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
39 /*
40 * Add standard checks that preemption cannot occur when using get_paca():
41 * otherwise the paca_struct it points to may be the wrong one just after.
42 */
43 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
44 #else
45 #define get_paca() local_paca
46 #endif
47
48 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
49
50 struct task_struct;
51 struct rtas_args;
52 struct lppaca;
53
54 /*
55 * Defines the layout of the paca.
56 *
57 * This structure is not directly accessed by firmware or the service
58 * processor.
59 */
60 struct paca_struct {
61 #ifdef CONFIG_PPC_PSERIES
62 /*
63 * Because hw_cpu_id, unlike other paca fields, is accessed
64 * routinely from other CPUs (from the IRQ code), we stick to
65 * read-only (after boot) fields in the first cacheline to
66 * avoid cacheline bouncing.
67 */
68
69 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
70 #endif /* CONFIG_PPC_PSERIES */
71
72 /*
73 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
74 * load lock_token and paca_index with a single lwz
75 * instruction. They must travel together and be properly
76 * aligned.
77 */
78 #ifdef __BIG_ENDIAN__
79 u16 lock_token; /* Constant 0x8000, used in locks */
80 u16 paca_index; /* Logical processor number */
81 #else
82 u16 paca_index; /* Logical processor number */
83 u16 lock_token; /* Constant 0x8000, used in locks */
84 #endif
85
86 u64 kernel_toc; /* Kernel TOC address */
87 u64 kernelbase; /* Base address of kernel */
88 u64 kernel_msr; /* MSR while running in kernel */
89 void *emergency_sp; /* pointer to emergency stack */
90 u64 data_offset; /* per cpu data offset */
91 s16 hw_cpu_id; /* Physical processor number */
92 u8 cpu_start; /* At startup, processor spins until */
93 /* this becomes non-zero. */
94 u8 kexec_state; /* set when kexec down has irqs off */
95 #ifdef CONFIG_PPC_BOOK3S_64
96 struct slb_shadow *slb_shadow_ptr;
97 struct dtl_entry *dispatch_log;
98 struct dtl_entry *dispatch_log_end;
99 #endif
100 u64 dscr_default; /* per-CPU default DSCR */
101
102 #ifdef CONFIG_PPC_BOOK3S_64
103 /*
104 * Now, starting in cacheline 2, the exception save areas
105 */
106 /* used for most interrupts/exceptions */
107 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
108
109 /* SLB related definitions */
110 u16 vmalloc_sllp;
111 u8 slb_cache_ptr;
112 u8 stab_rr; /* stab/slb round-robin counter */
113 #ifdef CONFIG_DEBUG_VM
114 u8 in_kernel_slb_handler;
115 #endif
116 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */
117 u32 slb_kern_bitmap;
118 u32 slb_cache[SLB_CACHE_ENTRIES];
119 #endif /* CONFIG_PPC_BOOK3S_64 */
120
121 #ifdef CONFIG_PPC_BOOK3E
122 u64 exgen[8] __aligned(0x40);
123 /* Keep pgd in the same cacheline as the start of extlb */
124 pgd_t *pgd __aligned(0x40); /* Current PGD */
125 pgd_t *kernel_pgd; /* Kernel PGD */
126
127 /* Shared by all threads of a core -- points to tcd of first thread */
128 struct tlb_core_data *tcd_ptr;
129
130 /*
131 * We can have up to 3 levels of reentrancy in the TLB miss handler,
132 * in each of four exception levels (normal, crit, mcheck, debug).
133 */
134 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
135 u64 exmc[8]; /* used for machine checks */
136 u64 excrit[8]; /* used for crit interrupts */
137 u64 exdbg[8]; /* used for debug interrupts */
138
139 /* Kernel stack pointers for use by special exceptions */
140 void *mc_kstack;
141 void *crit_kstack;
142 void *dbg_kstack;
143
144 struct tlb_core_data tcd;
145 #endif /* CONFIG_PPC_BOOK3E */
146
147 #ifdef CONFIG_PPC_BOOK3S
148 #ifdef CONFIG_PPC_MM_SLICES
149 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
150 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
151 #else
152 u16 mm_ctx_user_psize;
153 u16 mm_ctx_sllp;
154 #endif
155 #endif
156
157 /*
158 * then miscellaneous read-write fields
159 */
160 struct task_struct *__current; /* Pointer to current */
161 u64 kstack; /* Saved Kernel stack addr */
162 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
163 u64 saved_msr; /* MSR saved here by enter_rtas */
164 #ifdef CONFIG_PPC64
165 u64 exit_save_r1; /* Syscall/interrupt R1 save */
166 #endif
167 #ifdef CONFIG_PPC_BOOK3E
168 u16 trap_save; /* Used when bad stack is encountered */
169 #endif
170 #ifdef CONFIG_PPC_BOOK3S_64
171 u8 hsrr_valid; /* HSRRs set for HRFID */
172 u8 srr_valid; /* SRRs set for RFID */
173 #endif
174 u8 irq_soft_mask; /* mask for irq soft masking */
175 u8 irq_happened; /* irq happened while soft-disabled */
176 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
177 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
178 u8 pmcregs_in_use; /* pseries puts this in lppaca */
179 #endif
180 u64 sprg_vdso; /* Saved user-visible sprg */
181 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
182 u64 tm_scratch; /* TM scratch area for reclaim */
183 #endif
184
185 #ifdef CONFIG_PPC_POWERNV
186 /* PowerNV idle fields */
187 /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */
188 unsigned long idle_state;
189 union {
190 /* P7/P8 specific fields */
191 struct {
192 /* PNV_THREAD_RUNNING/NAP/SLEEP */
193 u8 thread_idle_state;
194 /* Mask to denote subcore sibling threads */
195 u8 subcore_sibling_mask;
196 };
197
198 /* P9 specific fields */
199 struct {
200 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
201 /* The PSSCR value that the kernel requested before going to stop */
202 u64 requested_psscr;
203 /* Flag to request this thread not to stop */
204 atomic_t dont_stop;
205 #endif
206 };
207 };
208 #endif
209
210 #ifdef CONFIG_PPC_BOOK3S_64
211 /* Non-maskable exceptions that are not performance critical */
212 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
213 u64 exmc[EX_SIZE]; /* used for machine checks */
214 #endif
215 #ifdef CONFIG_PPC_BOOK3S_64
216 /* Exclusive stacks for system reset and machine check exception. */
217 void *nmi_emergency_sp;
218 void *mc_emergency_sp;
219
220 u16 in_nmi; /* In nmi handler */
221
222 /*
223 * Flag to check whether we are in machine check early handler
224 * and already using emergency stack.
225 */
226 u16 in_mce;
227 u8 hmi_event_available; /* HMI event is available */
228 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
229 u32 hmi_irqs; /* HMI irq stat */
230 #endif
231 u8 ftrace_enabled; /* Hard disable ftrace */
232
233 /* Stuff for accurate time accounting */
234 struct cpu_accounting_data accounting;
235 u64 dtl_ridx; /* read index in dispatch log */
236 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
237
238 #ifdef CONFIG_KVM_BOOK3S_HANDLER
239 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
240 /* We use this to store guest state in */
241 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
242 #endif
243 struct kvmppc_host_state kvm_hstate;
244 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
245 /*
246 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
247 * more details
248 */
249 struct sibling_subcore_state *sibling_subcore_state;
250 #endif
251 #endif
252 #ifdef CONFIG_PPC_BOOK3S_64
253 /*
254 * rfi fallback flush must be in its own cacheline to prevent
255 * other paca data leaking into the L1d
256 */
257 u64 exrfi[EX_SIZE] __aligned(0x80);
258 void *rfi_flush_fallback_area;
259 u64 l1d_flush_size;
260 #endif
261 #ifdef CONFIG_PPC_PSERIES
262 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
263 #endif /* CONFIG_PPC_PSERIES */
264
265 #ifdef CONFIG_PPC_BOOK3S_64
266 /* Capture SLB related old contents in MCE handler. */
267 struct slb_entry *mce_faulty_slbs;
268 u16 slb_save_cache_ptr;
269 #endif /* CONFIG_PPC_BOOK3S_64 */
270 #ifdef CONFIG_STACKPROTECTOR
271 unsigned long canary;
272 #endif
273 #ifdef CONFIG_MMIOWB
274 struct mmiowb_state mmiowb_state;
275 #endif
276 #ifdef CONFIG_PPC_BOOK3S_64
277 struct mce_info *mce_info;
278 #endif /* CONFIG_PPC_BOOK3S_64 */
279 } ____cacheline_aligned;
280
281 extern void copy_mm_to_paca(struct mm_struct *mm);
282 extern struct paca_struct **paca_ptrs;
283 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
284 extern void setup_paca(struct paca_struct *new_paca);
285 extern void allocate_paca_ptrs(void);
286 extern void allocate_paca(int cpu);
287 extern void free_unused_pacas(void);
288
289 #else /* CONFIG_PPC64 */
290
allocate_paca_ptrs(void)291 static inline void allocate_paca_ptrs(void) { }
allocate_paca(int cpu)292 static inline void allocate_paca(int cpu) { }
free_unused_pacas(void)293 static inline void free_unused_pacas(void) { }
294
295 #endif /* CONFIG_PPC64 */
296
297 #endif /* __KERNEL__ */
298 #endif /* _ASM_POWERPC_PACA_H */
299