• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 
20 #include "internals.h"
21 
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 
25 /**
26  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27  * @bus: I3C bus to take the lock on
28  *
29  * This function takes the bus lock so that no other operations can occur on
30  * the bus. This is needed for all kind of bus maintenance operation, like
31  * - enabling/disabling slave events
32  * - re-triggering DAA
33  * - changing the dynamic address of a device
34  * - relinquishing mastership
35  * - ...
36  *
37  * The reason for this kind of locking is that we don't want drivers and core
38  * logic to rely on I3C device information that could be changed behind their
39  * back.
40  */
i3c_bus_maintenance_lock(struct i3c_bus * bus)41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42 {
43 	down_write(&bus->lock);
44 }
45 
46 /**
47  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48  *			      operation
49  * @bus: I3C bus to release the lock on
50  *
51  * Should be called when the bus maintenance operation is done. See
52  * i3c_bus_maintenance_lock() for more details on what these maintenance
53  * operations are.
54  */
i3c_bus_maintenance_unlock(struct i3c_bus * bus)55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56 {
57 	up_write(&bus->lock);
58 }
59 
60 /**
61  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62  * @bus: I3C bus to take the lock on
63  *
64  * This function takes the bus lock for any operation that is not a maintenance
65  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66  * maintenance operations). Basically all communications with I3C devices are
67  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68  * state or I3C dynamic address).
69  *
70  * Note that this lock is not guaranteeing serialization of normal operations.
71  * In other words, transfer requests passed to the I3C master can be submitted
72  * in parallel and I3C master drivers have to use their own locking to make
73  * sure two different communications are not inter-mixed, or access to the
74  * output/input queue is not done while the engine is busy.
75  */
i3c_bus_normaluse_lock(struct i3c_bus * bus)76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77 {
78 	down_read(&bus->lock);
79 }
80 
81 /**
82  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83  * @bus: I3C bus to release the lock on
84  *
85  * Should be called when a normal operation is done. See
86  * i3c_bus_normaluse_lock() for more details on what these normal operations
87  * are.
88  */
i3c_bus_normaluse_unlock(struct i3c_bus * bus)89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90 {
91 	up_read(&bus->lock);
92 }
93 
94 static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus * i3cbus)95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96 {
97 	return container_of(i3cbus, struct i3c_master_controller, bus);
98 }
99 
dev_to_i3cmaster(struct device * dev)100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101 {
102 	return container_of(dev, struct i3c_master_controller, dev);
103 }
104 
105 static const struct device_type i3c_device_type;
106 
dev_to_i3cbus(struct device * dev)107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108 {
109 	struct i3c_master_controller *master;
110 
111 	if (dev->type == &i3c_device_type)
112 		return dev_to_i3cdev(dev)->bus;
113 
114 	master = dev_to_i3cmaster(dev);
115 
116 	return &master->bus;
117 }
118 
dev_to_i3cdesc(struct device * dev)119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120 {
121 	struct i3c_master_controller *master;
122 
123 	if (dev->type == &i3c_device_type)
124 		return dev_to_i3cdev(dev)->desc;
125 
126 	master = dev_to_i3cmaster(dev);
127 
128 	return master->this;
129 }
130 
bcr_show(struct device * dev,struct device_attribute * da,char * buf)131 static ssize_t bcr_show(struct device *dev,
132 			struct device_attribute *da,
133 			char *buf)
134 {
135 	struct i3c_bus *bus = dev_to_i3cbus(dev);
136 	struct i3c_dev_desc *desc;
137 	ssize_t ret;
138 
139 	i3c_bus_normaluse_lock(bus);
140 	desc = dev_to_i3cdesc(dev);
141 	ret = sprintf(buf, "%x\n", desc->info.bcr);
142 	i3c_bus_normaluse_unlock(bus);
143 
144 	return ret;
145 }
146 static DEVICE_ATTR_RO(bcr);
147 
dcr_show(struct device * dev,struct device_attribute * da,char * buf)148 static ssize_t dcr_show(struct device *dev,
149 			struct device_attribute *da,
150 			char *buf)
151 {
152 	struct i3c_bus *bus = dev_to_i3cbus(dev);
153 	struct i3c_dev_desc *desc;
154 	ssize_t ret;
155 
156 	i3c_bus_normaluse_lock(bus);
157 	desc = dev_to_i3cdesc(dev);
158 	ret = sprintf(buf, "%x\n", desc->info.dcr);
159 	i3c_bus_normaluse_unlock(bus);
160 
161 	return ret;
162 }
163 static DEVICE_ATTR_RO(dcr);
164 
pid_show(struct device * dev,struct device_attribute * da,char * buf)165 static ssize_t pid_show(struct device *dev,
166 			struct device_attribute *da,
167 			char *buf)
168 {
169 	struct i3c_bus *bus = dev_to_i3cbus(dev);
170 	struct i3c_dev_desc *desc;
171 	ssize_t ret;
172 
173 	i3c_bus_normaluse_lock(bus);
174 	desc = dev_to_i3cdesc(dev);
175 	ret = sprintf(buf, "%llx\n", desc->info.pid);
176 	i3c_bus_normaluse_unlock(bus);
177 
178 	return ret;
179 }
180 static DEVICE_ATTR_RO(pid);
181 
dynamic_address_show(struct device * dev,struct device_attribute * da,char * buf)182 static ssize_t dynamic_address_show(struct device *dev,
183 				    struct device_attribute *da,
184 				    char *buf)
185 {
186 	struct i3c_bus *bus = dev_to_i3cbus(dev);
187 	struct i3c_dev_desc *desc;
188 	ssize_t ret;
189 
190 	i3c_bus_normaluse_lock(bus);
191 	desc = dev_to_i3cdesc(dev);
192 	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 	i3c_bus_normaluse_unlock(bus);
194 
195 	return ret;
196 }
197 static DEVICE_ATTR_RO(dynamic_address);
198 
199 static const char * const hdrcap_strings[] = {
200 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
201 };
202 
hdrcap_show(struct device * dev,struct device_attribute * da,char * buf)203 static ssize_t hdrcap_show(struct device *dev,
204 			   struct device_attribute *da,
205 			   char *buf)
206 {
207 	struct i3c_bus *bus = dev_to_i3cbus(dev);
208 	struct i3c_dev_desc *desc;
209 	ssize_t offset = 0, ret;
210 	unsigned long caps;
211 	int mode;
212 
213 	i3c_bus_normaluse_lock(bus);
214 	desc = dev_to_i3cdesc(dev);
215 	caps = desc->info.hdr_cap;
216 	for_each_set_bit(mode, &caps, 8) {
217 		if (mode >= ARRAY_SIZE(hdrcap_strings))
218 			break;
219 
220 		if (!hdrcap_strings[mode])
221 			continue;
222 
223 		ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 			      hdrcap_strings[mode]);
225 		if (ret < 0)
226 			goto out;
227 
228 		offset += ret;
229 	}
230 
231 	ret = sprintf(buf + offset, "\n");
232 	if (ret < 0)
233 		goto out;
234 
235 	ret = offset + ret;
236 
237 out:
238 	i3c_bus_normaluse_unlock(bus);
239 
240 	return ret;
241 }
242 static DEVICE_ATTR_RO(hdrcap);
243 
modalias_show(struct device * dev,struct device_attribute * da,char * buf)244 static ssize_t modalias_show(struct device *dev,
245 			     struct device_attribute *da, char *buf)
246 {
247 	struct i3c_device *i3c = dev_to_i3cdev(dev);
248 	struct i3c_device_info devinfo;
249 	u16 manuf, part, ext;
250 
251 	i3c_device_get_info(i3c, &devinfo);
252 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 	part = I3C_PID_PART_ID(devinfo.pid);
254 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255 
256 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258 			       manuf);
259 
260 	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 		       devinfo.dcr, manuf, part, ext);
262 }
263 static DEVICE_ATTR_RO(modalias);
264 
265 static struct attribute *i3c_device_attrs[] = {
266 	&dev_attr_bcr.attr,
267 	&dev_attr_dcr.attr,
268 	&dev_attr_pid.attr,
269 	&dev_attr_dynamic_address.attr,
270 	&dev_attr_hdrcap.attr,
271 	&dev_attr_modalias.attr,
272 	NULL,
273 };
274 ATTRIBUTE_GROUPS(i3c_device);
275 
i3c_device_uevent(struct device * dev,struct kobj_uevent_env * env)276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277 {
278 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 	struct i3c_device_info devinfo;
280 	u16 manuf, part, ext;
281 
282 	i3c_device_get_info(i3cdev, &devinfo);
283 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 	part = I3C_PID_PART_ID(devinfo.pid);
285 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286 
287 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289 				      devinfo.dcr, manuf);
290 
291 	return add_uevent_var(env,
292 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 			      devinfo.dcr, manuf, part, ext);
294 }
295 
296 static const struct device_type i3c_device_type = {
297 	.groups	= i3c_device_groups,
298 	.uevent = i3c_device_uevent,
299 };
300 
i3c_device_match(struct device * dev,struct device_driver * drv)301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
302 {
303 	struct i3c_device *i3cdev;
304 	struct i3c_driver *i3cdrv;
305 
306 	if (dev->type != &i3c_device_type)
307 		return 0;
308 
309 	i3cdev = dev_to_i3cdev(dev);
310 	i3cdrv = drv_to_i3cdrv(drv);
311 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312 		return 1;
313 
314 	return 0;
315 }
316 
i3c_device_probe(struct device * dev)317 static int i3c_device_probe(struct device *dev)
318 {
319 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321 
322 	return driver->probe(i3cdev);
323 }
324 
i3c_device_remove(struct device * dev)325 static void i3c_device_remove(struct device *dev)
326 {
327 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
329 
330 	if (driver->remove)
331 		driver->remove(i3cdev);
332 
333 	i3c_device_free_ibi(i3cdev);
334 }
335 
336 struct bus_type i3c_bus_type = {
337 	.name = "i3c",
338 	.match = i3c_device_match,
339 	.probe = i3c_device_probe,
340 	.remove = i3c_device_remove,
341 };
342 
343 static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus * bus,u16 addr)344 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
345 {
346 	unsigned long status;
347 	int bitpos = addr * 2;
348 
349 	if (addr > I2C_MAX_ADDR)
350 		return I3C_ADDR_SLOT_RSVD;
351 
352 	status = bus->addrslots[bitpos / BITS_PER_LONG];
353 	status >>= bitpos % BITS_PER_LONG;
354 
355 	return status & I3C_ADDR_SLOT_STATUS_MASK;
356 }
357 
i3c_bus_set_addr_slot_status(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status)358 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
359 					 enum i3c_addr_slot_status status)
360 {
361 	int bitpos = addr * 2;
362 	unsigned long *ptr;
363 
364 	if (addr > I2C_MAX_ADDR)
365 		return;
366 
367 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
368 	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
369 						(bitpos % BITS_PER_LONG));
370 	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
371 }
372 
i3c_bus_dev_addr_is_avail(struct i3c_bus * bus,u8 addr)373 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
374 {
375 	enum i3c_addr_slot_status status;
376 
377 	status = i3c_bus_get_addr_slot_status(bus, addr);
378 
379 	return status == I3C_ADDR_SLOT_FREE;
380 }
381 
i3c_bus_get_free_addr(struct i3c_bus * bus,u8 start_addr)382 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
383 {
384 	enum i3c_addr_slot_status status;
385 	u8 addr;
386 
387 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
388 		status = i3c_bus_get_addr_slot_status(bus, addr);
389 		if (status == I3C_ADDR_SLOT_FREE)
390 			return addr;
391 	}
392 
393 	return -ENOMEM;
394 }
395 
i3c_bus_init_addrslots(struct i3c_bus * bus)396 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
397 {
398 	int i;
399 
400 	/* Addresses 0 to 7 are reserved. */
401 	for (i = 0; i < 8; i++)
402 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
403 
404 	/*
405 	 * Reserve broadcast address and all addresses that might collide
406 	 * with the broadcast address when facing a single bit error.
407 	 */
408 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
409 				     I3C_ADDR_SLOT_RSVD);
410 	for (i = 0; i < 7; i++)
411 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
412 					     I3C_ADDR_SLOT_RSVD);
413 }
414 
i3c_bus_cleanup(struct i3c_bus * i3cbus)415 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
416 {
417 	mutex_lock(&i3c_core_lock);
418 	idr_remove(&i3c_bus_idr, i3cbus->id);
419 	mutex_unlock(&i3c_core_lock);
420 }
421 
i3c_bus_init(struct i3c_bus * i3cbus)422 static int i3c_bus_init(struct i3c_bus *i3cbus)
423 {
424 	int ret;
425 
426 	init_rwsem(&i3cbus->lock);
427 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
428 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
429 	i3c_bus_init_addrslots(i3cbus);
430 	i3cbus->mode = I3C_BUS_MODE_PURE;
431 
432 	mutex_lock(&i3c_core_lock);
433 	ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
434 	mutex_unlock(&i3c_core_lock);
435 
436 	if (ret < 0)
437 		return ret;
438 
439 	i3cbus->id = ret;
440 
441 	return 0;
442 }
443 
444 static const char * const i3c_bus_mode_strings[] = {
445 	[I3C_BUS_MODE_PURE] = "pure",
446 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
447 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
448 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
449 };
450 
mode_show(struct device * dev,struct device_attribute * da,char * buf)451 static ssize_t mode_show(struct device *dev,
452 			 struct device_attribute *da,
453 			 char *buf)
454 {
455 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
456 	ssize_t ret;
457 
458 	i3c_bus_normaluse_lock(i3cbus);
459 	if (i3cbus->mode < 0 ||
460 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
461 	    !i3c_bus_mode_strings[i3cbus->mode])
462 		ret = sprintf(buf, "unknown\n");
463 	else
464 		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
465 	i3c_bus_normaluse_unlock(i3cbus);
466 
467 	return ret;
468 }
469 static DEVICE_ATTR_RO(mode);
470 
current_master_show(struct device * dev,struct device_attribute * da,char * buf)471 static ssize_t current_master_show(struct device *dev,
472 				   struct device_attribute *da,
473 				   char *buf)
474 {
475 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
476 	ssize_t ret;
477 
478 	i3c_bus_normaluse_lock(i3cbus);
479 	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
480 		      i3cbus->cur_master->info.pid);
481 	i3c_bus_normaluse_unlock(i3cbus);
482 
483 	return ret;
484 }
485 static DEVICE_ATTR_RO(current_master);
486 
i3c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)487 static ssize_t i3c_scl_frequency_show(struct device *dev,
488 				      struct device_attribute *da,
489 				      char *buf)
490 {
491 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
492 	ssize_t ret;
493 
494 	i3c_bus_normaluse_lock(i3cbus);
495 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
496 	i3c_bus_normaluse_unlock(i3cbus);
497 
498 	return ret;
499 }
500 static DEVICE_ATTR_RO(i3c_scl_frequency);
501 
i2c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)502 static ssize_t i2c_scl_frequency_show(struct device *dev,
503 				      struct device_attribute *da,
504 				      char *buf)
505 {
506 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
507 	ssize_t ret;
508 
509 	i3c_bus_normaluse_lock(i3cbus);
510 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
511 	i3c_bus_normaluse_unlock(i3cbus);
512 
513 	return ret;
514 }
515 static DEVICE_ATTR_RO(i2c_scl_frequency);
516 
517 static struct attribute *i3c_masterdev_attrs[] = {
518 	&dev_attr_mode.attr,
519 	&dev_attr_current_master.attr,
520 	&dev_attr_i3c_scl_frequency.attr,
521 	&dev_attr_i2c_scl_frequency.attr,
522 	&dev_attr_bcr.attr,
523 	&dev_attr_dcr.attr,
524 	&dev_attr_pid.attr,
525 	&dev_attr_dynamic_address.attr,
526 	&dev_attr_hdrcap.attr,
527 	NULL,
528 };
529 ATTRIBUTE_GROUPS(i3c_masterdev);
530 
i3c_masterdev_release(struct device * dev)531 static void i3c_masterdev_release(struct device *dev)
532 {
533 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
534 	struct i3c_bus *bus = dev_to_i3cbus(dev);
535 
536 	if (master->wq)
537 		destroy_workqueue(master->wq);
538 
539 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
540 	i3c_bus_cleanup(bus);
541 
542 	of_node_put(dev->of_node);
543 }
544 
545 static const struct device_type i3c_masterdev_type = {
546 	.groups	= i3c_masterdev_groups,
547 };
548 
i3c_bus_set_mode(struct i3c_bus * i3cbus,enum i3c_bus_mode mode,unsigned long max_i2c_scl_rate)549 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
550 			    unsigned long max_i2c_scl_rate)
551 {
552 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
553 
554 	i3cbus->mode = mode;
555 
556 	switch (i3cbus->mode) {
557 	case I3C_BUS_MODE_PURE:
558 		if (!i3cbus->scl_rate.i3c)
559 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
560 		break;
561 	case I3C_BUS_MODE_MIXED_FAST:
562 	case I3C_BUS_MODE_MIXED_LIMITED:
563 		if (!i3cbus->scl_rate.i3c)
564 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
565 		if (!i3cbus->scl_rate.i2c)
566 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
567 		break;
568 	case I3C_BUS_MODE_MIXED_SLOW:
569 		if (!i3cbus->scl_rate.i2c)
570 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
571 		if (!i3cbus->scl_rate.i3c ||
572 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
573 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
574 		break;
575 	default:
576 		return -EINVAL;
577 	}
578 
579 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
580 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
581 
582 	/*
583 	 * I3C/I2C frequency may have been overridden, check that user-provided
584 	 * values are not exceeding max possible frequency.
585 	 */
586 	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
587 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
588 		return -EINVAL;
589 
590 	return 0;
591 }
592 
593 static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter * adap)594 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
595 {
596 	return container_of(adap, struct i3c_master_controller, i2c);
597 }
598 
599 static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller * master)600 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
601 {
602 	return &master->i2c;
603 }
604 
i3c_master_free_i2c_dev(struct i2c_dev_desc * dev)605 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
606 {
607 	kfree(dev);
608 }
609 
610 static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller * master,const struct i2c_dev_boardinfo * boardinfo)611 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
612 			 const struct i2c_dev_boardinfo *boardinfo)
613 {
614 	struct i2c_dev_desc *dev;
615 
616 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
617 	if (!dev)
618 		return ERR_PTR(-ENOMEM);
619 
620 	dev->common.master = master;
621 	dev->boardinfo = boardinfo;
622 	dev->addr = boardinfo->base.addr;
623 	dev->lvr = boardinfo->lvr;
624 
625 	return dev;
626 }
627 
i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest * dest,u8 addr,u16 payloadlen)628 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
629 				   u16 payloadlen)
630 {
631 	dest->addr = addr;
632 	dest->payload.len = payloadlen;
633 	if (payloadlen)
634 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
635 	else
636 		dest->payload.data = NULL;
637 
638 	return dest->payload.data;
639 }
640 
i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest * dest)641 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
642 {
643 	kfree(dest->payload.data);
644 }
645 
i3c_ccc_cmd_init(struct i3c_ccc_cmd * cmd,bool rnw,u8 id,struct i3c_ccc_cmd_dest * dests,unsigned int ndests)646 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
647 			     struct i3c_ccc_cmd_dest *dests,
648 			     unsigned int ndests)
649 {
650 	cmd->rnw = rnw ? 1 : 0;
651 	cmd->id = id;
652 	cmd->dests = dests;
653 	cmd->ndests = ndests;
654 	cmd->err = I3C_ERROR_UNKNOWN;
655 }
656 
i3c_master_send_ccc_cmd_locked(struct i3c_master_controller * master,struct i3c_ccc_cmd * cmd)657 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
658 					  struct i3c_ccc_cmd *cmd)
659 {
660 	int ret;
661 
662 	if (!cmd || !master)
663 		return -EINVAL;
664 
665 	if (WARN_ON(master->init_done &&
666 		    !rwsem_is_locked(&master->bus.lock)))
667 		return -EINVAL;
668 
669 	if (!master->ops->send_ccc_cmd)
670 		return -ENOTSUPP;
671 
672 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
673 		return -EINVAL;
674 
675 	if (master->ops->supports_ccc_cmd &&
676 	    !master->ops->supports_ccc_cmd(master, cmd))
677 		return -ENOTSUPP;
678 
679 	ret = master->ops->send_ccc_cmd(master, cmd);
680 	if (ret) {
681 		if (cmd->err != I3C_ERROR_UNKNOWN)
682 			return cmd->err;
683 
684 		return ret;
685 	}
686 
687 	return 0;
688 }
689 
690 static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller * master,u16 addr)691 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
692 				u16 addr)
693 {
694 	struct i2c_dev_desc *dev;
695 
696 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
697 		if (dev->boardinfo->base.addr == addr)
698 			return dev;
699 	}
700 
701 	return NULL;
702 }
703 
704 /**
705  * i3c_master_get_free_addr() - get a free address on the bus
706  * @master: I3C master object
707  * @start_addr: where to start searching
708  *
709  * This function must be called with the bus lock held in write mode.
710  *
711  * Return: the first free address starting at @start_addr (included) or -ENOMEM
712  * if there's no more address available.
713  */
i3c_master_get_free_addr(struct i3c_master_controller * master,u8 start_addr)714 int i3c_master_get_free_addr(struct i3c_master_controller *master,
715 			     u8 start_addr)
716 {
717 	return i3c_bus_get_free_addr(&master->bus, start_addr);
718 }
719 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
720 
i3c_device_release(struct device * dev)721 static void i3c_device_release(struct device *dev)
722 {
723 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
724 
725 	WARN_ON(i3cdev->desc);
726 
727 	of_node_put(i3cdev->dev.of_node);
728 	kfree(i3cdev);
729 }
730 
i3c_master_free_i3c_dev(struct i3c_dev_desc * dev)731 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
732 {
733 	kfree(dev);
734 }
735 
736 static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller * master,const struct i3c_device_info * info)737 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
738 			 const struct i3c_device_info *info)
739 {
740 	struct i3c_dev_desc *dev;
741 
742 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
743 	if (!dev)
744 		return ERR_PTR(-ENOMEM);
745 
746 	dev->common.master = master;
747 	dev->info = *info;
748 	mutex_init(&dev->ibi_lock);
749 
750 	return dev;
751 }
752 
i3c_master_rstdaa_locked(struct i3c_master_controller * master,u8 addr)753 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
754 				    u8 addr)
755 {
756 	enum i3c_addr_slot_status addrstat;
757 	struct i3c_ccc_cmd_dest dest;
758 	struct i3c_ccc_cmd cmd;
759 	int ret;
760 
761 	if (!master)
762 		return -EINVAL;
763 
764 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
765 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
766 		return -EINVAL;
767 
768 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
769 	i3c_ccc_cmd_init(&cmd, false,
770 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
771 			 &dest, 1);
772 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
773 	i3c_ccc_cmd_dest_cleanup(&dest);
774 
775 	return ret;
776 }
777 
778 /**
779  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
780  *				procedure
781  * @master: master used to send frames on the bus
782  *
783  * Send a ENTDAA CCC command to start a DAA procedure.
784  *
785  * Note that this function only sends the ENTDAA CCC command, all the logic
786  * behind dynamic address assignment has to be handled in the I3C master
787  * driver.
788  *
789  * This function must be called with the bus lock held in write mode.
790  *
791  * Return: 0 in case of success, a positive I3C error code if the error is
792  * one of the official Mx error codes, and a negative error code otherwise.
793  */
i3c_master_entdaa_locked(struct i3c_master_controller * master)794 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
795 {
796 	struct i3c_ccc_cmd_dest dest;
797 	struct i3c_ccc_cmd cmd;
798 	int ret;
799 
800 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
801 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
802 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
803 	i3c_ccc_cmd_dest_cleanup(&dest);
804 
805 	return ret;
806 }
807 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
808 
i3c_master_enec_disec_locked(struct i3c_master_controller * master,u8 addr,bool enable,u8 evts)809 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
810 					u8 addr, bool enable, u8 evts)
811 {
812 	struct i3c_ccc_events *events;
813 	struct i3c_ccc_cmd_dest dest;
814 	struct i3c_ccc_cmd cmd;
815 	int ret;
816 
817 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
818 	if (!events)
819 		return -ENOMEM;
820 
821 	events->events = evts;
822 	i3c_ccc_cmd_init(&cmd, false,
823 			 enable ?
824 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
825 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
826 			 &dest, 1);
827 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
828 	i3c_ccc_cmd_dest_cleanup(&dest);
829 
830 	return ret;
831 }
832 
833 /**
834  * i3c_master_disec_locked() - send a DISEC CCC command
835  * @master: master used to send frames on the bus
836  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
837  * @evts: events to disable
838  *
839  * Send a DISEC CCC command to disable some or all events coming from a
840  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
841  *
842  * This function must be called with the bus lock held in write mode.
843  *
844  * Return: 0 in case of success, a positive I3C error code if the error is
845  * one of the official Mx error codes, and a negative error code otherwise.
846  */
i3c_master_disec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)847 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
848 			    u8 evts)
849 {
850 	return i3c_master_enec_disec_locked(master, addr, false, evts);
851 }
852 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
853 
854 /**
855  * i3c_master_enec_locked() - send an ENEC CCC command
856  * @master: master used to send frames on the bus
857  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
858  * @evts: events to disable
859  *
860  * Sends an ENEC CCC command to enable some or all events coming from a
861  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
862  *
863  * This function must be called with the bus lock held in write mode.
864  *
865  * Return: 0 in case of success, a positive I3C error code if the error is
866  * one of the official Mx error codes, and a negative error code otherwise.
867  */
i3c_master_enec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)868 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
869 			   u8 evts)
870 {
871 	return i3c_master_enec_disec_locked(master, addr, true, evts);
872 }
873 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
874 
875 /**
876  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
877  * @master: master used to send frames on the bus
878  *
879  * Send a DEFSLVS CCC command containing all the devices known to the @master.
880  * This is useful when you have secondary masters on the bus to propagate
881  * device information.
882  *
883  * This should be called after all I3C devices have been discovered (in other
884  * words, after the DAA procedure has finished) and instantiated in
885  * &i3c_master_controller_ops->bus_init().
886  * It should also be called if a master ACKed an Hot-Join request and assigned
887  * a dynamic address to the device joining the bus.
888  *
889  * This function must be called with the bus lock held in write mode.
890  *
891  * Return: 0 in case of success, a positive I3C error code if the error is
892  * one of the official Mx error codes, and a negative error code otherwise.
893  */
i3c_master_defslvs_locked(struct i3c_master_controller * master)894 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
895 {
896 	struct i3c_ccc_defslvs *defslvs;
897 	struct i3c_ccc_dev_desc *desc;
898 	struct i3c_ccc_cmd_dest dest;
899 	struct i3c_dev_desc *i3cdev;
900 	struct i2c_dev_desc *i2cdev;
901 	struct i3c_ccc_cmd cmd;
902 	struct i3c_bus *bus;
903 	bool send = false;
904 	int ndevs = 0, ret;
905 
906 	if (!master)
907 		return -EINVAL;
908 
909 	bus = i3c_master_get_bus(master);
910 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
911 		ndevs++;
912 
913 		if (i3cdev == master->this)
914 			continue;
915 
916 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
917 		    I3C_BCR_I3C_MASTER)
918 			send = true;
919 	}
920 
921 	/* No other master on the bus, skip DEFSLVS. */
922 	if (!send)
923 		return 0;
924 
925 	i3c_bus_for_each_i2cdev(bus, i2cdev)
926 		ndevs++;
927 
928 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
929 					struct_size(defslvs, slaves,
930 						    ndevs - 1));
931 	if (!defslvs)
932 		return -ENOMEM;
933 
934 	defslvs->count = ndevs;
935 	defslvs->master.bcr = master->this->info.bcr;
936 	defslvs->master.dcr = master->this->info.dcr;
937 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
938 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
939 
940 	desc = defslvs->slaves;
941 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
942 		desc->lvr = i2cdev->lvr;
943 		desc->static_addr = i2cdev->addr << 1;
944 		desc++;
945 	}
946 
947 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
948 		/* Skip the I3C dev representing this master. */
949 		if (i3cdev == master->this)
950 			continue;
951 
952 		desc->bcr = i3cdev->info.bcr;
953 		desc->dcr = i3cdev->info.dcr;
954 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
955 		desc->static_addr = i3cdev->info.static_addr << 1;
956 		desc++;
957 	}
958 
959 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
960 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
961 	i3c_ccc_cmd_dest_cleanup(&dest);
962 
963 	return ret;
964 }
965 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
966 
i3c_master_setda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr,bool setdasa)967 static int i3c_master_setda_locked(struct i3c_master_controller *master,
968 				   u8 oldaddr, u8 newaddr, bool setdasa)
969 {
970 	struct i3c_ccc_cmd_dest dest;
971 	struct i3c_ccc_setda *setda;
972 	struct i3c_ccc_cmd cmd;
973 	int ret;
974 
975 	if (!oldaddr || !newaddr)
976 		return -EINVAL;
977 
978 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
979 	if (!setda)
980 		return -ENOMEM;
981 
982 	setda->addr = newaddr << 1;
983 	i3c_ccc_cmd_init(&cmd, false,
984 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
985 			 &dest, 1);
986 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
987 	i3c_ccc_cmd_dest_cleanup(&dest);
988 
989 	return ret;
990 }
991 
i3c_master_setdasa_locked(struct i3c_master_controller * master,u8 static_addr,u8 dyn_addr)992 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
993 				     u8 static_addr, u8 dyn_addr)
994 {
995 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
996 }
997 
i3c_master_setnewda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr)998 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
999 				      u8 oldaddr, u8 newaddr)
1000 {
1001 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1002 }
1003 
i3c_master_getmrl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1004 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1005 				    struct i3c_device_info *info)
1006 {
1007 	struct i3c_ccc_cmd_dest dest;
1008 	struct i3c_ccc_mrl *mrl;
1009 	struct i3c_ccc_cmd cmd;
1010 	int ret;
1011 
1012 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1013 	if (!mrl)
1014 		return -ENOMEM;
1015 
1016 	/*
1017 	 * When the device does not have IBI payload GETMRL only returns 2
1018 	 * bytes of data.
1019 	 */
1020 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1021 		dest.payload.len -= 1;
1022 
1023 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1024 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1025 	if (ret)
1026 		goto out;
1027 
1028 	switch (dest.payload.len) {
1029 	case 3:
1030 		info->max_ibi_len = mrl->ibi_len;
1031 		fallthrough;
1032 	case 2:
1033 		info->max_read_len = be16_to_cpu(mrl->read_len);
1034 		break;
1035 	default:
1036 		ret = -EIO;
1037 		goto out;
1038 	}
1039 
1040 out:
1041 	i3c_ccc_cmd_dest_cleanup(&dest);
1042 
1043 	return ret;
1044 }
1045 
i3c_master_getmwl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1046 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1047 				    struct i3c_device_info *info)
1048 {
1049 	struct i3c_ccc_cmd_dest dest;
1050 	struct i3c_ccc_mwl *mwl;
1051 	struct i3c_ccc_cmd cmd;
1052 	int ret;
1053 
1054 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1055 	if (!mwl)
1056 		return -ENOMEM;
1057 
1058 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1059 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1060 	if (ret)
1061 		goto out;
1062 
1063 	if (dest.payload.len != sizeof(*mwl)) {
1064 		ret = -EIO;
1065 		goto out;
1066 	}
1067 
1068 	info->max_write_len = be16_to_cpu(mwl->len);
1069 
1070 out:
1071 	i3c_ccc_cmd_dest_cleanup(&dest);
1072 
1073 	return ret;
1074 }
1075 
i3c_master_getmxds_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1076 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1077 				     struct i3c_device_info *info)
1078 {
1079 	struct i3c_ccc_getmxds *getmaxds;
1080 	struct i3c_ccc_cmd_dest dest;
1081 	struct i3c_ccc_cmd cmd;
1082 	int ret;
1083 
1084 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1085 					 sizeof(*getmaxds));
1086 	if (!getmaxds)
1087 		return -ENOMEM;
1088 
1089 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1090 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1091 	if (ret)
1092 		goto out;
1093 
1094 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1095 		ret = -EIO;
1096 		goto out;
1097 	}
1098 
1099 	info->max_read_ds = getmaxds->maxrd;
1100 	info->max_write_ds = getmaxds->maxwr;
1101 	if (dest.payload.len == 5)
1102 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1103 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1104 					    ((u32)getmaxds->maxrdturn[2] << 16);
1105 
1106 out:
1107 	i3c_ccc_cmd_dest_cleanup(&dest);
1108 
1109 	return ret;
1110 }
1111 
i3c_master_gethdrcap_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1112 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1113 				       struct i3c_device_info *info)
1114 {
1115 	struct i3c_ccc_gethdrcap *gethdrcap;
1116 	struct i3c_ccc_cmd_dest dest;
1117 	struct i3c_ccc_cmd cmd;
1118 	int ret;
1119 
1120 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1121 					  sizeof(*gethdrcap));
1122 	if (!gethdrcap)
1123 		return -ENOMEM;
1124 
1125 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1126 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1127 	if (ret)
1128 		goto out;
1129 
1130 	if (dest.payload.len != 1) {
1131 		ret = -EIO;
1132 		goto out;
1133 	}
1134 
1135 	info->hdr_cap = gethdrcap->modes;
1136 
1137 out:
1138 	i3c_ccc_cmd_dest_cleanup(&dest);
1139 
1140 	return ret;
1141 }
1142 
i3c_master_getpid_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1143 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1144 				    struct i3c_device_info *info)
1145 {
1146 	struct i3c_ccc_getpid *getpid;
1147 	struct i3c_ccc_cmd_dest dest;
1148 	struct i3c_ccc_cmd cmd;
1149 	int ret, i;
1150 
1151 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1152 	if (!getpid)
1153 		return -ENOMEM;
1154 
1155 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1156 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1157 	if (ret)
1158 		goto out;
1159 
1160 	info->pid = 0;
1161 	for (i = 0; i < sizeof(getpid->pid); i++) {
1162 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1163 
1164 		info->pid |= (u64)getpid->pid[i] << sft;
1165 	}
1166 
1167 out:
1168 	i3c_ccc_cmd_dest_cleanup(&dest);
1169 
1170 	return ret;
1171 }
1172 
i3c_master_getbcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1173 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1174 				    struct i3c_device_info *info)
1175 {
1176 	struct i3c_ccc_getbcr *getbcr;
1177 	struct i3c_ccc_cmd_dest dest;
1178 	struct i3c_ccc_cmd cmd;
1179 	int ret;
1180 
1181 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1182 	if (!getbcr)
1183 		return -ENOMEM;
1184 
1185 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1186 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1187 	if (ret)
1188 		goto out;
1189 
1190 	info->bcr = getbcr->bcr;
1191 
1192 out:
1193 	i3c_ccc_cmd_dest_cleanup(&dest);
1194 
1195 	return ret;
1196 }
1197 
i3c_master_getdcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1198 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1199 				    struct i3c_device_info *info)
1200 {
1201 	struct i3c_ccc_getdcr *getdcr;
1202 	struct i3c_ccc_cmd_dest dest;
1203 	struct i3c_ccc_cmd cmd;
1204 	int ret;
1205 
1206 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1207 	if (!getdcr)
1208 		return -ENOMEM;
1209 
1210 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1211 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1212 	if (ret)
1213 		goto out;
1214 
1215 	info->dcr = getdcr->dcr;
1216 
1217 out:
1218 	i3c_ccc_cmd_dest_cleanup(&dest);
1219 
1220 	return ret;
1221 }
1222 
i3c_master_retrieve_dev_info(struct i3c_dev_desc * dev)1223 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1224 {
1225 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1226 	enum i3c_addr_slot_status slot_status;
1227 	int ret;
1228 
1229 	if (!dev->info.dyn_addr)
1230 		return -EINVAL;
1231 
1232 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1233 						   dev->info.dyn_addr);
1234 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1235 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1236 		return -EINVAL;
1237 
1238 	ret = i3c_master_getpid_locked(master, &dev->info);
1239 	if (ret)
1240 		return ret;
1241 
1242 	ret = i3c_master_getbcr_locked(master, &dev->info);
1243 	if (ret)
1244 		return ret;
1245 
1246 	ret = i3c_master_getdcr_locked(master, &dev->info);
1247 	if (ret)
1248 		return ret;
1249 
1250 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1251 		ret = i3c_master_getmxds_locked(master, &dev->info);
1252 		if (ret)
1253 			return ret;
1254 	}
1255 
1256 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1257 		dev->info.max_ibi_len = 1;
1258 
1259 	i3c_master_getmrl_locked(master, &dev->info);
1260 	i3c_master_getmwl_locked(master, &dev->info);
1261 
1262 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1263 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1264 		if (ret)
1265 			return ret;
1266 	}
1267 
1268 	return 0;
1269 }
1270 
i3c_master_put_i3c_addrs(struct i3c_dev_desc * dev)1271 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1272 {
1273 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1274 
1275 	if (dev->info.static_addr)
1276 		i3c_bus_set_addr_slot_status(&master->bus,
1277 					     dev->info.static_addr,
1278 					     I3C_ADDR_SLOT_FREE);
1279 
1280 	if (dev->info.dyn_addr)
1281 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1282 					     I3C_ADDR_SLOT_FREE);
1283 
1284 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1285 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1286 					     I3C_ADDR_SLOT_FREE);
1287 }
1288 
i3c_master_get_i3c_addrs(struct i3c_dev_desc * dev)1289 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1290 {
1291 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1292 	enum i3c_addr_slot_status status;
1293 
1294 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1295 		return 0;
1296 
1297 	if (dev->info.static_addr) {
1298 		status = i3c_bus_get_addr_slot_status(&master->bus,
1299 						      dev->info.static_addr);
1300 		if (status != I3C_ADDR_SLOT_FREE)
1301 			return -EBUSY;
1302 
1303 		i3c_bus_set_addr_slot_status(&master->bus,
1304 					     dev->info.static_addr,
1305 					     I3C_ADDR_SLOT_I3C_DEV);
1306 	}
1307 
1308 	/*
1309 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1310 	 * trying to apply a pre-reserved dynamic address, we should not try
1311 	 * to reserve the address slot a second time.
1312 	 */
1313 	if (dev->info.dyn_addr &&
1314 	    (!dev->boardinfo ||
1315 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1316 		status = i3c_bus_get_addr_slot_status(&master->bus,
1317 						      dev->info.dyn_addr);
1318 		if (status != I3C_ADDR_SLOT_FREE)
1319 			goto err_release_static_addr;
1320 
1321 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1322 					     I3C_ADDR_SLOT_I3C_DEV);
1323 	}
1324 
1325 	return 0;
1326 
1327 err_release_static_addr:
1328 	if (dev->info.static_addr)
1329 		i3c_bus_set_addr_slot_status(&master->bus,
1330 					     dev->info.static_addr,
1331 					     I3C_ADDR_SLOT_FREE);
1332 
1333 	return -EBUSY;
1334 }
1335 
i3c_master_attach_i3c_dev(struct i3c_master_controller * master,struct i3c_dev_desc * dev)1336 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1337 				     struct i3c_dev_desc *dev)
1338 {
1339 	int ret;
1340 
1341 	/*
1342 	 * We don't attach devices to the controller until they are
1343 	 * addressable on the bus.
1344 	 */
1345 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1346 		return 0;
1347 
1348 	ret = i3c_master_get_i3c_addrs(dev);
1349 	if (ret)
1350 		return ret;
1351 
1352 	/* Do not attach the master device itself. */
1353 	if (master->this != dev && master->ops->attach_i3c_dev) {
1354 		ret = master->ops->attach_i3c_dev(dev);
1355 		if (ret) {
1356 			i3c_master_put_i3c_addrs(dev);
1357 			return ret;
1358 		}
1359 	}
1360 
1361 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1362 
1363 	return 0;
1364 }
1365 
i3c_master_reattach_i3c_dev(struct i3c_dev_desc * dev,u8 old_dyn_addr)1366 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1367 				       u8 old_dyn_addr)
1368 {
1369 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1370 	enum i3c_addr_slot_status status;
1371 	int ret;
1372 
1373 	if (dev->info.dyn_addr != old_dyn_addr &&
1374 	    (!dev->boardinfo ||
1375 	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1376 		status = i3c_bus_get_addr_slot_status(&master->bus,
1377 						      dev->info.dyn_addr);
1378 		if (status != I3C_ADDR_SLOT_FREE)
1379 			return -EBUSY;
1380 		i3c_bus_set_addr_slot_status(&master->bus,
1381 					     dev->info.dyn_addr,
1382 					     I3C_ADDR_SLOT_I3C_DEV);
1383 	}
1384 
1385 	if (master->ops->reattach_i3c_dev) {
1386 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1387 		if (ret) {
1388 			i3c_master_put_i3c_addrs(dev);
1389 			return ret;
1390 		}
1391 	}
1392 
1393 	return 0;
1394 }
1395 
i3c_master_detach_i3c_dev(struct i3c_dev_desc * dev)1396 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1397 {
1398 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1399 
1400 	/* Do not detach the master device itself. */
1401 	if (master->this != dev && master->ops->detach_i3c_dev)
1402 		master->ops->detach_i3c_dev(dev);
1403 
1404 	i3c_master_put_i3c_addrs(dev);
1405 	list_del(&dev->common.node);
1406 }
1407 
i3c_master_attach_i2c_dev(struct i3c_master_controller * master,struct i2c_dev_desc * dev)1408 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1409 				     struct i2c_dev_desc *dev)
1410 {
1411 	int ret;
1412 
1413 	if (master->ops->attach_i2c_dev) {
1414 		ret = master->ops->attach_i2c_dev(dev);
1415 		if (ret)
1416 			return ret;
1417 	}
1418 
1419 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1420 
1421 	return 0;
1422 }
1423 
i3c_master_detach_i2c_dev(struct i2c_dev_desc * dev)1424 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1425 {
1426 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1427 
1428 	list_del(&dev->common.node);
1429 
1430 	if (master->ops->detach_i2c_dev)
1431 		master->ops->detach_i2c_dev(dev);
1432 }
1433 
i3c_master_early_i3c_dev_add(struct i3c_master_controller * master,struct i3c_dev_boardinfo * boardinfo)1434 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1435 					  struct i3c_dev_boardinfo *boardinfo)
1436 {
1437 	struct i3c_device_info info = {
1438 		.static_addr = boardinfo->static_addr,
1439 	};
1440 	struct i3c_dev_desc *i3cdev;
1441 	int ret;
1442 
1443 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1444 	if (IS_ERR(i3cdev))
1445 		return -ENOMEM;
1446 
1447 	i3cdev->boardinfo = boardinfo;
1448 
1449 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1450 	if (ret)
1451 		goto err_free_dev;
1452 
1453 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1454 					i3cdev->boardinfo->init_dyn_addr);
1455 	if (ret)
1456 		goto err_detach_dev;
1457 
1458 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1459 	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1460 	if (ret)
1461 		goto err_rstdaa;
1462 
1463 	ret = i3c_master_retrieve_dev_info(i3cdev);
1464 	if (ret)
1465 		goto err_rstdaa;
1466 
1467 	return 0;
1468 
1469 err_rstdaa:
1470 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1471 err_detach_dev:
1472 	i3c_master_detach_i3c_dev(i3cdev);
1473 err_free_dev:
1474 	i3c_master_free_i3c_dev(i3cdev);
1475 
1476 	return ret;
1477 }
1478 
1479 static void
i3c_master_register_new_i3c_devs(struct i3c_master_controller * master)1480 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1481 {
1482 	struct i3c_dev_desc *desc;
1483 	int ret;
1484 
1485 	if (!master->init_done)
1486 		return;
1487 
1488 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1489 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1490 			continue;
1491 
1492 		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1493 		if (!desc->dev)
1494 			continue;
1495 
1496 		desc->dev->bus = &master->bus;
1497 		desc->dev->desc = desc;
1498 		desc->dev->dev.parent = &master->dev;
1499 		desc->dev->dev.type = &i3c_device_type;
1500 		desc->dev->dev.bus = &i3c_bus_type;
1501 		desc->dev->dev.release = i3c_device_release;
1502 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1503 			     desc->info.pid);
1504 
1505 		if (desc->boardinfo)
1506 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1507 
1508 		ret = device_register(&desc->dev->dev);
1509 		if (ret) {
1510 			dev_err(&master->dev,
1511 				"Failed to add I3C device (err = %d)\n", ret);
1512 			put_device(&desc->dev->dev);
1513 		}
1514 	}
1515 }
1516 
1517 /**
1518  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1519  * @master: master doing the DAA
1520  *
1521  * This function is instantiating an I3C device object and adding it to the
1522  * I3C device list. All device information are automatically retrieved using
1523  * standard CCC commands.
1524  *
1525  * The I3C device object is returned in case the master wants to attach
1526  * private data to it using i3c_dev_set_master_data().
1527  *
1528  * This function must be called with the bus lock held in write mode.
1529  *
1530  * Return: a 0 in case of success, an negative error code otherwise.
1531  */
i3c_master_do_daa(struct i3c_master_controller * master)1532 int i3c_master_do_daa(struct i3c_master_controller *master)
1533 {
1534 	int ret;
1535 
1536 	i3c_bus_maintenance_lock(&master->bus);
1537 	ret = master->ops->do_daa(master);
1538 	i3c_bus_maintenance_unlock(&master->bus);
1539 
1540 	if (ret)
1541 		return ret;
1542 
1543 	i3c_bus_normaluse_lock(&master->bus);
1544 	i3c_master_register_new_i3c_devs(master);
1545 	i3c_bus_normaluse_unlock(&master->bus);
1546 
1547 	return 0;
1548 }
1549 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1550 
1551 /**
1552  * i3c_master_set_info() - set master device information
1553  * @master: master used to send frames on the bus
1554  * @info: I3C device information
1555  *
1556  * Set master device info. This should be called from
1557  * &i3c_master_controller_ops->bus_init().
1558  *
1559  * Not all &i3c_device_info fields are meaningful for a master device.
1560  * Here is a list of fields that should be properly filled:
1561  *
1562  * - &i3c_device_info->dyn_addr
1563  * - &i3c_device_info->bcr
1564  * - &i3c_device_info->dcr
1565  * - &i3c_device_info->pid
1566  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1567  *   &i3c_device_info->bcr
1568  *
1569  * This function must be called with the bus lock held in maintenance mode.
1570  *
1571  * Return: 0 if @info contains valid information (not every piece of
1572  * information can be checked, but we can at least make sure @info->dyn_addr
1573  * and @info->bcr are correct), -EINVAL otherwise.
1574  */
i3c_master_set_info(struct i3c_master_controller * master,const struct i3c_device_info * info)1575 int i3c_master_set_info(struct i3c_master_controller *master,
1576 			const struct i3c_device_info *info)
1577 {
1578 	struct i3c_dev_desc *i3cdev;
1579 	int ret;
1580 
1581 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1582 		return -EINVAL;
1583 
1584 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1585 	    master->secondary)
1586 		return -EINVAL;
1587 
1588 	if (master->this)
1589 		return -EINVAL;
1590 
1591 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1592 	if (IS_ERR(i3cdev))
1593 		return PTR_ERR(i3cdev);
1594 
1595 	master->this = i3cdev;
1596 	master->bus.cur_master = master->this;
1597 
1598 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1599 	if (ret)
1600 		goto err_free_dev;
1601 
1602 	return 0;
1603 
1604 err_free_dev:
1605 	i3c_master_free_i3c_dev(i3cdev);
1606 
1607 	return ret;
1608 }
1609 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1610 
i3c_master_detach_free_devs(struct i3c_master_controller * master)1611 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1612 {
1613 	struct i3c_dev_desc *i3cdev, *i3ctmp;
1614 	struct i2c_dev_desc *i2cdev, *i2ctmp;
1615 
1616 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1617 				 common.node) {
1618 		i3c_master_detach_i3c_dev(i3cdev);
1619 
1620 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1621 			i3c_bus_set_addr_slot_status(&master->bus,
1622 					i3cdev->boardinfo->init_dyn_addr,
1623 					I3C_ADDR_SLOT_FREE);
1624 
1625 		i3c_master_free_i3c_dev(i3cdev);
1626 	}
1627 
1628 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1629 				 common.node) {
1630 		i3c_master_detach_i2c_dev(i2cdev);
1631 		i3c_bus_set_addr_slot_status(&master->bus,
1632 					     i2cdev->addr,
1633 					     I3C_ADDR_SLOT_FREE);
1634 		i3c_master_free_i2c_dev(i2cdev);
1635 	}
1636 }
1637 
1638 /**
1639  * i3c_master_bus_init() - initialize an I3C bus
1640  * @master: main master initializing the bus
1641  *
1642  * This function is following all initialisation steps described in the I3C
1643  * specification:
1644  *
1645  * 1. Attach I2C devs to the master so that the master can fill its internal
1646  *    device table appropriately
1647  *
1648  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1649  *    the master controller. That's usually where the bus mode is selected
1650  *    (pure bus or mixed fast/slow bus)
1651  *
1652  * 3. Instruct all devices on the bus to drop their dynamic address. This is
1653  *    particularly important when the bus was previously configured by someone
1654  *    else (for example the bootloader)
1655  *
1656  * 4. Disable all slave events.
1657  *
1658  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1659  *    also have static_addr, try to pre-assign dynamic addresses requested by
1660  *    the FW with SETDASA and attach corresponding statically defined I3C
1661  *    devices to the master.
1662  *
1663  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1664  *    remaining I3C devices
1665  *
1666  * Once this is done, all I3C and I2C devices should be usable.
1667  *
1668  * Return: a 0 in case of success, an negative error code otherwise.
1669  */
i3c_master_bus_init(struct i3c_master_controller * master)1670 static int i3c_master_bus_init(struct i3c_master_controller *master)
1671 {
1672 	enum i3c_addr_slot_status status;
1673 	struct i2c_dev_boardinfo *i2cboardinfo;
1674 	struct i3c_dev_boardinfo *i3cboardinfo;
1675 	struct i2c_dev_desc *i2cdev;
1676 	int ret;
1677 
1678 	/*
1679 	 * First attach all devices with static definitions provided by the
1680 	 * FW.
1681 	 */
1682 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1683 		status = i3c_bus_get_addr_slot_status(&master->bus,
1684 						      i2cboardinfo->base.addr);
1685 		if (status != I3C_ADDR_SLOT_FREE) {
1686 			ret = -EBUSY;
1687 			goto err_detach_devs;
1688 		}
1689 
1690 		i3c_bus_set_addr_slot_status(&master->bus,
1691 					     i2cboardinfo->base.addr,
1692 					     I3C_ADDR_SLOT_I2C_DEV);
1693 
1694 		i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1695 		if (IS_ERR(i2cdev)) {
1696 			ret = PTR_ERR(i2cdev);
1697 			goto err_detach_devs;
1698 		}
1699 
1700 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1701 		if (ret) {
1702 			i3c_master_free_i2c_dev(i2cdev);
1703 			goto err_detach_devs;
1704 		}
1705 	}
1706 
1707 	/*
1708 	 * Now execute the controller specific ->bus_init() routine, which
1709 	 * might configure its internal logic to match the bus limitations.
1710 	 */
1711 	ret = master->ops->bus_init(master);
1712 	if (ret)
1713 		goto err_detach_devs;
1714 
1715 	/*
1716 	 * The master device should have been instantiated in ->bus_init(),
1717 	 * complain if this was not the case.
1718 	 */
1719 	if (!master->this) {
1720 		dev_err(&master->dev,
1721 			"master_set_info() was not called in ->bus_init()\n");
1722 		ret = -EINVAL;
1723 		goto err_bus_cleanup;
1724 	}
1725 
1726 	/*
1727 	 * Reset all dynamic address that may have been assigned before
1728 	 * (assigned by the bootloader for example).
1729 	 */
1730 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1731 	if (ret && ret != I3C_ERROR_M2)
1732 		goto err_bus_cleanup;
1733 
1734 	/* Disable all slave events before starting DAA. */
1735 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1736 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1737 				      I3C_CCC_EVENT_HJ);
1738 	if (ret && ret != I3C_ERROR_M2)
1739 		goto err_bus_cleanup;
1740 
1741 	/*
1742 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1743 	 * address and retrieve device information if needed.
1744 	 * In case pre-assign dynamic address fails, setting dynamic address to
1745 	 * the requested init_dyn_addr is retried after DAA is done in
1746 	 * i3c_master_add_i3c_dev_locked().
1747 	 */
1748 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1749 
1750 		/*
1751 		 * We don't reserve a dynamic address for devices that
1752 		 * don't explicitly request one.
1753 		 */
1754 		if (!i3cboardinfo->init_dyn_addr)
1755 			continue;
1756 
1757 		ret = i3c_bus_get_addr_slot_status(&master->bus,
1758 						   i3cboardinfo->init_dyn_addr);
1759 		if (ret != I3C_ADDR_SLOT_FREE) {
1760 			ret = -EBUSY;
1761 			goto err_rstdaa;
1762 		}
1763 
1764 		i3c_bus_set_addr_slot_status(&master->bus,
1765 					     i3cboardinfo->init_dyn_addr,
1766 					     I3C_ADDR_SLOT_I3C_DEV);
1767 
1768 		/*
1769 		 * Only try to create/attach devices that have a static
1770 		 * address. Other devices will be created/attached when
1771 		 * DAA happens, and the requested dynamic address will
1772 		 * be set using SETNEWDA once those devices become
1773 		 * addressable.
1774 		 */
1775 
1776 		if (i3cboardinfo->static_addr)
1777 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1778 	}
1779 
1780 	ret = i3c_master_do_daa(master);
1781 	if (ret)
1782 		goto err_rstdaa;
1783 
1784 	return 0;
1785 
1786 err_rstdaa:
1787 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1788 
1789 err_bus_cleanup:
1790 	if (master->ops->bus_cleanup)
1791 		master->ops->bus_cleanup(master);
1792 
1793 err_detach_devs:
1794 	i3c_master_detach_free_devs(master);
1795 
1796 	return ret;
1797 }
1798 
i3c_master_bus_cleanup(struct i3c_master_controller * master)1799 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1800 {
1801 	if (master->ops->bus_cleanup)
1802 		master->ops->bus_cleanup(master);
1803 
1804 	i3c_master_detach_free_devs(master);
1805 }
1806 
i3c_master_attach_boardinfo(struct i3c_dev_desc * i3cdev)1807 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1808 {
1809 	struct i3c_master_controller *master = i3cdev->common.master;
1810 	struct i3c_dev_boardinfo *i3cboardinfo;
1811 
1812 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1813 		if (i3cdev->info.pid != i3cboardinfo->pid)
1814 			continue;
1815 
1816 		i3cdev->boardinfo = i3cboardinfo;
1817 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1818 		return;
1819 	}
1820 }
1821 
1822 static struct i3c_dev_desc *
i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc * refdev)1823 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1824 {
1825 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1826 	struct i3c_dev_desc *i3cdev;
1827 
1828 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1829 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1830 			return i3cdev;
1831 	}
1832 
1833 	return NULL;
1834 }
1835 
1836 /**
1837  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1838  * @master: master used to send frames on the bus
1839  * @addr: I3C slave dynamic address assigned to the device
1840  *
1841  * This function is instantiating an I3C device object and adding it to the
1842  * I3C device list. All device information are automatically retrieved using
1843  * standard CCC commands.
1844  *
1845  * The I3C device object is returned in case the master wants to attach
1846  * private data to it using i3c_dev_set_master_data().
1847  *
1848  * This function must be called with the bus lock held in write mode.
1849  *
1850  * Return: a 0 in case of success, an negative error code otherwise.
1851  */
i3c_master_add_i3c_dev_locked(struct i3c_master_controller * master,u8 addr)1852 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1853 				  u8 addr)
1854 {
1855 	struct i3c_device_info info = { .dyn_addr = addr };
1856 	struct i3c_dev_desc *newdev, *olddev;
1857 	u8 old_dyn_addr = addr, expected_dyn_addr;
1858 	struct i3c_ibi_setup ibireq = { };
1859 	bool enable_ibi = false;
1860 	int ret;
1861 
1862 	if (!master)
1863 		return -EINVAL;
1864 
1865 	newdev = i3c_master_alloc_i3c_dev(master, &info);
1866 	if (IS_ERR(newdev))
1867 		return PTR_ERR(newdev);
1868 
1869 	ret = i3c_master_attach_i3c_dev(master, newdev);
1870 	if (ret)
1871 		goto err_free_dev;
1872 
1873 	ret = i3c_master_retrieve_dev_info(newdev);
1874 	if (ret)
1875 		goto err_detach_dev;
1876 
1877 	i3c_master_attach_boardinfo(newdev);
1878 
1879 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1880 	if (olddev) {
1881 		newdev->dev = olddev->dev;
1882 		if (newdev->dev)
1883 			newdev->dev->desc = newdev;
1884 
1885 		/*
1886 		 * We need to restore the IBI state too, so let's save the
1887 		 * IBI information and try to restore them after olddev has
1888 		 * been detached+released and its IBI has been stopped and
1889 		 * the associated resources have been freed.
1890 		 */
1891 		mutex_lock(&olddev->ibi_lock);
1892 		if (olddev->ibi) {
1893 			ibireq.handler = olddev->ibi->handler;
1894 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
1895 			ibireq.num_slots = olddev->ibi->num_slots;
1896 
1897 			if (olddev->ibi->enabled) {
1898 				enable_ibi = true;
1899 				i3c_dev_disable_ibi_locked(olddev);
1900 			}
1901 
1902 			i3c_dev_free_ibi_locked(olddev);
1903 		}
1904 		mutex_unlock(&olddev->ibi_lock);
1905 
1906 		old_dyn_addr = olddev->info.dyn_addr;
1907 
1908 		i3c_master_detach_i3c_dev(olddev);
1909 		i3c_master_free_i3c_dev(olddev);
1910 	}
1911 
1912 	ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1913 	if (ret)
1914 		goto err_detach_dev;
1915 
1916 	/*
1917 	 * Depending on our previous state, the expected dynamic address might
1918 	 * differ:
1919 	 * - if the device already had a dynamic address assigned, let's try to
1920 	 *   re-apply this one
1921 	 * - if the device did not have a dynamic address and the firmware
1922 	 *   requested a specific address, pick this one
1923 	 * - in any other case, keep the address automatically assigned by the
1924 	 *   master
1925 	 */
1926 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1927 		expected_dyn_addr = old_dyn_addr;
1928 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1929 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1930 	else
1931 		expected_dyn_addr = newdev->info.dyn_addr;
1932 
1933 	if (newdev->info.dyn_addr != expected_dyn_addr) {
1934 		/*
1935 		 * Try to apply the expected dynamic address. If it fails, keep
1936 		 * the address assigned by the master.
1937 		 */
1938 		ret = i3c_master_setnewda_locked(master,
1939 						 newdev->info.dyn_addr,
1940 						 expected_dyn_addr);
1941 		if (!ret) {
1942 			old_dyn_addr = newdev->info.dyn_addr;
1943 			newdev->info.dyn_addr = expected_dyn_addr;
1944 			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1945 		} else {
1946 			dev_err(&master->dev,
1947 				"Failed to assign reserved/old address to device %d%llx",
1948 				master->bus.id, newdev->info.pid);
1949 		}
1950 	}
1951 
1952 	/*
1953 	 * Now is time to try to restore the IBI setup. If we're lucky,
1954 	 * everything works as before, otherwise, all we can do is complain.
1955 	 * FIXME: maybe we should add callback to inform the driver that it
1956 	 * should request the IBI again instead of trying to hide that from
1957 	 * him.
1958 	 */
1959 	if (ibireq.handler) {
1960 		mutex_lock(&newdev->ibi_lock);
1961 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1962 		if (ret) {
1963 			dev_err(&master->dev,
1964 				"Failed to request IBI on device %d-%llx",
1965 				master->bus.id, newdev->info.pid);
1966 		} else if (enable_ibi) {
1967 			ret = i3c_dev_enable_ibi_locked(newdev);
1968 			if (ret)
1969 				dev_err(&master->dev,
1970 					"Failed to re-enable IBI on device %d-%llx",
1971 					master->bus.id, newdev->info.pid);
1972 		}
1973 		mutex_unlock(&newdev->ibi_lock);
1974 	}
1975 
1976 	return 0;
1977 
1978 err_detach_dev:
1979 	if (newdev->dev && newdev->dev->desc)
1980 		newdev->dev->desc = NULL;
1981 
1982 	i3c_master_detach_i3c_dev(newdev);
1983 
1984 err_free_dev:
1985 	i3c_master_free_i3c_dev(newdev);
1986 
1987 	return ret;
1988 }
1989 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1990 
1991 #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
1992 
1993 static int
of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)1994 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1995 				struct device_node *node, u32 *reg)
1996 {
1997 	struct i2c_dev_boardinfo *boardinfo;
1998 	struct device *dev = &master->dev;
1999 	int ret;
2000 
2001 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2002 	if (!boardinfo)
2003 		return -ENOMEM;
2004 
2005 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2006 	if (ret)
2007 		return ret;
2008 
2009 	/*
2010 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2011 	 * address are supported. These devices can't be passed properly through
2012 	 * DEFSLVS command.
2013 	 */
2014 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2015 		dev_err(dev, "I2C device with 10 bit address not supported.");
2016 		return -ENOTSUPP;
2017 	}
2018 
2019 	/* LVR is encoded in reg[2]. */
2020 	boardinfo->lvr = reg[2];
2021 
2022 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2023 	of_node_get(node);
2024 
2025 	return 0;
2026 }
2027 
2028 static int
of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2029 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2030 				struct device_node *node, u32 *reg)
2031 {
2032 	struct i3c_dev_boardinfo *boardinfo;
2033 	struct device *dev = &master->dev;
2034 	enum i3c_addr_slot_status addrstatus;
2035 	u32 init_dyn_addr = 0;
2036 
2037 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2038 	if (!boardinfo)
2039 		return -ENOMEM;
2040 
2041 	if (reg[0]) {
2042 		if (reg[0] > I3C_MAX_ADDR)
2043 			return -EINVAL;
2044 
2045 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2046 							  reg[0]);
2047 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2048 			return -EINVAL;
2049 	}
2050 
2051 	boardinfo->static_addr = reg[0];
2052 
2053 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2054 		if (init_dyn_addr > I3C_MAX_ADDR)
2055 			return -EINVAL;
2056 
2057 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2058 							  init_dyn_addr);
2059 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2060 			return -EINVAL;
2061 	}
2062 
2063 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2064 
2065 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2066 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2067 		return -EINVAL;
2068 
2069 	boardinfo->init_dyn_addr = init_dyn_addr;
2070 	boardinfo->of_node = of_node_get(node);
2071 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2072 
2073 	return 0;
2074 }
2075 
of_i3c_master_add_dev(struct i3c_master_controller * master,struct device_node * node)2076 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2077 				 struct device_node *node)
2078 {
2079 	u32 reg[3];
2080 	int ret;
2081 
2082 	if (!master || !node)
2083 		return -EINVAL;
2084 
2085 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2086 	if (ret)
2087 		return ret;
2088 
2089 	/*
2090 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2091 	 * dealing with an I2C device.
2092 	 */
2093 	if (!reg[1])
2094 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2095 	else
2096 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2097 
2098 	return ret;
2099 }
2100 
of_populate_i3c_bus(struct i3c_master_controller * master)2101 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2102 {
2103 	struct device *dev = &master->dev;
2104 	struct device_node *i3cbus_np = dev->of_node;
2105 	struct device_node *node;
2106 	int ret;
2107 	u32 val;
2108 
2109 	if (!i3cbus_np)
2110 		return 0;
2111 
2112 	for_each_available_child_of_node(i3cbus_np, node) {
2113 		ret = of_i3c_master_add_dev(master, node);
2114 		if (ret) {
2115 			of_node_put(node);
2116 			return ret;
2117 		}
2118 	}
2119 
2120 	/*
2121 	 * The user might want to limit I2C and I3C speed in case some devices
2122 	 * on the bus are not supporting typical rates, or if the bus topology
2123 	 * prevents it from using max possible rate.
2124 	 */
2125 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2126 		master->bus.scl_rate.i2c = val;
2127 
2128 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2129 		master->bus.scl_rate.i3c = val;
2130 
2131 	return 0;
2132 }
2133 
i3c_master_i2c_adapter_xfer(struct i2c_adapter * adap,struct i2c_msg * xfers,int nxfers)2134 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2135 				       struct i2c_msg *xfers, int nxfers)
2136 {
2137 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2138 	struct i2c_dev_desc *dev;
2139 	int i, ret;
2140 	u16 addr;
2141 
2142 	if (!xfers || !master || nxfers <= 0)
2143 		return -EINVAL;
2144 
2145 	if (!master->ops->i2c_xfers)
2146 		return -ENOTSUPP;
2147 
2148 	/* Doing transfers to different devices is not supported. */
2149 	addr = xfers[0].addr;
2150 	for (i = 1; i < nxfers; i++) {
2151 		if (addr != xfers[i].addr)
2152 			return -ENOTSUPP;
2153 	}
2154 
2155 	i3c_bus_normaluse_lock(&master->bus);
2156 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2157 	if (!dev)
2158 		ret = -ENOENT;
2159 	else
2160 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2161 	i3c_bus_normaluse_unlock(&master->bus);
2162 
2163 	return ret ? ret : nxfers;
2164 }
2165 
i3c_master_i2c_funcs(struct i2c_adapter * adapter)2166 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2167 {
2168 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2169 }
2170 
2171 static const struct i2c_algorithm i3c_master_i2c_algo = {
2172 	.master_xfer = i3c_master_i2c_adapter_xfer,
2173 	.functionality = i3c_master_i2c_funcs,
2174 };
2175 
i3c_master_i2c_adapter_init(struct i3c_master_controller * master)2176 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2177 {
2178 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2179 	struct i2c_dev_desc *i2cdev;
2180 	int ret;
2181 
2182 	adap->dev.parent = master->dev.parent;
2183 	adap->owner = master->dev.parent->driver->owner;
2184 	adap->algo = &i3c_master_i2c_algo;
2185 	strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2186 
2187 	/* FIXME: Should we allow i3c masters to override these values? */
2188 	adap->timeout = 1000;
2189 	adap->retries = 3;
2190 
2191 	ret = i2c_add_adapter(adap);
2192 	if (ret)
2193 		return ret;
2194 
2195 	/*
2196 	 * We silently ignore failures here. The bus should keep working
2197 	 * correctly even if one or more i2c devices are not registered.
2198 	 */
2199 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2200 		i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2201 
2202 	return 0;
2203 }
2204 
i3c_master_i2c_adapter_cleanup(struct i3c_master_controller * master)2205 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2206 {
2207 	struct i2c_dev_desc *i2cdev;
2208 
2209 	i2c_del_adapter(&master->i2c);
2210 
2211 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2212 		i2cdev->dev = NULL;
2213 }
2214 
i3c_master_unregister_i3c_devs(struct i3c_master_controller * master)2215 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2216 {
2217 	struct i3c_dev_desc *i3cdev;
2218 
2219 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2220 		if (!i3cdev->dev)
2221 			continue;
2222 
2223 		i3cdev->dev->desc = NULL;
2224 		if (device_is_registered(&i3cdev->dev->dev))
2225 			device_unregister(&i3cdev->dev->dev);
2226 		else
2227 			put_device(&i3cdev->dev->dev);
2228 		i3cdev->dev = NULL;
2229 	}
2230 }
2231 
2232 /**
2233  * i3c_master_queue_ibi() - Queue an IBI
2234  * @dev: the device this IBI is coming from
2235  * @slot: the IBI slot used to store the payload
2236  *
2237  * Queue an IBI to the controller workqueue. The IBI handler attached to
2238  * the dev will be called from a workqueue context.
2239  */
i3c_master_queue_ibi(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2240 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2241 {
2242 	atomic_inc(&dev->ibi->pending_ibis);
2243 	queue_work(dev->common.master->wq, &slot->work);
2244 }
2245 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2246 
i3c_master_handle_ibi(struct work_struct * work)2247 static void i3c_master_handle_ibi(struct work_struct *work)
2248 {
2249 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2250 						 work);
2251 	struct i3c_dev_desc *dev = slot->dev;
2252 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2253 	struct i3c_ibi_payload payload;
2254 
2255 	payload.data = slot->data;
2256 	payload.len = slot->len;
2257 
2258 	if (dev->dev)
2259 		dev->ibi->handler(dev->dev, &payload);
2260 
2261 	master->ops->recycle_ibi_slot(dev, slot);
2262 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2263 		complete(&dev->ibi->all_ibis_handled);
2264 }
2265 
i3c_master_init_ibi_slot(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2266 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2267 				     struct i3c_ibi_slot *slot)
2268 {
2269 	slot->dev = dev;
2270 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2271 }
2272 
2273 struct i3c_generic_ibi_slot {
2274 	struct list_head node;
2275 	struct i3c_ibi_slot base;
2276 };
2277 
2278 struct i3c_generic_ibi_pool {
2279 	spinlock_t lock;
2280 	unsigned int num_slots;
2281 	struct i3c_generic_ibi_slot *slots;
2282 	void *payload_buf;
2283 	struct list_head free_slots;
2284 	struct list_head pending;
2285 };
2286 
2287 /**
2288  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2289  * @pool: the IBI pool to free
2290  *
2291  * Free all IBI slots allated by a generic IBI pool.
2292  */
i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool * pool)2293 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2294 {
2295 	struct i3c_generic_ibi_slot *slot;
2296 	unsigned int nslots = 0;
2297 
2298 	while (!list_empty(&pool->free_slots)) {
2299 		slot = list_first_entry(&pool->free_slots,
2300 					struct i3c_generic_ibi_slot, node);
2301 		list_del(&slot->node);
2302 		nslots++;
2303 	}
2304 
2305 	/*
2306 	 * If the number of freed slots is not equal to the number of allocated
2307 	 * slots we have a leak somewhere.
2308 	 */
2309 	WARN_ON(nslots != pool->num_slots);
2310 
2311 	kfree(pool->payload_buf);
2312 	kfree(pool->slots);
2313 	kfree(pool);
2314 }
2315 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2316 
2317 /**
2318  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2319  * @dev: the device this pool will be used for
2320  * @req: IBI setup request describing what the device driver expects
2321  *
2322  * Create a generic IBI pool based on the information provided in @req.
2323  *
2324  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2325  */
2326 struct i3c_generic_ibi_pool *
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2327 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2328 			   const struct i3c_ibi_setup *req)
2329 {
2330 	struct i3c_generic_ibi_pool *pool;
2331 	struct i3c_generic_ibi_slot *slot;
2332 	unsigned int i;
2333 	int ret;
2334 
2335 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2336 	if (!pool)
2337 		return ERR_PTR(-ENOMEM);
2338 
2339 	spin_lock_init(&pool->lock);
2340 	INIT_LIST_HEAD(&pool->free_slots);
2341 	INIT_LIST_HEAD(&pool->pending);
2342 
2343 	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2344 	if (!pool->slots) {
2345 		ret = -ENOMEM;
2346 		goto err_free_pool;
2347 	}
2348 
2349 	if (req->max_payload_len) {
2350 		pool->payload_buf = kcalloc(req->num_slots,
2351 					    req->max_payload_len, GFP_KERNEL);
2352 		if (!pool->payload_buf) {
2353 			ret = -ENOMEM;
2354 			goto err_free_pool;
2355 		}
2356 	}
2357 
2358 	for (i = 0; i < req->num_slots; i++) {
2359 		slot = &pool->slots[i];
2360 		i3c_master_init_ibi_slot(dev, &slot->base);
2361 
2362 		if (req->max_payload_len)
2363 			slot->base.data = pool->payload_buf +
2364 					  (i * req->max_payload_len);
2365 
2366 		list_add_tail(&slot->node, &pool->free_slots);
2367 		pool->num_slots++;
2368 	}
2369 
2370 	return pool;
2371 
2372 err_free_pool:
2373 	i3c_generic_ibi_free_pool(pool);
2374 	return ERR_PTR(ret);
2375 }
2376 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2377 
2378 /**
2379  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2380  * @pool: the pool to query an IBI slot on
2381  *
2382  * Search for a free slot in a generic IBI pool.
2383  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2384  * when it's no longer needed.
2385  *
2386  * Return: a pointer to a free slot, or NULL if there's no free slot available.
2387  */
2388 struct i3c_ibi_slot *
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool * pool)2389 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2390 {
2391 	struct i3c_generic_ibi_slot *slot;
2392 	unsigned long flags;
2393 
2394 	spin_lock_irqsave(&pool->lock, flags);
2395 	slot = list_first_entry_or_null(&pool->free_slots,
2396 					struct i3c_generic_ibi_slot, node);
2397 	if (slot)
2398 		list_del(&slot->node);
2399 	spin_unlock_irqrestore(&pool->lock, flags);
2400 
2401 	return slot ? &slot->base : NULL;
2402 }
2403 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2404 
2405 /**
2406  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2407  * @pool: the pool to return the IBI slot to
2408  * @s: IBI slot to recycle
2409  *
2410  * Add an IBI slot back to its generic IBI pool. Should be called from the
2411  * master driver struct_master_controller_ops->recycle_ibi() method.
2412  */
i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool * pool,struct i3c_ibi_slot * s)2413 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2414 				  struct i3c_ibi_slot *s)
2415 {
2416 	struct i3c_generic_ibi_slot *slot;
2417 	unsigned long flags;
2418 
2419 	if (!s)
2420 		return;
2421 
2422 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2423 	spin_lock_irqsave(&pool->lock, flags);
2424 	list_add_tail(&slot->node, &pool->free_slots);
2425 	spin_unlock_irqrestore(&pool->lock, flags);
2426 }
2427 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2428 
i3c_master_check_ops(const struct i3c_master_controller_ops * ops)2429 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2430 {
2431 	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2432 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2433 		return -EINVAL;
2434 
2435 	if (ops->request_ibi &&
2436 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2437 	     !ops->recycle_ibi_slot))
2438 		return -EINVAL;
2439 
2440 	return 0;
2441 }
2442 
2443 /**
2444  * i3c_master_register() - register an I3C master
2445  * @master: master used to send frames on the bus
2446  * @parent: the parent device (the one that provides this I3C master
2447  *	    controller)
2448  * @ops: the master controller operations
2449  * @secondary: true if you are registering a secondary master. Will return
2450  *	       -ENOTSUPP if set to true since secondary masters are not yet
2451  *	       supported
2452  *
2453  * This function takes care of everything for you:
2454  *
2455  * - creates and initializes the I3C bus
2456  * - populates the bus with static I2C devs if @parent->of_node is not
2457  *   NULL
2458  * - registers all I3C devices added by the controller during bus
2459  *   initialization
2460  * - registers the I2C adapter and all I2C devices
2461  *
2462  * Return: 0 in case of success, a negative error code otherwise.
2463  */
i3c_master_register(struct i3c_master_controller * master,struct device * parent,const struct i3c_master_controller_ops * ops,bool secondary)2464 int i3c_master_register(struct i3c_master_controller *master,
2465 			struct device *parent,
2466 			const struct i3c_master_controller_ops *ops,
2467 			bool secondary)
2468 {
2469 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2470 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2471 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2472 	struct i2c_dev_boardinfo *i2cbi;
2473 	int ret;
2474 
2475 	/* We do not support secondary masters yet. */
2476 	if (secondary)
2477 		return -ENOTSUPP;
2478 
2479 	ret = i3c_master_check_ops(ops);
2480 	if (ret)
2481 		return ret;
2482 
2483 	master->dev.parent = parent;
2484 	master->dev.of_node = of_node_get(parent->of_node);
2485 	master->dev.bus = &i3c_bus_type;
2486 	master->dev.type = &i3c_masterdev_type;
2487 	master->dev.release = i3c_masterdev_release;
2488 	master->ops = ops;
2489 	master->secondary = secondary;
2490 	INIT_LIST_HEAD(&master->boardinfo.i2c);
2491 	INIT_LIST_HEAD(&master->boardinfo.i3c);
2492 
2493 	ret = i3c_bus_init(i3cbus);
2494 	if (ret)
2495 		return ret;
2496 
2497 	device_initialize(&master->dev);
2498 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2499 
2500 	ret = of_populate_i3c_bus(master);
2501 	if (ret)
2502 		goto err_put_dev;
2503 
2504 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2505 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2506 		case I3C_LVR_I2C_INDEX(0):
2507 			if (mode < I3C_BUS_MODE_MIXED_FAST)
2508 				mode = I3C_BUS_MODE_MIXED_FAST;
2509 			break;
2510 		case I3C_LVR_I2C_INDEX(1):
2511 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2512 				mode = I3C_BUS_MODE_MIXED_LIMITED;
2513 			break;
2514 		case I3C_LVR_I2C_INDEX(2):
2515 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2516 				mode = I3C_BUS_MODE_MIXED_SLOW;
2517 			break;
2518 		default:
2519 			ret = -EINVAL;
2520 			goto err_put_dev;
2521 		}
2522 
2523 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2524 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2525 	}
2526 
2527 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2528 	if (ret)
2529 		goto err_put_dev;
2530 
2531 	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2532 	if (!master->wq) {
2533 		ret = -ENOMEM;
2534 		goto err_put_dev;
2535 	}
2536 
2537 	ret = i3c_master_bus_init(master);
2538 	if (ret)
2539 		goto err_put_dev;
2540 
2541 	ret = device_add(&master->dev);
2542 	if (ret)
2543 		goto err_cleanup_bus;
2544 
2545 	/*
2546 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2547 	 * through the I2C subsystem.
2548 	 */
2549 	ret = i3c_master_i2c_adapter_init(master);
2550 	if (ret)
2551 		goto err_del_dev;
2552 
2553 	/*
2554 	 * We're done initializing the bus and the controller, we can now
2555 	 * register I3C devices discovered during the initial DAA.
2556 	 */
2557 	master->init_done = true;
2558 	i3c_bus_normaluse_lock(&master->bus);
2559 	i3c_master_register_new_i3c_devs(master);
2560 	i3c_bus_normaluse_unlock(&master->bus);
2561 
2562 	return 0;
2563 
2564 err_del_dev:
2565 	device_del(&master->dev);
2566 
2567 err_cleanup_bus:
2568 	i3c_master_bus_cleanup(master);
2569 
2570 err_put_dev:
2571 	put_device(&master->dev);
2572 
2573 	return ret;
2574 }
2575 EXPORT_SYMBOL_GPL(i3c_master_register);
2576 
2577 /**
2578  * i3c_master_unregister() - unregister an I3C master
2579  * @master: master used to send frames on the bus
2580  *
2581  * Basically undo everything done in i3c_master_register().
2582  *
2583  * Return: 0 in case of success, a negative error code otherwise.
2584  */
i3c_master_unregister(struct i3c_master_controller * master)2585 int i3c_master_unregister(struct i3c_master_controller *master)
2586 {
2587 	i3c_master_i2c_adapter_cleanup(master);
2588 	i3c_master_unregister_i3c_devs(master);
2589 	i3c_master_bus_cleanup(master);
2590 	device_unregister(&master->dev);
2591 
2592 	return 0;
2593 }
2594 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2595 
i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc * dev,struct i3c_priv_xfer * xfers,int nxfers)2596 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2597 				 struct i3c_priv_xfer *xfers,
2598 				 int nxfers)
2599 {
2600 	struct i3c_master_controller *master;
2601 
2602 	if (!dev)
2603 		return -ENOENT;
2604 
2605 	master = i3c_dev_get_master(dev);
2606 	if (!master || !xfers)
2607 		return -EINVAL;
2608 
2609 	if (!master->ops->priv_xfers)
2610 		return -ENOTSUPP;
2611 
2612 	return master->ops->priv_xfers(dev, xfers, nxfers);
2613 }
2614 
i3c_dev_disable_ibi_locked(struct i3c_dev_desc * dev)2615 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2616 {
2617 	struct i3c_master_controller *master;
2618 	int ret;
2619 
2620 	if (!dev->ibi)
2621 		return -EINVAL;
2622 
2623 	master = i3c_dev_get_master(dev);
2624 	ret = master->ops->disable_ibi(dev);
2625 	if (ret)
2626 		return ret;
2627 
2628 	reinit_completion(&dev->ibi->all_ibis_handled);
2629 	if (atomic_read(&dev->ibi->pending_ibis))
2630 		wait_for_completion(&dev->ibi->all_ibis_handled);
2631 
2632 	dev->ibi->enabled = false;
2633 
2634 	return 0;
2635 }
2636 
i3c_dev_enable_ibi_locked(struct i3c_dev_desc * dev)2637 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2638 {
2639 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2640 	int ret;
2641 
2642 	if (!dev->ibi)
2643 		return -EINVAL;
2644 
2645 	ret = master->ops->enable_ibi(dev);
2646 	if (!ret)
2647 		dev->ibi->enabled = true;
2648 
2649 	return ret;
2650 }
2651 
i3c_dev_request_ibi_locked(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2652 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2653 			       const struct i3c_ibi_setup *req)
2654 {
2655 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2656 	struct i3c_device_ibi_info *ibi;
2657 	int ret;
2658 
2659 	if (!master->ops->request_ibi)
2660 		return -ENOTSUPP;
2661 
2662 	if (dev->ibi)
2663 		return -EBUSY;
2664 
2665 	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2666 	if (!ibi)
2667 		return -ENOMEM;
2668 
2669 	atomic_set(&ibi->pending_ibis, 0);
2670 	init_completion(&ibi->all_ibis_handled);
2671 	ibi->handler = req->handler;
2672 	ibi->max_payload_len = req->max_payload_len;
2673 	ibi->num_slots = req->num_slots;
2674 
2675 	dev->ibi = ibi;
2676 	ret = master->ops->request_ibi(dev, req);
2677 	if (ret) {
2678 		kfree(ibi);
2679 		dev->ibi = NULL;
2680 	}
2681 
2682 	return ret;
2683 }
2684 
i3c_dev_free_ibi_locked(struct i3c_dev_desc * dev)2685 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2686 {
2687 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2688 
2689 	if (!dev->ibi)
2690 		return;
2691 
2692 	if (WARN_ON(dev->ibi->enabled))
2693 		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2694 
2695 	master->ops->free_ibi(dev);
2696 	kfree(dev->ibi);
2697 	dev->ibi = NULL;
2698 }
2699 
i3c_init(void)2700 static int __init i3c_init(void)
2701 {
2702 	return bus_register(&i3c_bus_type);
2703 }
2704 subsys_initcall(i3c_init);
2705 
i3c_exit(void)2706 static void __exit i3c_exit(void)
2707 {
2708 	idr_destroy(&i3c_bus_idr);
2709 	bus_unregister(&i3c_bus_type);
2710 }
2711 module_exit(i3c_exit);
2712 
2713 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2714 MODULE_DESCRIPTION("I3C core");
2715 MODULE_LICENSE("GPL v2");
2716