1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/i2c.h>
9 #include <linux/err.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include "inv_mpu_iio.h"
22 #include "inv_mpu_magn.h"
23
24 /*
25 * this is the gyro scale translated from dynamic range plus/minus
26 * {250, 500, 1000, 2000} to rad/s
27 */
28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
29
30 /*
31 * this is the accel scale translated from dynamic range plus/minus
32 * {2, 4, 8, 16} to m/s^2
33 */
34 static const int accel_scale[] = {598, 1196, 2392, 4785};
35
36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
38 .lpf = INV_MPU6050_REG_CONFIG,
39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
40 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
41 .fifo_en = INV_MPU6050_REG_FIFO_EN,
42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
48 .temperature = INV_MPU6050_REG_TEMPERATURE,
49 .int_enable = INV_MPU6050_REG_INT_ENABLE,
50 .int_status = INV_MPU6050_REG_INT_STATUS,
51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
56 .i2c_if = INV_ICM20602_REG_I2C_IF,
57 };
58
59 static const struct inv_mpu6050_reg_map reg_set_6500 = {
60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
61 .lpf = INV_MPU6050_REG_CONFIG,
62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
63 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
64 .fifo_en = INV_MPU6050_REG_FIFO_EN,
65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
71 .temperature = INV_MPU6050_REG_TEMPERATURE,
72 .int_enable = INV_MPU6050_REG_INT_ENABLE,
73 .int_status = INV_MPU6050_REG_INT_STATUS,
74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
79 .i2c_if = 0,
80 };
81
82 static const struct inv_mpu6050_reg_map reg_set_6050 = {
83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
84 .lpf = INV_MPU6050_REG_CONFIG,
85 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
86 .fifo_en = INV_MPU6050_REG_FIFO_EN,
87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
93 .temperature = INV_MPU6050_REG_TEMPERATURE,
94 .int_enable = INV_MPU6050_REG_INT_ENABLE,
95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
100 .i2c_if = 0,
101 };
102
103 static const struct inv_mpu6050_chip_config chip_config_6050 = {
104 .clk = INV_CLK_INTERNAL,
105 .fsr = INV_MPU6050_FSR_2000DPS,
106 .lpf = INV_MPU6050_FILTER_20HZ,
107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
108 .gyro_en = true,
109 .accl_en = true,
110 .temp_en = true,
111 .magn_en = false,
112 .gyro_fifo_enable = false,
113 .accl_fifo_enable = false,
114 .temp_fifo_enable = false,
115 .magn_fifo_enable = false,
116 .accl_fs = INV_MPU6050_FS_02G,
117 .user_ctrl = 0,
118 };
119
120 static const struct inv_mpu6050_chip_config chip_config_6500 = {
121 .clk = INV_CLK_PLL,
122 .fsr = INV_MPU6050_FSR_2000DPS,
123 .lpf = INV_MPU6050_FILTER_20HZ,
124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
125 .gyro_en = true,
126 .accl_en = true,
127 .temp_en = true,
128 .magn_en = false,
129 .gyro_fifo_enable = false,
130 .accl_fifo_enable = false,
131 .temp_fifo_enable = false,
132 .magn_fifo_enable = false,
133 .accl_fs = INV_MPU6050_FS_02G,
134 .user_ctrl = 0,
135 };
136
137 /* Indexed by enum inv_devices */
138 static const struct inv_mpu6050_hw hw_info[] = {
139 {
140 .whoami = INV_MPU6050_WHOAMI_VALUE,
141 .name = "MPU6050",
142 .reg = ®_set_6050,
143 .config = &chip_config_6050,
144 .fifo_size = 1024,
145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
146 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
147 },
148 {
149 .whoami = INV_MPU6500_WHOAMI_VALUE,
150 .name = "MPU6500",
151 .reg = ®_set_6500,
152 .config = &chip_config_6500,
153 .fifo_size = 512,
154 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
155 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
156 },
157 {
158 .whoami = INV_MPU6515_WHOAMI_VALUE,
159 .name = "MPU6515",
160 .reg = ®_set_6500,
161 .config = &chip_config_6500,
162 .fifo_size = 512,
163 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
164 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
165 },
166 {
167 .whoami = INV_MPU6880_WHOAMI_VALUE,
168 .name = "MPU6880",
169 .reg = ®_set_6500,
170 .config = &chip_config_6500,
171 .fifo_size = 4096,
172 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
173 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
174 },
175 {
176 .whoami = INV_MPU6000_WHOAMI_VALUE,
177 .name = "MPU6000",
178 .reg = ®_set_6050,
179 .config = &chip_config_6050,
180 .fifo_size = 1024,
181 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
182 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
183 },
184 {
185 .whoami = INV_MPU9150_WHOAMI_VALUE,
186 .name = "MPU9150",
187 .reg = ®_set_6050,
188 .config = &chip_config_6050,
189 .fifo_size = 1024,
190 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
191 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
192 },
193 {
194 .whoami = INV_MPU9250_WHOAMI_VALUE,
195 .name = "MPU9250",
196 .reg = ®_set_6500,
197 .config = &chip_config_6500,
198 .fifo_size = 512,
199 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
200 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
201 },
202 {
203 .whoami = INV_MPU9255_WHOAMI_VALUE,
204 .name = "MPU9255",
205 .reg = ®_set_6500,
206 .config = &chip_config_6500,
207 .fifo_size = 512,
208 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
209 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
210 },
211 {
212 .whoami = INV_ICM20608_WHOAMI_VALUE,
213 .name = "ICM20608",
214 .reg = ®_set_6500,
215 .config = &chip_config_6500,
216 .fifo_size = 512,
217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
218 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
219 },
220 {
221 .whoami = INV_ICM20609_WHOAMI_VALUE,
222 .name = "ICM20609",
223 .reg = ®_set_6500,
224 .config = &chip_config_6500,
225 .fifo_size = 4 * 1024,
226 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
227 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
228 },
229 {
230 .whoami = INV_ICM20689_WHOAMI_VALUE,
231 .name = "ICM20689",
232 .reg = ®_set_6500,
233 .config = &chip_config_6500,
234 .fifo_size = 4 * 1024,
235 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
236 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
237 },
238 {
239 .whoami = INV_ICM20602_WHOAMI_VALUE,
240 .name = "ICM20602",
241 .reg = ®_set_icm20602,
242 .config = &chip_config_6500,
243 .fifo_size = 1008,
244 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
245 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
246 },
247 {
248 .whoami = INV_ICM20690_WHOAMI_VALUE,
249 .name = "ICM20690",
250 .reg = ®_set_6500,
251 .config = &chip_config_6500,
252 .fifo_size = 1024,
253 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
254 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
255 },
256 {
257 .whoami = INV_IAM20680_WHOAMI_VALUE,
258 .name = "IAM20680",
259 .reg = ®_set_6500,
260 .config = &chip_config_6500,
261 .fifo_size = 512,
262 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
263 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
264 },
265 };
266
inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state * st,bool sleep,int clock,int temp_dis)267 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
268 int clock, int temp_dis)
269 {
270 u8 val;
271
272 if (clock < 0)
273 clock = st->chip_config.clk;
274 if (temp_dis < 0)
275 temp_dis = !st->chip_config.temp_en;
276
277 val = clock & INV_MPU6050_BIT_CLK_MASK;
278 if (temp_dis)
279 val |= INV_MPU6050_BIT_TEMP_DIS;
280 if (sleep)
281 val |= INV_MPU6050_BIT_SLEEP;
282
283 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
284 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
285 }
286
inv_mpu6050_clock_switch(struct inv_mpu6050_state * st,unsigned int clock)287 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
288 unsigned int clock)
289 {
290 int ret;
291
292 switch (st->chip_type) {
293 case INV_MPU6050:
294 case INV_MPU6000:
295 case INV_MPU9150:
296 /* old chips: switch clock manually */
297 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1);
298 if (ret)
299 return ret;
300 st->chip_config.clk = clock;
301 break;
302 default:
303 /* automatic clock switching, nothing to do */
304 break;
305 }
306
307 return 0;
308 }
309
inv_mpu6050_switch_engine(struct inv_mpu6050_state * st,bool en,unsigned int mask)310 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
311 unsigned int mask)
312 {
313 unsigned int sleep;
314 u8 pwr_mgmt2, user_ctrl;
315 int ret;
316
317 /* delete useless requests */
318 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
319 mask &= ~INV_MPU6050_SENSOR_ACCL;
320 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
321 mask &= ~INV_MPU6050_SENSOR_GYRO;
322 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
323 mask &= ~INV_MPU6050_SENSOR_TEMP;
324 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
325 mask &= ~INV_MPU6050_SENSOR_MAGN;
326 if (mask == 0)
327 return 0;
328
329 /* turn on/off temperature sensor */
330 if (mask & INV_MPU6050_SENSOR_TEMP) {
331 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en);
332 if (ret)
333 return ret;
334 st->chip_config.temp_en = en;
335 }
336
337 /* update user_crtl for driving magnetometer */
338 if (mask & INV_MPU6050_SENSOR_MAGN) {
339 user_ctrl = st->chip_config.user_ctrl;
340 if (en)
341 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
342 else
343 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
344 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
345 if (ret)
346 return ret;
347 st->chip_config.user_ctrl = user_ctrl;
348 st->chip_config.magn_en = en;
349 }
350
351 /* manage accel & gyro engines */
352 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
353 /* compute power management 2 current value */
354 pwr_mgmt2 = 0;
355 if (!st->chip_config.accl_en)
356 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
357 if (!st->chip_config.gyro_en)
358 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
359
360 /* update to new requested value */
361 if (mask & INV_MPU6050_SENSOR_ACCL) {
362 if (en)
363 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
364 else
365 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
366 }
367 if (mask & INV_MPU6050_SENSOR_GYRO) {
368 if (en)
369 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
370 else
371 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
372 }
373
374 /* switch clock to internal when turning gyro off */
375 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
376 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
377 if (ret)
378 return ret;
379 }
380
381 /* update sensors engine */
382 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
383 pwr_mgmt2);
384 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
385 if (ret)
386 return ret;
387 if (mask & INV_MPU6050_SENSOR_ACCL)
388 st->chip_config.accl_en = en;
389 if (mask & INV_MPU6050_SENSOR_GYRO)
390 st->chip_config.gyro_en = en;
391
392 /* compute required time to have sensors stabilized */
393 sleep = 0;
394 if (en) {
395 if (mask & INV_MPU6050_SENSOR_ACCL) {
396 if (sleep < st->hw->startup_time.accel)
397 sleep = st->hw->startup_time.accel;
398 }
399 if (mask & INV_MPU6050_SENSOR_GYRO) {
400 if (sleep < st->hw->startup_time.gyro)
401 sleep = st->hw->startup_time.gyro;
402 }
403 } else {
404 if (mask & INV_MPU6050_SENSOR_GYRO) {
405 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
406 sleep = INV_MPU6050_GYRO_DOWN_TIME;
407 }
408 }
409 if (sleep)
410 msleep(sleep);
411
412 /* switch clock to PLL when turning gyro on */
413 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
414 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
415 if (ret)
416 return ret;
417 }
418 }
419
420 return 0;
421 }
422
inv_mpu6050_set_power_itg(struct inv_mpu6050_state * st,bool power_on)423 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
424 bool power_on)
425 {
426 int result;
427
428 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1);
429 if (result)
430 return result;
431
432 if (power_on)
433 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
434 INV_MPU6050_REG_UP_TIME_MAX);
435
436 return 0;
437 }
438
inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state * st,enum inv_mpu6050_fsr_e val)439 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
440 enum inv_mpu6050_fsr_e val)
441 {
442 unsigned int gyro_shift;
443 u8 data;
444
445 switch (st->chip_type) {
446 case INV_ICM20690:
447 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
448 break;
449 default:
450 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
451 break;
452 }
453
454 data = val << gyro_shift;
455 return regmap_write(st->map, st->reg->gyro_config, data);
456 }
457
458 /*
459 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
460 *
461 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
462 * MPU6500 and above have a dedicated register for accelerometer
463 */
inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state * st,enum inv_mpu6050_filter_e val)464 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
465 enum inv_mpu6050_filter_e val)
466 {
467 int result;
468
469 result = regmap_write(st->map, st->reg->lpf, val);
470 if (result)
471 return result;
472
473 /* set accel lpf */
474 switch (st->chip_type) {
475 case INV_MPU6050:
476 case INV_MPU6000:
477 case INV_MPU9150:
478 /* old chips, nothing to do */
479 return 0;
480 case INV_ICM20689:
481 case INV_ICM20690:
482 /* set FIFO size to maximum value */
483 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
484 break;
485 default:
486 break;
487 }
488
489 return regmap_write(st->map, st->reg->accel_lpf, val);
490 }
491
492 /*
493 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
494 *
495 * Initial configuration:
496 * FSR: ± 2000DPS
497 * DLPF: 20Hz
498 * FIFO rate: 50Hz
499 * Clock source: Gyro PLL
500 */
inv_mpu6050_init_config(struct iio_dev * indio_dev)501 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
502 {
503 int result;
504 u8 d;
505 struct inv_mpu6050_state *st = iio_priv(indio_dev);
506
507 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
508 if (result)
509 return result;
510
511 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
512 if (result)
513 return result;
514
515 d = st->chip_config.divider;
516 result = regmap_write(st->map, st->reg->sample_rate_div, d);
517 if (result)
518 return result;
519
520 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
521 result = regmap_write(st->map, st->reg->accl_config, d);
522 if (result)
523 return result;
524
525 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
526 if (result)
527 return result;
528
529 /*
530 * Internal chip period is 1ms (1kHz).
531 * Let's use at the beginning the theorical value before measuring
532 * with interrupt timestamps.
533 */
534 st->chip_period = NSEC_PER_MSEC;
535
536 /* magn chip init, noop if not present in the chip */
537 result = inv_mpu_magn_probe(st);
538 if (result)
539 return result;
540
541 return 0;
542 }
543
inv_mpu6050_sensor_set(struct inv_mpu6050_state * st,int reg,int axis,int val)544 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
545 int axis, int val)
546 {
547 int ind, result;
548 __be16 d = cpu_to_be16(val);
549
550 ind = (axis - IIO_MOD_X) * 2;
551 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
552 if (result)
553 return -EINVAL;
554
555 return 0;
556 }
557
inv_mpu6050_sensor_show(struct inv_mpu6050_state * st,int reg,int axis,int * val)558 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
559 int axis, int *val)
560 {
561 int ind, result;
562 __be16 d;
563
564 ind = (axis - IIO_MOD_X) * 2;
565 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
566 if (result)
567 return -EINVAL;
568 *val = (short)be16_to_cpup(&d);
569
570 return IIO_VAL_INT;
571 }
572
inv_mpu6050_read_channel_data(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val)573 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
574 struct iio_chan_spec const *chan,
575 int *val)
576 {
577 struct inv_mpu6050_state *st = iio_priv(indio_dev);
578 struct device *pdev = regmap_get_device(st->map);
579 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
580 int result;
581 int ret;
582
583 /* compute sample period */
584 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
585 period_us = 1000000 / freq_hz;
586
587 result = pm_runtime_resume_and_get(pdev);
588 if (result)
589 return result;
590
591 switch (chan->type) {
592 case IIO_ANGL_VEL:
593 if (!st->chip_config.gyro_en) {
594 result = inv_mpu6050_switch_engine(st, true,
595 INV_MPU6050_SENSOR_GYRO);
596 if (result)
597 goto error_power_off;
598 /* need to wait 2 periods to have first valid sample */
599 min_sleep_us = 2 * period_us;
600 max_sleep_us = 2 * (period_us + period_us / 2);
601 usleep_range(min_sleep_us, max_sleep_us);
602 }
603 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
604 chan->channel2, val);
605 break;
606 case IIO_ACCEL:
607 if (!st->chip_config.accl_en) {
608 result = inv_mpu6050_switch_engine(st, true,
609 INV_MPU6050_SENSOR_ACCL);
610 if (result)
611 goto error_power_off;
612 /* wait 1 period for first sample availability */
613 min_sleep_us = period_us;
614 max_sleep_us = period_us + period_us / 2;
615 usleep_range(min_sleep_us, max_sleep_us);
616 }
617 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
618 chan->channel2, val);
619 break;
620 case IIO_TEMP:
621 /* temperature sensor work only with accel and/or gyro */
622 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
623 result = -EBUSY;
624 goto error_power_off;
625 }
626 if (!st->chip_config.temp_en) {
627 result = inv_mpu6050_switch_engine(st, true,
628 INV_MPU6050_SENSOR_TEMP);
629 if (result)
630 goto error_power_off;
631 /* wait 1 period for first sample availability */
632 min_sleep_us = period_us;
633 max_sleep_us = period_us + period_us / 2;
634 usleep_range(min_sleep_us, max_sleep_us);
635 }
636 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
637 IIO_MOD_X, val);
638 break;
639 case IIO_MAGN:
640 if (!st->chip_config.magn_en) {
641 result = inv_mpu6050_switch_engine(st, true,
642 INV_MPU6050_SENSOR_MAGN);
643 if (result)
644 goto error_power_off;
645 /* frequency is limited for magnetometer */
646 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
647 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
648 period_us = 1000000 / freq_hz;
649 }
650 /* need to wait 2 periods to have first valid sample */
651 min_sleep_us = 2 * period_us;
652 max_sleep_us = 2 * (period_us + period_us / 2);
653 usleep_range(min_sleep_us, max_sleep_us);
654 }
655 ret = inv_mpu_magn_read(st, chan->channel2, val);
656 break;
657 default:
658 ret = -EINVAL;
659 break;
660 }
661
662 pm_runtime_mark_last_busy(pdev);
663 pm_runtime_put_autosuspend(pdev);
664
665 return ret;
666
667 error_power_off:
668 pm_runtime_put_autosuspend(pdev);
669 return result;
670 }
671
672 static int
inv_mpu6050_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)673 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
674 struct iio_chan_spec const *chan,
675 int *val, int *val2, long mask)
676 {
677 struct inv_mpu6050_state *st = iio_priv(indio_dev);
678 int ret = 0;
679
680 switch (mask) {
681 case IIO_CHAN_INFO_RAW:
682 ret = iio_device_claim_direct_mode(indio_dev);
683 if (ret)
684 return ret;
685 mutex_lock(&st->lock);
686 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
687 mutex_unlock(&st->lock);
688 iio_device_release_direct_mode(indio_dev);
689 return ret;
690 case IIO_CHAN_INFO_SCALE:
691 switch (chan->type) {
692 case IIO_ANGL_VEL:
693 mutex_lock(&st->lock);
694 *val = 0;
695 *val2 = gyro_scale_6050[st->chip_config.fsr];
696 mutex_unlock(&st->lock);
697
698 return IIO_VAL_INT_PLUS_NANO;
699 case IIO_ACCEL:
700 mutex_lock(&st->lock);
701 *val = 0;
702 *val2 = accel_scale[st->chip_config.accl_fs];
703 mutex_unlock(&st->lock);
704
705 return IIO_VAL_INT_PLUS_MICRO;
706 case IIO_TEMP:
707 *val = st->hw->temp.scale / 1000000;
708 *val2 = st->hw->temp.scale % 1000000;
709 return IIO_VAL_INT_PLUS_MICRO;
710 case IIO_MAGN:
711 return inv_mpu_magn_get_scale(st, chan, val, val2);
712 default:
713 return -EINVAL;
714 }
715 case IIO_CHAN_INFO_OFFSET:
716 switch (chan->type) {
717 case IIO_TEMP:
718 *val = st->hw->temp.offset;
719 return IIO_VAL_INT;
720 default:
721 return -EINVAL;
722 }
723 case IIO_CHAN_INFO_CALIBBIAS:
724 switch (chan->type) {
725 case IIO_ANGL_VEL:
726 mutex_lock(&st->lock);
727 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
728 chan->channel2, val);
729 mutex_unlock(&st->lock);
730 return ret;
731 case IIO_ACCEL:
732 mutex_lock(&st->lock);
733 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
734 chan->channel2, val);
735 mutex_unlock(&st->lock);
736 return ret;
737
738 default:
739 return -EINVAL;
740 }
741 default:
742 return -EINVAL;
743 }
744 }
745
inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state * st,int val,int val2)746 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
747 int val2)
748 {
749 int result, i;
750
751 if (val != 0)
752 return -EINVAL;
753
754 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
755 if (gyro_scale_6050[i] == val2) {
756 result = inv_mpu6050_set_gyro_fsr(st, i);
757 if (result)
758 return result;
759
760 st->chip_config.fsr = i;
761 return 0;
762 }
763 }
764
765 return -EINVAL;
766 }
767
inv_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)768 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
769 struct iio_chan_spec const *chan, long mask)
770 {
771 switch (mask) {
772 case IIO_CHAN_INFO_SCALE:
773 switch (chan->type) {
774 case IIO_ANGL_VEL:
775 return IIO_VAL_INT_PLUS_NANO;
776 default:
777 return IIO_VAL_INT_PLUS_MICRO;
778 }
779 default:
780 return IIO_VAL_INT_PLUS_MICRO;
781 }
782
783 return -EINVAL;
784 }
785
inv_mpu6050_write_accel_scale(struct inv_mpu6050_state * st,int val,int val2)786 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
787 int val2)
788 {
789 int result, i;
790 u8 d;
791
792 if (val != 0)
793 return -EINVAL;
794
795 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
796 if (accel_scale[i] == val2) {
797 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
798 result = regmap_write(st->map, st->reg->accl_config, d);
799 if (result)
800 return result;
801
802 st->chip_config.accl_fs = i;
803 return 0;
804 }
805 }
806
807 return -EINVAL;
808 }
809
inv_mpu6050_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)810 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
811 struct iio_chan_spec const *chan,
812 int val, int val2, long mask)
813 {
814 struct inv_mpu6050_state *st = iio_priv(indio_dev);
815 struct device *pdev = regmap_get_device(st->map);
816 int result;
817
818 /*
819 * we should only update scale when the chip is disabled, i.e.
820 * not running
821 */
822 result = iio_device_claim_direct_mode(indio_dev);
823 if (result)
824 return result;
825
826 mutex_lock(&st->lock);
827 result = pm_runtime_resume_and_get(pdev);
828 if (result)
829 goto error_write_raw_unlock;
830
831 switch (mask) {
832 case IIO_CHAN_INFO_SCALE:
833 switch (chan->type) {
834 case IIO_ANGL_VEL:
835 result = inv_mpu6050_write_gyro_scale(st, val, val2);
836 break;
837 case IIO_ACCEL:
838 result = inv_mpu6050_write_accel_scale(st, val, val2);
839 break;
840 default:
841 result = -EINVAL;
842 break;
843 }
844 break;
845 case IIO_CHAN_INFO_CALIBBIAS:
846 switch (chan->type) {
847 case IIO_ANGL_VEL:
848 result = inv_mpu6050_sensor_set(st,
849 st->reg->gyro_offset,
850 chan->channel2, val);
851 break;
852 case IIO_ACCEL:
853 result = inv_mpu6050_sensor_set(st,
854 st->reg->accl_offset,
855 chan->channel2, val);
856 break;
857 default:
858 result = -EINVAL;
859 break;
860 }
861 break;
862 default:
863 result = -EINVAL;
864 break;
865 }
866
867 pm_runtime_mark_last_busy(pdev);
868 pm_runtime_put_autosuspend(pdev);
869 error_write_raw_unlock:
870 mutex_unlock(&st->lock);
871 iio_device_release_direct_mode(indio_dev);
872
873 return result;
874 }
875
876 /*
877 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
878 *
879 * Based on the Nyquist principle, the bandwidth of the low
880 * pass filter must not exceed the signal sampling rate divided
881 * by 2, or there would be aliasing.
882 * This function basically search for the correct low pass
883 * parameters based on the fifo rate, e.g, sampling frequency.
884 *
885 * lpf is set automatically when setting sampling rate to avoid any aliases.
886 */
inv_mpu6050_set_lpf(struct inv_mpu6050_state * st,int rate)887 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
888 {
889 static const int hz[] = {400, 200, 90, 40, 20, 10};
890 static const int d[] = {
891 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
892 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
893 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
894 };
895 int i, result;
896 u8 data;
897
898 data = INV_MPU6050_FILTER_5HZ;
899 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
900 if (rate >= hz[i]) {
901 data = d[i];
902 break;
903 }
904 }
905 result = inv_mpu6050_set_lpf_regs(st, data);
906 if (result)
907 return result;
908 st->chip_config.lpf = data;
909
910 return 0;
911 }
912
913 /*
914 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
915 */
916 static ssize_t
inv_mpu6050_fifo_rate_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)917 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
918 const char *buf, size_t count)
919 {
920 int fifo_rate;
921 u8 d;
922 int result;
923 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
924 struct inv_mpu6050_state *st = iio_priv(indio_dev);
925 struct device *pdev = regmap_get_device(st->map);
926
927 if (kstrtoint(buf, 10, &fifo_rate))
928 return -EINVAL;
929 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
930 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
931 return -EINVAL;
932
933 /* compute the chip sample rate divider */
934 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
935 /* compute back the fifo rate to handle truncation cases */
936 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
937
938 mutex_lock(&st->lock);
939 if (d == st->chip_config.divider) {
940 result = 0;
941 goto fifo_rate_fail_unlock;
942 }
943 result = pm_runtime_resume_and_get(pdev);
944 if (result)
945 goto fifo_rate_fail_unlock;
946
947 result = regmap_write(st->map, st->reg->sample_rate_div, d);
948 if (result)
949 goto fifo_rate_fail_power_off;
950 st->chip_config.divider = d;
951
952 result = inv_mpu6050_set_lpf(st, fifo_rate);
953 if (result)
954 goto fifo_rate_fail_power_off;
955
956 /* update rate for magn, noop if not present in chip */
957 result = inv_mpu_magn_set_rate(st, fifo_rate);
958 if (result)
959 goto fifo_rate_fail_power_off;
960
961 pm_runtime_mark_last_busy(pdev);
962 fifo_rate_fail_power_off:
963 pm_runtime_put_autosuspend(pdev);
964 fifo_rate_fail_unlock:
965 mutex_unlock(&st->lock);
966 if (result)
967 return result;
968
969 return count;
970 }
971
972 /*
973 * inv_fifo_rate_show() - Get the current sampling rate.
974 */
975 static ssize_t
inv_fifo_rate_show(struct device * dev,struct device_attribute * attr,char * buf)976 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
977 char *buf)
978 {
979 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
980 unsigned fifo_rate;
981
982 mutex_lock(&st->lock);
983 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
984 mutex_unlock(&st->lock);
985
986 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
987 }
988
989 /*
990 * inv_attr_show() - calling this function will show current
991 * parameters.
992 *
993 * Deprecated in favor of IIO mounting matrix API.
994 *
995 * See inv_get_mount_matrix()
996 */
inv_attr_show(struct device * dev,struct device_attribute * attr,char * buf)997 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
998 char *buf)
999 {
1000 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1001 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1002 s8 *m;
1003
1004 switch (this_attr->address) {
1005 /*
1006 * In MPU6050, the two matrix are the same because gyro and accel
1007 * are integrated in one chip
1008 */
1009 case ATTR_GYRO_MATRIX:
1010 case ATTR_ACCL_MATRIX:
1011 m = st->plat_data.orientation;
1012
1013 return scnprintf(buf, PAGE_SIZE,
1014 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
1015 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1016 default:
1017 return -EINVAL;
1018 }
1019 }
1020
1021 /**
1022 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1023 * MPU6050 device.
1024 * @indio_dev: The IIO device
1025 * @trig: The new trigger
1026 *
1027 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1028 * device, -EINVAL otherwise.
1029 */
inv_mpu6050_validate_trigger(struct iio_dev * indio_dev,struct iio_trigger * trig)1030 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1031 struct iio_trigger *trig)
1032 {
1033 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1034
1035 if (st->trig != trig)
1036 return -EINVAL;
1037
1038 return 0;
1039 }
1040
1041 static const struct iio_mount_matrix *
inv_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)1042 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1043 const struct iio_chan_spec *chan)
1044 {
1045 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1046 const struct iio_mount_matrix *matrix;
1047
1048 if (chan->type == IIO_MAGN)
1049 matrix = &data->magn_orient;
1050 else
1051 matrix = &data->orientation;
1052
1053 return matrix;
1054 }
1055
1056 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1057 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1058 { }
1059 };
1060
1061 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1062 { \
1063 .type = _type, \
1064 .modified = 1, \
1065 .channel2 = _channel2, \
1066 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1067 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1068 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1069 .scan_index = _index, \
1070 .scan_type = { \
1071 .sign = 's', \
1072 .realbits = 16, \
1073 .storagebits = 16, \
1074 .shift = 0, \
1075 .endianness = IIO_BE, \
1076 }, \
1077 .ext_info = inv_ext_info, \
1078 }
1079
1080 #define INV_MPU6050_TEMP_CHAN(_index) \
1081 { \
1082 .type = IIO_TEMP, \
1083 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1084 | BIT(IIO_CHAN_INFO_OFFSET) \
1085 | BIT(IIO_CHAN_INFO_SCALE), \
1086 .scan_index = _index, \
1087 .scan_type = { \
1088 .sign = 's', \
1089 .realbits = 16, \
1090 .storagebits = 16, \
1091 .shift = 0, \
1092 .endianness = IIO_BE, \
1093 }, \
1094 }
1095
1096 static const struct iio_chan_spec inv_mpu_channels[] = {
1097 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1098
1099 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1100
1101 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1102 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1103 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1104
1105 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1106 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1107 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1108 };
1109
1110 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1111 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1112 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1113 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1114
1115 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1116 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1117 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1118 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1119
1120 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1121
1122 static const unsigned long inv_mpu_scan_masks[] = {
1123 /* 3-axis accel */
1124 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1125 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1126 /* 3-axis gyro */
1127 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1128 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1129 /* 6-axis accel + gyro */
1130 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1131 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1132 | INV_MPU6050_SCAN_MASK_TEMP,
1133 0,
1134 };
1135
1136 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1137 { \
1138 .type = IIO_MAGN, \
1139 .modified = 1, \
1140 .channel2 = _chan2, \
1141 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1142 BIT(IIO_CHAN_INFO_RAW), \
1143 .scan_index = _index, \
1144 .scan_type = { \
1145 .sign = 's', \
1146 .realbits = _bits, \
1147 .storagebits = 16, \
1148 .shift = 0, \
1149 .endianness = IIO_BE, \
1150 }, \
1151 .ext_info = inv_ext_info, \
1152 }
1153
1154 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1155 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1156
1157 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1158
1159 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1160 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1161 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1162
1163 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1164 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1165 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1166
1167 /* Magnetometer resolution is 13 bits */
1168 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1169 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1170 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1171 };
1172
1173 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1174 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1175
1176 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1177
1178 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1179 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1180 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1181
1182 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1183 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1184 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1185
1186 /* Magnetometer resolution is 16 bits */
1187 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1188 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1189 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1190 };
1191
1192 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1193 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1194 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1195 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1196
1197 static const unsigned long inv_mpu9x50_scan_masks[] = {
1198 /* 3-axis accel */
1199 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1200 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1201 /* 3-axis gyro */
1202 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1203 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1204 /* 3-axis magn */
1205 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1206 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1207 /* 6-axis accel + gyro */
1208 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1209 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1210 | INV_MPU6050_SCAN_MASK_TEMP,
1211 /* 6-axis accel + magn */
1212 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1213 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1214 | INV_MPU6050_SCAN_MASK_TEMP,
1215 /* 6-axis gyro + magn */
1216 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1217 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1218 | INV_MPU6050_SCAN_MASK_TEMP,
1219 /* 9-axis accel + gyro + magn */
1220 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1221 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1222 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1223 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1224 | INV_MPU6050_SCAN_MASK_TEMP,
1225 0,
1226 };
1227
1228 static const unsigned long inv_icm20602_scan_masks[] = {
1229 /* 3-axis accel + temp (mandatory) */
1230 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1231 /* 3-axis gyro + temp (mandatory) */
1232 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1233 /* 6-axis accel + gyro + temp (mandatory) */
1234 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1235 | INV_MPU6050_SCAN_MASK_TEMP,
1236 0,
1237 };
1238
1239 /*
1240 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1241 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1242 * low-pass filter. Specifically, each of these sampling rates are about twice
1243 * the bandwidth of a corresponding low-pass filter, which should eliminate
1244 * aliasing following the Nyquist principle. By picking a frequency different
1245 * from these, the user risks aliasing effects.
1246 */
1247 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1248 static IIO_CONST_ATTR(in_anglvel_scale_available,
1249 "0.000133090 0.000266181 0.000532362 0.001064724");
1250 static IIO_CONST_ATTR(in_accel_scale_available,
1251 "0.000598 0.001196 0.002392 0.004785");
1252 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1253 inv_mpu6050_fifo_rate_store);
1254
1255 /* Deprecated: kept for userspace backward compatibility. */
1256 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1257 ATTR_GYRO_MATRIX);
1258 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1259 ATTR_ACCL_MATRIX);
1260
1261 static struct attribute *inv_attributes[] = {
1262 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1263 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1264 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1265 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1266 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1267 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1268 NULL,
1269 };
1270
1271 static const struct attribute_group inv_attribute_group = {
1272 .attrs = inv_attributes
1273 };
1274
inv_mpu6050_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)1275 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1276 unsigned int reg,
1277 unsigned int writeval,
1278 unsigned int *readval)
1279 {
1280 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1281 int ret;
1282
1283 mutex_lock(&st->lock);
1284 if (readval)
1285 ret = regmap_read(st->map, reg, readval);
1286 else
1287 ret = regmap_write(st->map, reg, writeval);
1288 mutex_unlock(&st->lock);
1289
1290 return ret;
1291 }
1292
1293 static const struct iio_info mpu_info = {
1294 .read_raw = &inv_mpu6050_read_raw,
1295 .write_raw = &inv_mpu6050_write_raw,
1296 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1297 .attrs = &inv_attribute_group,
1298 .validate_trigger = inv_mpu6050_validate_trigger,
1299 .debugfs_reg_access = &inv_mpu6050_reg_access,
1300 };
1301
1302 /*
1303 * inv_check_and_setup_chip() - check and setup chip.
1304 */
inv_check_and_setup_chip(struct inv_mpu6050_state * st)1305 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1306 {
1307 int result;
1308 unsigned int regval, mask;
1309 int i;
1310
1311 st->hw = &hw_info[st->chip_type];
1312 st->reg = hw_info[st->chip_type].reg;
1313 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1314 sizeof(st->chip_config));
1315
1316 /* check chip self-identification */
1317 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1318 if (result)
1319 return result;
1320 if (regval != st->hw->whoami) {
1321 /* check whoami against all possible values */
1322 for (i = 0; i < INV_NUM_PARTS; ++i) {
1323 if (regval == hw_info[i].whoami) {
1324 dev_warn(regmap_get_device(st->map),
1325 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
1326 regval, hw_info[i].name,
1327 st->hw->whoami, st->hw->name);
1328 break;
1329 }
1330 }
1331 if (i >= INV_NUM_PARTS) {
1332 dev_err(regmap_get_device(st->map),
1333 "invalid whoami 0x%02x expected 0x%02x (%s)\n",
1334 regval, st->hw->whoami, st->hw->name);
1335 return -ENODEV;
1336 }
1337 }
1338
1339 /* reset to make sure previous state are not there */
1340 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1341 INV_MPU6050_BIT_H_RESET);
1342 if (result)
1343 return result;
1344 msleep(INV_MPU6050_POWER_UP_TIME);
1345 switch (st->chip_type) {
1346 case INV_MPU6000:
1347 case INV_MPU6500:
1348 case INV_MPU6515:
1349 case INV_MPU6880:
1350 case INV_MPU9250:
1351 case INV_MPU9255:
1352 /* reset signal path (required for spi connection) */
1353 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1354 INV_MPU6050_BIT_GYRO_RST;
1355 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1356 regval);
1357 if (result)
1358 return result;
1359 msleep(INV_MPU6050_POWER_UP_TIME);
1360 break;
1361 default:
1362 break;
1363 }
1364
1365 /*
1366 * Turn power on. After reset, the sleep bit could be on
1367 * or off depending on the OTP settings. Turning power on
1368 * make it in a definite state as well as making the hardware
1369 * state align with the software state
1370 */
1371 result = inv_mpu6050_set_power_itg(st, true);
1372 if (result)
1373 return result;
1374 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1375 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1376 result = inv_mpu6050_switch_engine(st, false, mask);
1377 if (result)
1378 goto error_power_off;
1379
1380 return 0;
1381
1382 error_power_off:
1383 inv_mpu6050_set_power_itg(st, false);
1384 return result;
1385 }
1386
inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state * st)1387 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1388 {
1389 int result;
1390
1391 result = regulator_enable(st->vddio_supply);
1392 if (result) {
1393 dev_err(regmap_get_device(st->map),
1394 "Failed to enable vddio regulator: %d\n", result);
1395 } else {
1396 /* Give the device a little bit of time to start up. */
1397 usleep_range(3000, 5000);
1398 }
1399
1400 return result;
1401 }
1402
inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state * st)1403 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1404 {
1405 int result;
1406
1407 result = regulator_disable(st->vddio_supply);
1408 if (result)
1409 dev_err(regmap_get_device(st->map),
1410 "Failed to disable vddio regulator: %d\n", result);
1411
1412 return result;
1413 }
1414
inv_mpu_core_disable_regulator_action(void * _data)1415 static void inv_mpu_core_disable_regulator_action(void *_data)
1416 {
1417 struct inv_mpu6050_state *st = _data;
1418 int result;
1419
1420 result = regulator_disable(st->vdd_supply);
1421 if (result)
1422 dev_err(regmap_get_device(st->map),
1423 "Failed to disable vdd regulator: %d\n", result);
1424
1425 inv_mpu_core_disable_regulator_vddio(st);
1426 }
1427
inv_mpu_pm_disable(void * data)1428 static void inv_mpu_pm_disable(void *data)
1429 {
1430 struct device *dev = data;
1431
1432 pm_runtime_disable(dev);
1433 }
1434
inv_mpu_core_probe(struct regmap * regmap,int irq,const char * name,int (* inv_mpu_bus_setup)(struct iio_dev *),int chip_type)1435 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1436 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1437 {
1438 struct inv_mpu6050_state *st;
1439 struct iio_dev *indio_dev;
1440 struct inv_mpu6050_platform_data *pdata;
1441 struct device *dev = regmap_get_device(regmap);
1442 int result;
1443 struct irq_data *desc;
1444 int irq_type;
1445
1446 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1447 if (!indio_dev)
1448 return -ENOMEM;
1449
1450 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1451 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1452 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1453 chip_type, name);
1454 return -ENODEV;
1455 }
1456 st = iio_priv(indio_dev);
1457 mutex_init(&st->lock);
1458 st->chip_type = chip_type;
1459 st->irq = irq;
1460 st->map = regmap;
1461
1462 pdata = dev_get_platdata(dev);
1463 if (!pdata) {
1464 result = iio_read_mount_matrix(dev, &st->orientation);
1465 if (result) {
1466 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1467 result);
1468 return result;
1469 }
1470 } else {
1471 st->plat_data = *pdata;
1472 }
1473
1474 if (irq > 0) {
1475 desc = irq_get_irq_data(irq);
1476 if (!desc) {
1477 dev_err(dev, "Could not find IRQ %d\n", irq);
1478 return -EINVAL;
1479 }
1480
1481 irq_type = irqd_get_trigger_type(desc);
1482 if (!irq_type)
1483 irq_type = IRQF_TRIGGER_RISING;
1484 } else {
1485 /* Doesn't really matter, use the default */
1486 irq_type = IRQF_TRIGGER_RISING;
1487 }
1488
1489 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1490 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1491 else if (irq_type == IRQF_TRIGGER_FALLING)
1492 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1493 else if (irq_type == IRQF_TRIGGER_HIGH)
1494 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1495 INV_MPU6050_LATCH_INT_EN;
1496 else if (irq_type == IRQF_TRIGGER_LOW)
1497 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1498 INV_MPU6050_LATCH_INT_EN;
1499 else {
1500 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1501 irq_type);
1502 return -EINVAL;
1503 }
1504
1505 st->vdd_supply = devm_regulator_get(dev, "vdd");
1506 if (IS_ERR(st->vdd_supply))
1507 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1508 "Failed to get vdd regulator\n");
1509
1510 st->vddio_supply = devm_regulator_get(dev, "vddio");
1511 if (IS_ERR(st->vddio_supply))
1512 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1513 "Failed to get vddio regulator\n");
1514
1515 result = regulator_enable(st->vdd_supply);
1516 if (result) {
1517 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1518 return result;
1519 }
1520 msleep(INV_MPU6050_POWER_UP_TIME);
1521
1522 result = inv_mpu_core_enable_regulator_vddio(st);
1523 if (result) {
1524 regulator_disable(st->vdd_supply);
1525 return result;
1526 }
1527
1528 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1529 st);
1530 if (result) {
1531 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1532 result);
1533 return result;
1534 }
1535
1536 /* fill magnetometer orientation */
1537 result = inv_mpu_magn_set_orient(st);
1538 if (result)
1539 return result;
1540
1541 /* power is turned on inside check chip type*/
1542 result = inv_check_and_setup_chip(st);
1543 if (result)
1544 return result;
1545
1546 result = inv_mpu6050_init_config(indio_dev);
1547 if (result) {
1548 dev_err(dev, "Could not initialize device.\n");
1549 goto error_power_off;
1550 }
1551
1552 dev_set_drvdata(dev, indio_dev);
1553 /* name will be NULL when enumerated via ACPI */
1554 if (name)
1555 indio_dev->name = name;
1556 else
1557 indio_dev->name = dev_name(dev);
1558
1559 /* requires parent device set in indio_dev */
1560 if (inv_mpu_bus_setup) {
1561 result = inv_mpu_bus_setup(indio_dev);
1562 if (result)
1563 goto error_power_off;
1564 }
1565
1566 /* chip init is done, turning on runtime power management */
1567 result = pm_runtime_set_active(dev);
1568 if (result)
1569 goto error_power_off;
1570 pm_runtime_get_noresume(dev);
1571 pm_runtime_enable(dev);
1572 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
1573 pm_runtime_use_autosuspend(dev);
1574 pm_runtime_put(dev);
1575 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
1576 if (result)
1577 return result;
1578
1579 switch (chip_type) {
1580 case INV_MPU9150:
1581 indio_dev->channels = inv_mpu9150_channels;
1582 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
1583 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1584 break;
1585 case INV_MPU9250:
1586 case INV_MPU9255:
1587 indio_dev->channels = inv_mpu9250_channels;
1588 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1589 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1590 break;
1591 case INV_ICM20602:
1592 indio_dev->channels = inv_mpu_channels;
1593 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1594 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1595 break;
1596 default:
1597 indio_dev->channels = inv_mpu_channels;
1598 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1599 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1600 break;
1601 }
1602 /*
1603 * Use magnetometer inside the chip only if there is no i2c
1604 * auxiliary device in use. Otherwise Going back to 6-axis only.
1605 */
1606 if (st->magn_disabled) {
1607 indio_dev->channels = inv_mpu_channels;
1608 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1609 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1610 }
1611
1612 indio_dev->info = &mpu_info;
1613
1614 if (irq > 0) {
1615 /*
1616 * The driver currently only supports buffered capture with its
1617 * own trigger. So no IRQ, no trigger, no buffer
1618 */
1619 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1620 iio_pollfunc_store_time,
1621 inv_mpu6050_read_fifo,
1622 NULL);
1623 if (result) {
1624 dev_err(dev, "configure buffer fail %d\n", result);
1625 return result;
1626 }
1627
1628 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1629 if (result) {
1630 dev_err(dev, "trigger probe fail %d\n", result);
1631 return result;
1632 }
1633 }
1634
1635 result = devm_iio_device_register(dev, indio_dev);
1636 if (result) {
1637 dev_err(dev, "IIO register fail %d\n", result);
1638 return result;
1639 }
1640
1641 return 0;
1642
1643 error_power_off:
1644 inv_mpu6050_set_power_itg(st, false);
1645 return result;
1646 }
1647 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1648
inv_mpu_resume(struct device * dev)1649 static int __maybe_unused inv_mpu_resume(struct device *dev)
1650 {
1651 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1652 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1653 int result;
1654
1655 mutex_lock(&st->lock);
1656 result = inv_mpu_core_enable_regulator_vddio(st);
1657 if (result)
1658 goto out_unlock;
1659
1660 result = inv_mpu6050_set_power_itg(st, true);
1661 if (result)
1662 goto out_unlock;
1663
1664 pm_runtime_disable(dev);
1665 pm_runtime_set_active(dev);
1666 pm_runtime_enable(dev);
1667
1668 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
1669 if (result)
1670 goto out_unlock;
1671
1672 if (iio_buffer_enabled(indio_dev))
1673 result = inv_mpu6050_prepare_fifo(st, true);
1674
1675 out_unlock:
1676 mutex_unlock(&st->lock);
1677
1678 return result;
1679 }
1680
inv_mpu_suspend(struct device * dev)1681 static int __maybe_unused inv_mpu_suspend(struct device *dev)
1682 {
1683 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1684 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1685 int result;
1686
1687 mutex_lock(&st->lock);
1688
1689 st->suspended_sensors = 0;
1690 if (pm_runtime_suspended(dev)) {
1691 result = 0;
1692 goto out_unlock;
1693 }
1694
1695 if (iio_buffer_enabled(indio_dev)) {
1696 result = inv_mpu6050_prepare_fifo(st, false);
1697 if (result)
1698 goto out_unlock;
1699 }
1700
1701 if (st->chip_config.accl_en)
1702 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
1703 if (st->chip_config.gyro_en)
1704 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
1705 if (st->chip_config.temp_en)
1706 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
1707 if (st->chip_config.magn_en)
1708 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
1709 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
1710 if (result)
1711 goto out_unlock;
1712
1713 result = inv_mpu6050_set_power_itg(st, false);
1714 if (result)
1715 goto out_unlock;
1716
1717 inv_mpu_core_disable_regulator_vddio(st);
1718 out_unlock:
1719 mutex_unlock(&st->lock);
1720
1721 return result;
1722 }
1723
inv_mpu_runtime_suspend(struct device * dev)1724 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev)
1725 {
1726 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1727 unsigned int sensors;
1728 int ret;
1729
1730 mutex_lock(&st->lock);
1731
1732 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1733 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1734 ret = inv_mpu6050_switch_engine(st, false, sensors);
1735 if (ret)
1736 goto out_unlock;
1737
1738 ret = inv_mpu6050_set_power_itg(st, false);
1739 if (ret)
1740 goto out_unlock;
1741
1742 inv_mpu_core_disable_regulator_vddio(st);
1743
1744 out_unlock:
1745 mutex_unlock(&st->lock);
1746 return ret;
1747 }
1748
inv_mpu_runtime_resume(struct device * dev)1749 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev)
1750 {
1751 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1752 int ret;
1753
1754 ret = inv_mpu_core_enable_regulator_vddio(st);
1755 if (ret)
1756 return ret;
1757
1758 return inv_mpu6050_set_power_itg(st, true);
1759 }
1760
1761 const struct dev_pm_ops inv_mpu_pmops = {
1762 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
1763 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
1764 };
1765 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1766
1767 MODULE_AUTHOR("Invensense Corporation");
1768 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1769 MODULE_LICENSE("GPL");
1770