1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * i.MX IPUv3 DP Overlay Planes
4 *
5 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 */
7
8 #include <drm/drm_atomic.h>
9 #include <drm/drm_atomic_helper.h>
10 #include <drm/drm_fb_cma_helper.h>
11 #include <drm/drm_fourcc.h>
12 #include <drm/drm_gem_atomic_helper.h>
13 #include <drm/drm_gem_cma_helper.h>
14 #include <drm/drm_managed.h>
15 #include <drm/drm_plane_helper.h>
16
17 #include <video/imx-ipu-v3.h>
18
19 #include "imx-drm.h"
20 #include "ipuv3-plane.h"
21
22 struct ipu_plane_state {
23 struct drm_plane_state base;
24 bool use_pre;
25 };
26
27 static inline struct ipu_plane_state *
to_ipu_plane_state(struct drm_plane_state * p)28 to_ipu_plane_state(struct drm_plane_state *p)
29 {
30 return container_of(p, struct ipu_plane_state, base);
31 }
32
ipu_src_rect_width(const struct drm_plane_state * state)33 static unsigned int ipu_src_rect_width(const struct drm_plane_state *state)
34 {
35 return ALIGN(drm_rect_width(&state->src) >> 16, 8);
36 }
37
to_ipu_plane(struct drm_plane * p)38 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
39 {
40 return container_of(p, struct ipu_plane, base);
41 }
42
43 static const uint32_t ipu_plane_all_formats[] = {
44 DRM_FORMAT_ARGB1555,
45 DRM_FORMAT_XRGB1555,
46 DRM_FORMAT_ABGR1555,
47 DRM_FORMAT_XBGR1555,
48 DRM_FORMAT_RGBA5551,
49 DRM_FORMAT_BGRA5551,
50 DRM_FORMAT_ARGB4444,
51 DRM_FORMAT_ARGB8888,
52 DRM_FORMAT_XRGB8888,
53 DRM_FORMAT_ABGR8888,
54 DRM_FORMAT_XBGR8888,
55 DRM_FORMAT_RGBA8888,
56 DRM_FORMAT_RGBX8888,
57 DRM_FORMAT_BGRA8888,
58 DRM_FORMAT_BGRX8888,
59 DRM_FORMAT_UYVY,
60 DRM_FORMAT_VYUY,
61 DRM_FORMAT_YUYV,
62 DRM_FORMAT_YVYU,
63 DRM_FORMAT_YUV420,
64 DRM_FORMAT_YVU420,
65 DRM_FORMAT_YUV422,
66 DRM_FORMAT_YVU422,
67 DRM_FORMAT_YUV444,
68 DRM_FORMAT_YVU444,
69 DRM_FORMAT_NV12,
70 DRM_FORMAT_NV16,
71 DRM_FORMAT_RGB565,
72 DRM_FORMAT_RGB565_A8,
73 DRM_FORMAT_BGR565_A8,
74 DRM_FORMAT_RGB888_A8,
75 DRM_FORMAT_BGR888_A8,
76 DRM_FORMAT_RGBX8888_A8,
77 DRM_FORMAT_BGRX8888_A8,
78 };
79
80 static const uint32_t ipu_plane_rgb_formats[] = {
81 DRM_FORMAT_ARGB1555,
82 DRM_FORMAT_XRGB1555,
83 DRM_FORMAT_ABGR1555,
84 DRM_FORMAT_XBGR1555,
85 DRM_FORMAT_RGBA5551,
86 DRM_FORMAT_BGRA5551,
87 DRM_FORMAT_ARGB4444,
88 DRM_FORMAT_ARGB8888,
89 DRM_FORMAT_XRGB8888,
90 DRM_FORMAT_ABGR8888,
91 DRM_FORMAT_XBGR8888,
92 DRM_FORMAT_RGBA8888,
93 DRM_FORMAT_RGBX8888,
94 DRM_FORMAT_BGRA8888,
95 DRM_FORMAT_BGRX8888,
96 DRM_FORMAT_RGB565,
97 DRM_FORMAT_RGB565_A8,
98 DRM_FORMAT_BGR565_A8,
99 DRM_FORMAT_RGB888_A8,
100 DRM_FORMAT_BGR888_A8,
101 DRM_FORMAT_RGBX8888_A8,
102 DRM_FORMAT_BGRX8888_A8,
103 };
104
105 static const uint64_t ipu_format_modifiers[] = {
106 DRM_FORMAT_MOD_LINEAR,
107 DRM_FORMAT_MOD_INVALID
108 };
109
110 static const uint64_t pre_format_modifiers[] = {
111 DRM_FORMAT_MOD_LINEAR,
112 DRM_FORMAT_MOD_VIVANTE_TILED,
113 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
114 DRM_FORMAT_MOD_INVALID
115 };
116
ipu_plane_irq(struct ipu_plane * ipu_plane)117 int ipu_plane_irq(struct ipu_plane *ipu_plane)
118 {
119 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
120 IPU_IRQ_EOF);
121 }
122
123 static inline unsigned long
drm_plane_state_to_eba(struct drm_plane_state * state,int plane)124 drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
125 {
126 struct drm_framebuffer *fb = state->fb;
127 struct drm_gem_cma_object *cma_obj;
128 int x = state->src.x1 >> 16;
129 int y = state->src.y1 >> 16;
130
131 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
132 BUG_ON(!cma_obj);
133
134 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
135 fb->format->cpp[plane] * x;
136 }
137
138 static inline unsigned long
drm_plane_state_to_ubo(struct drm_plane_state * state)139 drm_plane_state_to_ubo(struct drm_plane_state *state)
140 {
141 struct drm_framebuffer *fb = state->fb;
142 struct drm_gem_cma_object *cma_obj;
143 unsigned long eba = drm_plane_state_to_eba(state, 0);
144 int x = state->src.x1 >> 16;
145 int y = state->src.y1 >> 16;
146
147 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
148 BUG_ON(!cma_obj);
149
150 x /= fb->format->hsub;
151 y /= fb->format->vsub;
152
153 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
154 fb->format->cpp[1] * x - eba;
155 }
156
157 static inline unsigned long
drm_plane_state_to_vbo(struct drm_plane_state * state)158 drm_plane_state_to_vbo(struct drm_plane_state *state)
159 {
160 struct drm_framebuffer *fb = state->fb;
161 struct drm_gem_cma_object *cma_obj;
162 unsigned long eba = drm_plane_state_to_eba(state, 0);
163 int x = state->src.x1 >> 16;
164 int y = state->src.y1 >> 16;
165
166 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
167 BUG_ON(!cma_obj);
168
169 x /= fb->format->hsub;
170 y /= fb->format->vsub;
171
172 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
173 fb->format->cpp[2] * x - eba;
174 }
175
ipu_plane_put_resources(struct drm_device * dev,void * ptr)176 static void ipu_plane_put_resources(struct drm_device *dev, void *ptr)
177 {
178 struct ipu_plane *ipu_plane = ptr;
179
180 if (!IS_ERR_OR_NULL(ipu_plane->dp))
181 ipu_dp_put(ipu_plane->dp);
182 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
183 ipu_dmfc_put(ipu_plane->dmfc);
184 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
185 ipu_idmac_put(ipu_plane->ipu_ch);
186 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
187 ipu_idmac_put(ipu_plane->alpha_ch);
188 }
189
ipu_plane_get_resources(struct drm_device * dev,struct ipu_plane * ipu_plane)190 static int ipu_plane_get_resources(struct drm_device *dev,
191 struct ipu_plane *ipu_plane)
192 {
193 int ret;
194 int alpha_ch;
195
196 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
197 if (IS_ERR(ipu_plane->ipu_ch)) {
198 ret = PTR_ERR(ipu_plane->ipu_ch);
199 DRM_ERROR("failed to get idmac channel: %d\n", ret);
200 return ret;
201 }
202
203 ret = drmm_add_action_or_reset(dev, ipu_plane_put_resources, ipu_plane);
204 if (ret)
205 return ret;
206
207 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
208 if (alpha_ch >= 0) {
209 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
210 if (IS_ERR(ipu_plane->alpha_ch)) {
211 ret = PTR_ERR(ipu_plane->alpha_ch);
212 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
213 alpha_ch, ret);
214 return ret;
215 }
216 }
217
218 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
219 if (IS_ERR(ipu_plane->dmfc)) {
220 ret = PTR_ERR(ipu_plane->dmfc);
221 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
222 return ret;
223 }
224
225 if (ipu_plane->dp_flow >= 0) {
226 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
227 if (IS_ERR(ipu_plane->dp)) {
228 ret = PTR_ERR(ipu_plane->dp);
229 DRM_ERROR("failed to get dp flow: %d\n", ret);
230 return ret;
231 }
232 }
233
234 return 0;
235 }
236
ipu_plane_separate_alpha(struct ipu_plane * ipu_plane)237 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
238 {
239 switch (ipu_plane->base.state->fb->format->format) {
240 case DRM_FORMAT_RGB565_A8:
241 case DRM_FORMAT_BGR565_A8:
242 case DRM_FORMAT_RGB888_A8:
243 case DRM_FORMAT_BGR888_A8:
244 case DRM_FORMAT_RGBX8888_A8:
245 case DRM_FORMAT_BGRX8888_A8:
246 return true;
247 default:
248 return false;
249 }
250 }
251
ipu_plane_enable(struct ipu_plane * ipu_plane)252 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
253 {
254 if (ipu_plane->dp)
255 ipu_dp_enable(ipu_plane->ipu);
256 ipu_dmfc_enable_channel(ipu_plane->dmfc);
257 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
258 if (ipu_plane_separate_alpha(ipu_plane))
259 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
260 if (ipu_plane->dp)
261 ipu_dp_enable_channel(ipu_plane->dp);
262 }
263
ipu_plane_disable(struct ipu_plane * ipu_plane,bool disable_dp_channel)264 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
265 {
266 int ret;
267
268 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
269
270 ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
271 if (ret == -ETIMEDOUT) {
272 DRM_ERROR("[PLANE:%d] IDMAC timeout\n",
273 ipu_plane->base.base.id);
274 }
275
276 if (ipu_plane->dp && disable_dp_channel)
277 ipu_dp_disable_channel(ipu_plane->dp, false);
278 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
279 if (ipu_plane->alpha_ch)
280 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
281 ipu_dmfc_disable_channel(ipu_plane->dmfc);
282 if (ipu_plane->dp)
283 ipu_dp_disable(ipu_plane->ipu);
284 if (ipu_prg_present(ipu_plane->ipu))
285 ipu_prg_channel_disable(ipu_plane->ipu_ch);
286 }
287
ipu_plane_disable_deferred(struct drm_plane * plane)288 void ipu_plane_disable_deferred(struct drm_plane *plane)
289 {
290 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
291
292 if (ipu_plane->disabling) {
293 ipu_plane->disabling = false;
294 ipu_plane_disable(ipu_plane, false);
295 }
296 }
297
ipu_plane_state_reset(struct drm_plane * plane)298 static void ipu_plane_state_reset(struct drm_plane *plane)
299 {
300 unsigned int zpos = (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
301 struct ipu_plane_state *ipu_state;
302
303 if (plane->state) {
304 ipu_state = to_ipu_plane_state(plane->state);
305 __drm_atomic_helper_plane_destroy_state(plane->state);
306 kfree(ipu_state);
307 plane->state = NULL;
308 }
309
310 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
311
312 if (ipu_state) {
313 __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
314 ipu_state->base.zpos = zpos;
315 ipu_state->base.normalized_zpos = zpos;
316 ipu_state->base.color_encoding = DRM_COLOR_YCBCR_BT601;
317 ipu_state->base.color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;
318 }
319 }
320
321 static struct drm_plane_state *
ipu_plane_duplicate_state(struct drm_plane * plane)322 ipu_plane_duplicate_state(struct drm_plane *plane)
323 {
324 struct ipu_plane_state *state;
325
326 if (WARN_ON(!plane->state))
327 return NULL;
328
329 state = kmalloc(sizeof(*state), GFP_KERNEL);
330 if (state)
331 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
332
333 return &state->base;
334 }
335
ipu_plane_destroy_state(struct drm_plane * plane,struct drm_plane_state * state)336 static void ipu_plane_destroy_state(struct drm_plane *plane,
337 struct drm_plane_state *state)
338 {
339 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
340
341 __drm_atomic_helper_plane_destroy_state(state);
342 kfree(ipu_state);
343 }
344
ipu_plane_format_mod_supported(struct drm_plane * plane,uint32_t format,uint64_t modifier)345 static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
346 uint32_t format, uint64_t modifier)
347 {
348 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
349
350 /* linear is supported for all planes and formats */
351 if (modifier == DRM_FORMAT_MOD_LINEAR)
352 return true;
353
354 /*
355 * Without a PRG the possible modifiers list only includes the linear
356 * modifier, so we always take the early return from this function and
357 * only end up here if the PRG is present.
358 */
359 return ipu_prg_format_supported(ipu, format, modifier);
360 }
361
362 static const struct drm_plane_funcs ipu_plane_funcs = {
363 .update_plane = drm_atomic_helper_update_plane,
364 .disable_plane = drm_atomic_helper_disable_plane,
365 .reset = ipu_plane_state_reset,
366 .atomic_duplicate_state = ipu_plane_duplicate_state,
367 .atomic_destroy_state = ipu_plane_destroy_state,
368 .format_mod_supported = ipu_plane_format_mod_supported,
369 };
370
ipu_plane_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)371 static int ipu_plane_atomic_check(struct drm_plane *plane,
372 struct drm_atomic_state *state)
373 {
374 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
375 plane);
376 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
377 plane);
378 struct drm_crtc_state *crtc_state;
379 struct device *dev = plane->dev->dev;
380 struct drm_framebuffer *fb = new_state->fb;
381 struct drm_framebuffer *old_fb = old_state->fb;
382 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
383 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
384 int ret;
385
386 /* Ok to disable */
387 if (!fb)
388 return 0;
389
390 if (WARN_ON(!new_state->crtc))
391 return -EINVAL;
392
393 crtc_state =
394 drm_atomic_get_existing_crtc_state(state,
395 new_state->crtc);
396 if (WARN_ON(!crtc_state))
397 return -EINVAL;
398
399 ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
400 DRM_PLANE_HELPER_NO_SCALING,
401 DRM_PLANE_HELPER_NO_SCALING,
402 can_position, true);
403 if (ret)
404 return ret;
405
406 /* nothing to check when disabling or disabled */
407 if (!crtc_state->enable)
408 return 0;
409
410 switch (plane->type) {
411 case DRM_PLANE_TYPE_PRIMARY:
412 /* full plane minimum width is 13 pixels */
413 if (drm_rect_width(&new_state->dst) < 13)
414 return -EINVAL;
415 break;
416 case DRM_PLANE_TYPE_OVERLAY:
417 break;
418 default:
419 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
420 return -EINVAL;
421 }
422
423 if (drm_rect_height(&new_state->dst) < 2)
424 return -EINVAL;
425
426 /*
427 * We support resizing active plane or changing its format by
428 * forcing CRTC mode change in plane's ->atomic_check callback
429 * and disabling all affected active planes in CRTC's ->atomic_disable
430 * callback. The planes will be reenabled in plane's ->atomic_update
431 * callback.
432 */
433 if (old_fb &&
434 (drm_rect_width(&new_state->dst) != drm_rect_width(&old_state->dst) ||
435 drm_rect_height(&new_state->dst) != drm_rect_height(&old_state->dst) ||
436 fb->format != old_fb->format))
437 crtc_state->mode_changed = true;
438
439 eba = drm_plane_state_to_eba(new_state, 0);
440
441 if (eba & 0x7)
442 return -EINVAL;
443
444 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
445 return -EINVAL;
446
447 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
448 crtc_state->mode_changed = true;
449
450 if (ALIGN(fb->width, 8) * fb->format->cpp[0] >
451 fb->pitches[0] + fb->offsets[0]) {
452 dev_warn(dev, "pitch is not big enough for 8 pixels alignment");
453 return -EINVAL;
454 }
455
456 switch (fb->format->format) {
457 case DRM_FORMAT_YUV420:
458 case DRM_FORMAT_YVU420:
459 case DRM_FORMAT_YUV422:
460 case DRM_FORMAT_YVU422:
461 case DRM_FORMAT_YUV444:
462 case DRM_FORMAT_YVU444:
463 /*
464 * Multiplanar formats have to meet the following restrictions:
465 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
466 * - EBA, UBO and VBO are a multiple of 8
467 * - UBO and VBO are unsigned and not larger than 0xfffff8
468 * - Only EBA may be changed while scanout is active
469 * - The strides of U and V planes must be identical.
470 */
471 vbo = drm_plane_state_to_vbo(new_state);
472
473 if (vbo & 0x7 || vbo > 0xfffff8)
474 return -EINVAL;
475
476 if (old_fb && (fb->format == old_fb->format)) {
477 old_vbo = drm_plane_state_to_vbo(old_state);
478 if (vbo != old_vbo)
479 crtc_state->mode_changed = true;
480 }
481
482 if (fb->pitches[1] != fb->pitches[2])
483 return -EINVAL;
484
485 fallthrough;
486 case DRM_FORMAT_NV12:
487 case DRM_FORMAT_NV16:
488 ubo = drm_plane_state_to_ubo(new_state);
489
490 if (ubo & 0x7 || ubo > 0xfffff8)
491 return -EINVAL;
492
493 if (old_fb && (fb->format == old_fb->format)) {
494 old_ubo = drm_plane_state_to_ubo(old_state);
495 if (ubo != old_ubo)
496 crtc_state->mode_changed = true;
497 }
498
499 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
500 return -EINVAL;
501
502 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
503 crtc_state->mode_changed = true;
504
505 /*
506 * The x/y offsets must be even in case of horizontal/vertical
507 * chroma subsampling.
508 */
509 if (((new_state->src.x1 >> 16) & (fb->format->hsub - 1)) ||
510 ((new_state->src.y1 >> 16) & (fb->format->vsub - 1)))
511 return -EINVAL;
512 break;
513 case DRM_FORMAT_RGB565_A8:
514 case DRM_FORMAT_BGR565_A8:
515 case DRM_FORMAT_RGB888_A8:
516 case DRM_FORMAT_BGR888_A8:
517 case DRM_FORMAT_RGBX8888_A8:
518 case DRM_FORMAT_BGRX8888_A8:
519 alpha_eba = drm_plane_state_to_eba(new_state, 1);
520 if (alpha_eba & 0x7)
521 return -EINVAL;
522
523 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
524 return -EINVAL;
525
526 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
527 crtc_state->mode_changed = true;
528 break;
529 }
530
531 return 0;
532 }
533
ipu_plane_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)534 static void ipu_plane_atomic_disable(struct drm_plane *plane,
535 struct drm_atomic_state *state)
536 {
537 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
538
539 if (ipu_plane->dp)
540 ipu_dp_disable_channel(ipu_plane->dp, true);
541 ipu_plane->disabling = true;
542 }
543
ipu_chan_assign_axi_id(int ipu_chan)544 static int ipu_chan_assign_axi_id(int ipu_chan)
545 {
546 switch (ipu_chan) {
547 case IPUV3_CHANNEL_MEM_BG_SYNC:
548 return 1;
549 case IPUV3_CHANNEL_MEM_FG_SYNC:
550 return 2;
551 case IPUV3_CHANNEL_MEM_DC_SYNC:
552 return 3;
553 default:
554 return 0;
555 }
556 }
557
ipu_calculate_bursts(u32 width,u32 cpp,u32 stride,u8 * burstsize,u8 * num_bursts)558 static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
559 u8 *burstsize, u8 *num_bursts)
560 {
561 const unsigned int width_bytes = width * cpp;
562 unsigned int npb, bursts;
563
564 /* Maximum number of pixels per burst without overshooting stride */
565 for (npb = 64 / cpp; npb > 0; --npb) {
566 if (round_up(width_bytes, npb * cpp) <= stride)
567 break;
568 }
569 *burstsize = npb;
570
571 /* Maximum number of consecutive bursts without overshooting stride */
572 for (bursts = 8; bursts > 1; bursts /= 2) {
573 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
574 break;
575 }
576 *num_bursts = bursts;
577 }
578
ipu_plane_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)579 static void ipu_plane_atomic_update(struct drm_plane *plane,
580 struct drm_atomic_state *state)
581 {
582 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
583 plane);
584 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
585 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
586 plane);
587 struct ipu_plane_state *ipu_state = to_ipu_plane_state(new_state);
588 struct drm_crtc_state *crtc_state = new_state->crtc->state;
589 struct drm_framebuffer *fb = new_state->fb;
590 struct drm_rect *dst = &new_state->dst;
591 unsigned long eba, ubo, vbo;
592 unsigned long alpha_eba = 0;
593 enum ipu_color_space ics;
594 unsigned int axi_id = 0;
595 const struct drm_format_info *info;
596 u8 burstsize, num_bursts;
597 u32 width, height;
598 int active;
599
600 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
601 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
602
603 switch (ipu_plane->dp_flow) {
604 case IPU_DP_FLOW_SYNC_BG:
605 if (new_state->normalized_zpos == 1) {
606 ipu_dp_set_global_alpha(ipu_plane->dp,
607 !fb->format->has_alpha, 0xff,
608 true);
609 } else {
610 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
611 }
612 break;
613 case IPU_DP_FLOW_SYNC_FG:
614 if (new_state->normalized_zpos == 1) {
615 ipu_dp_set_global_alpha(ipu_plane->dp,
616 !fb->format->has_alpha, 0xff,
617 false);
618 }
619 break;
620 }
621
622 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_BG)
623 width = ipu_src_rect_width(new_state);
624 else
625 width = drm_rect_width(&new_state->src) >> 16;
626
627 eba = drm_plane_state_to_eba(new_state, 0);
628
629 /*
630 * Configure PRG channel and attached PRE, this changes the EBA to an
631 * internal SRAM location.
632 */
633 if (ipu_state->use_pre) {
634 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
635 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id, width,
636 drm_rect_height(&new_state->src) >> 16,
637 fb->pitches[0], fb->format->format,
638 fb->modifier, &eba);
639 }
640
641 if (!old_state->fb ||
642 old_state->fb->format->format != fb->format->format ||
643 old_state->color_encoding != new_state->color_encoding ||
644 old_state->color_range != new_state->color_range) {
645 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
646 switch (ipu_plane->dp_flow) {
647 case IPU_DP_FLOW_SYNC_BG:
648 ipu_dp_setup_channel(ipu_plane->dp, new_state->color_encoding,
649 new_state->color_range, ics,
650 IPUV3_COLORSPACE_RGB);
651 break;
652 case IPU_DP_FLOW_SYNC_FG:
653 ipu_dp_setup_channel(ipu_plane->dp, new_state->color_encoding,
654 new_state->color_range, ics,
655 IPUV3_COLORSPACE_UNKNOWN);
656 break;
657 }
658 }
659
660 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
661 /* nothing to do if PRE is used */
662 if (ipu_state->use_pre)
663 return;
664 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
665 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
666 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
667 if (ipu_plane_separate_alpha(ipu_plane)) {
668 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
669 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
670 alpha_eba);
671 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
672 }
673 return;
674 }
675
676 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
677 switch (ipu_plane->dp_flow) {
678 case IPU_DP_FLOW_SYNC_BG:
679 ipu_dp_setup_channel(ipu_plane->dp, DRM_COLOR_YCBCR_BT601,
680 DRM_COLOR_YCBCR_LIMITED_RANGE, ics,
681 IPUV3_COLORSPACE_RGB);
682 break;
683 case IPU_DP_FLOW_SYNC_FG:
684 ipu_dp_setup_channel(ipu_plane->dp, DRM_COLOR_YCBCR_BT601,
685 DRM_COLOR_YCBCR_LIMITED_RANGE, ics,
686 IPUV3_COLORSPACE_UNKNOWN);
687 break;
688 }
689
690 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, width);
691
692 height = drm_rect_height(&new_state->src) >> 16;
693 info = drm_format_info(fb->format->format);
694 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
695 &burstsize, &num_bursts);
696
697 ipu_cpmem_zero(ipu_plane->ipu_ch);
698 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
699 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
700 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
701 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
702 ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
703 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
704 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
705 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
706
707 switch (fb->format->format) {
708 case DRM_FORMAT_YUV420:
709 case DRM_FORMAT_YVU420:
710 case DRM_FORMAT_YUV422:
711 case DRM_FORMAT_YVU422:
712 case DRM_FORMAT_YUV444:
713 case DRM_FORMAT_YVU444:
714 ubo = drm_plane_state_to_ubo(new_state);
715 vbo = drm_plane_state_to_vbo(new_state);
716 if (fb->format->format == DRM_FORMAT_YVU420 ||
717 fb->format->format == DRM_FORMAT_YVU422 ||
718 fb->format->format == DRM_FORMAT_YVU444)
719 swap(ubo, vbo);
720
721 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
722 fb->pitches[1], ubo, vbo);
723
724 dev_dbg(ipu_plane->base.dev->dev,
725 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
726 new_state->src.x1 >> 16, new_state->src.y1 >> 16);
727 break;
728 case DRM_FORMAT_NV12:
729 case DRM_FORMAT_NV16:
730 ubo = drm_plane_state_to_ubo(new_state);
731
732 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
733 fb->pitches[1], ubo, ubo);
734
735 dev_dbg(ipu_plane->base.dev->dev,
736 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
737 new_state->src.x1 >> 16, new_state->src.y1 >> 16);
738 break;
739 case DRM_FORMAT_RGB565_A8:
740 case DRM_FORMAT_BGR565_A8:
741 case DRM_FORMAT_RGB888_A8:
742 case DRM_FORMAT_BGR888_A8:
743 case DRM_FORMAT_RGBX8888_A8:
744 case DRM_FORMAT_BGRX8888_A8:
745 alpha_eba = drm_plane_state_to_eba(new_state, 1);
746 num_bursts = 0;
747
748 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
749 eba, alpha_eba, new_state->src.x1 >> 16,
750 new_state->src.y1 >> 16);
751
752 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
753
754 ipu_cpmem_zero(ipu_plane->alpha_ch);
755 ipu_cpmem_set_resolution(ipu_plane->alpha_ch, width,
756 drm_rect_height(&new_state->src) >> 16);
757 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
758 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
759 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
760 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
761 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
762 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
763 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
764 break;
765 default:
766 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
767 eba, new_state->src.x1 >> 16, new_state->src.y1 >> 16);
768 break;
769 }
770 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
771 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
772 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
773 ipu_plane_enable(ipu_plane);
774 }
775
776 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
777 .atomic_check = ipu_plane_atomic_check,
778 .atomic_disable = ipu_plane_atomic_disable,
779 .atomic_update = ipu_plane_atomic_update,
780 };
781
ipu_plane_atomic_update_pending(struct drm_plane * plane)782 bool ipu_plane_atomic_update_pending(struct drm_plane *plane)
783 {
784 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
785 struct drm_plane_state *state = plane->state;
786 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
787
788 /* disabled crtcs must not block the update */
789 if (!state->crtc)
790 return false;
791
792 if (ipu_state->use_pre)
793 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
794
795 /*
796 * Pretend no update is pending in the non-PRE/PRG case. For this to
797 * happen, an atomic update would have to be deferred until after the
798 * start of the next frame and simultaneously interrupt latency would
799 * have to be high enough to let the atomic update finish and issue an
800 * event before the previous end of frame interrupt handler can be
801 * executed.
802 */
803 return false;
804 }
ipu_planes_assign_pre(struct drm_device * dev,struct drm_atomic_state * state)805 int ipu_planes_assign_pre(struct drm_device *dev,
806 struct drm_atomic_state *state)
807 {
808 struct drm_crtc_state *old_crtc_state, *crtc_state;
809 struct drm_plane_state *plane_state;
810 struct ipu_plane_state *ipu_state;
811 struct ipu_plane *ipu_plane;
812 struct drm_plane *plane;
813 struct drm_crtc *crtc;
814 int available_pres = ipu_prg_max_active_channels();
815 int ret, i;
816
817 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
818 ret = drm_atomic_add_affected_planes(state, crtc);
819 if (ret)
820 return ret;
821 }
822
823 /*
824 * We are going over the planes in 2 passes: first we assign PREs to
825 * planes with a tiling modifier, which need the PREs to resolve into
826 * linear. Any failure to assign a PRE there is fatal. In the second
827 * pass we try to assign PREs to linear FBs, to improve memory access
828 * patterns for them. Failure at this point is non-fatal, as we can
829 * scan out linear FBs without a PRE.
830 */
831 for_each_new_plane_in_state(state, plane, plane_state, i) {
832 ipu_state = to_ipu_plane_state(plane_state);
833 ipu_plane = to_ipu_plane(plane);
834
835 if (!plane_state->fb) {
836 ipu_state->use_pre = false;
837 continue;
838 }
839
840 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
841 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
842 continue;
843
844 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
845 return -EINVAL;
846
847 if (!ipu_prg_format_supported(ipu_plane->ipu,
848 plane_state->fb->format->format,
849 plane_state->fb->modifier))
850 return -EINVAL;
851
852 ipu_state->use_pre = true;
853 available_pres--;
854 }
855
856 for_each_new_plane_in_state(state, plane, plane_state, i) {
857 ipu_state = to_ipu_plane_state(plane_state);
858 ipu_plane = to_ipu_plane(plane);
859
860 if (!plane_state->fb) {
861 ipu_state->use_pre = false;
862 continue;
863 }
864
865 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
866 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
867 continue;
868
869 /* make sure that modifier is initialized */
870 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
871
872 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
873 ipu_prg_format_supported(ipu_plane->ipu,
874 plane_state->fb->format->format,
875 plane_state->fb->modifier)) {
876 ipu_state->use_pre = true;
877 available_pres--;
878 } else {
879 ipu_state->use_pre = false;
880 }
881 }
882
883 return 0;
884 }
885
ipu_plane_init(struct drm_device * dev,struct ipu_soc * ipu,int dma,int dp,unsigned int possible_crtcs,enum drm_plane_type type)886 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
887 int dma, int dp, unsigned int possible_crtcs,
888 enum drm_plane_type type)
889 {
890 struct ipu_plane *ipu_plane;
891 const uint64_t *modifiers = ipu_format_modifiers;
892 unsigned int zpos = (type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
893 unsigned int format_count;
894 const uint32_t *formats;
895 int ret;
896
897 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
898 dma, dp, possible_crtcs);
899
900 if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG) {
901 formats = ipu_plane_all_formats;
902 format_count = ARRAY_SIZE(ipu_plane_all_formats);
903 } else {
904 formats = ipu_plane_rgb_formats;
905 format_count = ARRAY_SIZE(ipu_plane_rgb_formats);
906 }
907
908 if (ipu_prg_present(ipu))
909 modifiers = pre_format_modifiers;
910
911 ipu_plane = drmm_universal_plane_alloc(dev, struct ipu_plane, base,
912 possible_crtcs, &ipu_plane_funcs,
913 formats, format_count, modifiers,
914 type, NULL);
915 if (IS_ERR(ipu_plane)) {
916 DRM_ERROR("failed to allocate and initialize %s plane\n",
917 zpos ? "overlay" : "primary");
918 return ipu_plane;
919 }
920
921 ipu_plane->ipu = ipu;
922 ipu_plane->dma = dma;
923 ipu_plane->dp_flow = dp;
924
925 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
926
927 if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)
928 ret = drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0,
929 1);
930 else
931 ret = drm_plane_create_zpos_immutable_property(&ipu_plane->base,
932 0);
933 if (ret)
934 return ERR_PTR(ret);
935
936 ret = drm_plane_create_color_properties(&ipu_plane->base,
937 BIT(DRM_COLOR_YCBCR_BT601) |
938 BIT(DRM_COLOR_YCBCR_BT709),
939 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
940 DRM_COLOR_YCBCR_BT601,
941 DRM_COLOR_YCBCR_LIMITED_RANGE);
942 if (ret)
943 return ERR_PTR(ret);
944
945 ret = ipu_plane_get_resources(dev, ipu_plane);
946 if (ret) {
947 DRM_ERROR("failed to get %s plane resources: %pe\n",
948 zpos ? "overlay" : "primary", &ret);
949 return ERR_PTR(ret);
950 }
951
952 return ipu_plane;
953 }
954