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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4  * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5  *
6  * This file contains the core interrupt handling code, for irq-chip based
7  * architectures. Detailed information is available in
8  * Documentation/core-api/genericirq.rst
9  */
10 
11 #include <linux/irq.h>
12 #include <linux/msi.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/irqdomain.h>
17 #include <linux/wakeup_reason.h>
18 
19 #include <trace/events/irq.h>
20 
21 #include "internals.h"
22 
bad_chained_irq(int irq,void * dev_id)23 static irqreturn_t bad_chained_irq(int irq, void *dev_id)
24 {
25 	WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
26 	return IRQ_NONE;
27 }
28 
29 /*
30  * Chained handlers should never call action on their IRQ. This default
31  * action will emit warning if such thing happens.
32  */
33 struct irqaction chained_action = {
34 	.handler = bad_chained_irq,
35 };
36 
37 /**
38  *	irq_set_chip - set the irq chip for an irq
39  *	@irq:	irq number
40  *	@chip:	pointer to irq chip description structure
41  */
irq_set_chip(unsigned int irq,struct irq_chip * chip)42 int irq_set_chip(unsigned int irq, struct irq_chip *chip)
43 {
44 	unsigned long flags;
45 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
46 
47 	if (!desc)
48 		return -EINVAL;
49 
50 	if (!chip)
51 		chip = &no_irq_chip;
52 
53 	desc->irq_data.chip = chip;
54 	irq_put_desc_unlock(desc, flags);
55 	/*
56 	 * For !CONFIG_SPARSE_IRQ make the irq show up in
57 	 * allocated_irqs.
58 	 */
59 	irq_mark_irq(irq);
60 	return 0;
61 }
62 EXPORT_SYMBOL(irq_set_chip);
63 
64 /**
65  *	irq_set_irq_type - set the irq trigger type for an irq
66  *	@irq:	irq number
67  *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
68  */
irq_set_irq_type(unsigned int irq,unsigned int type)69 int irq_set_irq_type(unsigned int irq, unsigned int type)
70 {
71 	unsigned long flags;
72 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
73 	int ret = 0;
74 
75 	if (!desc)
76 		return -EINVAL;
77 
78 	ret = __irq_set_trigger(desc, type);
79 	irq_put_desc_busunlock(desc, flags);
80 	return ret;
81 }
82 EXPORT_SYMBOL(irq_set_irq_type);
83 
84 /**
85  *	irq_set_handler_data - set irq handler data for an irq
86  *	@irq:	Interrupt number
87  *	@data:	Pointer to interrupt specific data
88  *
89  *	Set the hardware irq controller data for an irq
90  */
irq_set_handler_data(unsigned int irq,void * data)91 int irq_set_handler_data(unsigned int irq, void *data)
92 {
93 	unsigned long flags;
94 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
95 
96 	if (!desc)
97 		return -EINVAL;
98 	desc->irq_common_data.handler_data = data;
99 	irq_put_desc_unlock(desc, flags);
100 	return 0;
101 }
102 EXPORT_SYMBOL(irq_set_handler_data);
103 
104 /**
105  *	irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
106  *	@irq_base:	Interrupt number base
107  *	@irq_offset:	Interrupt number offset
108  *	@entry:		Pointer to MSI descriptor data
109  *
110  *	Set the MSI descriptor entry for an irq at offset
111  */
irq_set_msi_desc_off(unsigned int irq_base,unsigned int irq_offset,struct msi_desc * entry)112 int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
113 			 struct msi_desc *entry)
114 {
115 	unsigned long flags;
116 	struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
117 
118 	if (!desc)
119 		return -EINVAL;
120 	desc->irq_common_data.msi_desc = entry;
121 	if (entry && !irq_offset)
122 		entry->irq = irq_base;
123 	irq_put_desc_unlock(desc, flags);
124 	return 0;
125 }
126 
127 /**
128  *	irq_set_msi_desc - set MSI descriptor data for an irq
129  *	@irq:	Interrupt number
130  *	@entry:	Pointer to MSI descriptor data
131  *
132  *	Set the MSI descriptor entry for an irq
133  */
irq_set_msi_desc(unsigned int irq,struct msi_desc * entry)134 int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
135 {
136 	return irq_set_msi_desc_off(irq, 0, entry);
137 }
138 
139 /**
140  *	irq_set_chip_data - set irq chip data for an irq
141  *	@irq:	Interrupt number
142  *	@data:	Pointer to chip specific data
143  *
144  *	Set the hardware irq chip data for an irq
145  */
irq_set_chip_data(unsigned int irq,void * data)146 int irq_set_chip_data(unsigned int irq, void *data)
147 {
148 	unsigned long flags;
149 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
150 
151 	if (!desc)
152 		return -EINVAL;
153 	desc->irq_data.chip_data = data;
154 	irq_put_desc_unlock(desc, flags);
155 	return 0;
156 }
157 EXPORT_SYMBOL(irq_set_chip_data);
158 
irq_get_irq_data(unsigned int irq)159 struct irq_data *irq_get_irq_data(unsigned int irq)
160 {
161 	struct irq_desc *desc = irq_to_desc(irq);
162 
163 	return desc ? &desc->irq_data : NULL;
164 }
165 EXPORT_SYMBOL_GPL(irq_get_irq_data);
166 
irq_state_clr_disabled(struct irq_desc * desc)167 static void irq_state_clr_disabled(struct irq_desc *desc)
168 {
169 	irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
170 }
171 
irq_state_clr_masked(struct irq_desc * desc)172 static void irq_state_clr_masked(struct irq_desc *desc)
173 {
174 	irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
175 }
176 
irq_state_clr_started(struct irq_desc * desc)177 static void irq_state_clr_started(struct irq_desc *desc)
178 {
179 	irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
180 }
181 
irq_state_set_started(struct irq_desc * desc)182 static void irq_state_set_started(struct irq_desc *desc)
183 {
184 	irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
185 }
186 
187 enum {
188 	IRQ_STARTUP_NORMAL,
189 	IRQ_STARTUP_MANAGED,
190 	IRQ_STARTUP_ABORT,
191 };
192 
193 #ifdef CONFIG_SMP
194 static int
__irq_startup_managed(struct irq_desc * desc,struct cpumask * aff,bool force)195 __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
196 {
197 	struct irq_data *d = irq_desc_get_irq_data(desc);
198 
199 	if (!irqd_affinity_is_managed(d))
200 		return IRQ_STARTUP_NORMAL;
201 
202 	irqd_clr_managed_shutdown(d);
203 
204 	if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
205 		/*
206 		 * Catch code which fiddles with enable_irq() on a managed
207 		 * and potentially shutdown IRQ. Chained interrupt
208 		 * installment or irq auto probing should not happen on
209 		 * managed irqs either.
210 		 */
211 		if (WARN_ON_ONCE(force))
212 			return IRQ_STARTUP_ABORT;
213 		/*
214 		 * The interrupt was requested, but there is no online CPU
215 		 * in it's affinity mask. Put it into managed shutdown
216 		 * state and let the cpu hotplug mechanism start it up once
217 		 * a CPU in the mask becomes available.
218 		 */
219 		return IRQ_STARTUP_ABORT;
220 	}
221 	/*
222 	 * Managed interrupts have reserved resources, so this should not
223 	 * happen.
224 	 */
225 	if (WARN_ON(irq_domain_activate_irq(d, false)))
226 		return IRQ_STARTUP_ABORT;
227 	return IRQ_STARTUP_MANAGED;
228 }
229 #else
230 static __always_inline int
__irq_startup_managed(struct irq_desc * desc,struct cpumask * aff,bool force)231 __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
232 {
233 	return IRQ_STARTUP_NORMAL;
234 }
235 #endif
236 
__irq_startup(struct irq_desc * desc)237 static int __irq_startup(struct irq_desc *desc)
238 {
239 	struct irq_data *d = irq_desc_get_irq_data(desc);
240 	int ret = 0;
241 
242 	/* Warn if this interrupt is not activated but try nevertheless */
243 	WARN_ON_ONCE(!irqd_is_activated(d));
244 
245 	if (d->chip->irq_startup) {
246 		ret = d->chip->irq_startup(d);
247 		irq_state_clr_disabled(desc);
248 		irq_state_clr_masked(desc);
249 	} else {
250 		irq_enable(desc);
251 	}
252 	irq_state_set_started(desc);
253 	return ret;
254 }
255 
irq_startup(struct irq_desc * desc,bool resend,bool force)256 int irq_startup(struct irq_desc *desc, bool resend, bool force)
257 {
258 	struct irq_data *d = irq_desc_get_irq_data(desc);
259 	struct cpumask *aff = irq_data_get_affinity_mask(d);
260 	int ret = 0;
261 
262 	desc->depth = 0;
263 
264 	if (irqd_is_started(d)) {
265 		irq_enable(desc);
266 	} else {
267 		switch (__irq_startup_managed(desc, aff, force)) {
268 		case IRQ_STARTUP_NORMAL:
269 			if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
270 				irq_setup_affinity(desc);
271 			ret = __irq_startup(desc);
272 			if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
273 				irq_setup_affinity(desc);
274 			break;
275 		case IRQ_STARTUP_MANAGED:
276 			irq_do_set_affinity(d, aff, false);
277 			ret = __irq_startup(desc);
278 			break;
279 		case IRQ_STARTUP_ABORT:
280 			irqd_set_managed_shutdown(d);
281 			return 0;
282 		}
283 	}
284 	if (resend)
285 		check_irq_resend(desc, false);
286 
287 	return ret;
288 }
289 
irq_activate(struct irq_desc * desc)290 int irq_activate(struct irq_desc *desc)
291 {
292 	struct irq_data *d = irq_desc_get_irq_data(desc);
293 
294 	if (!irqd_affinity_is_managed(d))
295 		return irq_domain_activate_irq(d, false);
296 	return 0;
297 }
298 
irq_activate_and_startup(struct irq_desc * desc,bool resend)299 int irq_activate_and_startup(struct irq_desc *desc, bool resend)
300 {
301 	if (WARN_ON(irq_activate(desc)))
302 		return 0;
303 	return irq_startup(desc, resend, IRQ_START_FORCE);
304 }
305 
306 static void __irq_disable(struct irq_desc *desc, bool mask);
307 
irq_shutdown(struct irq_desc * desc)308 void irq_shutdown(struct irq_desc *desc)
309 {
310 	if (irqd_is_started(&desc->irq_data)) {
311 		desc->depth = 1;
312 		if (desc->irq_data.chip->irq_shutdown) {
313 			desc->irq_data.chip->irq_shutdown(&desc->irq_data);
314 			irq_state_set_disabled(desc);
315 			irq_state_set_masked(desc);
316 		} else {
317 			__irq_disable(desc, true);
318 		}
319 		irq_state_clr_started(desc);
320 	}
321 }
322 
323 
irq_shutdown_and_deactivate(struct irq_desc * desc)324 void irq_shutdown_and_deactivate(struct irq_desc *desc)
325 {
326 	irq_shutdown(desc);
327 	/*
328 	 * This must be called even if the interrupt was never started up,
329 	 * because the activation can happen before the interrupt is
330 	 * available for request/startup. It has it's own state tracking so
331 	 * it's safe to call it unconditionally.
332 	 */
333 	irq_domain_deactivate_irq(&desc->irq_data);
334 }
335 
irq_enable(struct irq_desc * desc)336 void irq_enable(struct irq_desc *desc)
337 {
338 	if (!irqd_irq_disabled(&desc->irq_data)) {
339 		unmask_irq(desc);
340 	} else {
341 		irq_state_clr_disabled(desc);
342 		if (desc->irq_data.chip->irq_enable) {
343 			desc->irq_data.chip->irq_enable(&desc->irq_data);
344 			irq_state_clr_masked(desc);
345 		} else {
346 			unmask_irq(desc);
347 		}
348 	}
349 }
350 
__irq_disable(struct irq_desc * desc,bool mask)351 static void __irq_disable(struct irq_desc *desc, bool mask)
352 {
353 	if (irqd_irq_disabled(&desc->irq_data)) {
354 		if (mask)
355 			mask_irq(desc);
356 	} else {
357 		irq_state_set_disabled(desc);
358 		if (desc->irq_data.chip->irq_disable) {
359 			desc->irq_data.chip->irq_disable(&desc->irq_data);
360 			irq_state_set_masked(desc);
361 		} else if (mask) {
362 			mask_irq(desc);
363 		}
364 	}
365 }
366 
367 /**
368  * irq_disable - Mark interrupt disabled
369  * @desc:	irq descriptor which should be disabled
370  *
371  * If the chip does not implement the irq_disable callback, we
372  * use a lazy disable approach. That means we mark the interrupt
373  * disabled, but leave the hardware unmasked. That's an
374  * optimization because we avoid the hardware access for the
375  * common case where no interrupt happens after we marked it
376  * disabled. If an interrupt happens, then the interrupt flow
377  * handler masks the line at the hardware level and marks it
378  * pending.
379  *
380  * If the interrupt chip does not implement the irq_disable callback,
381  * a driver can disable the lazy approach for a particular irq line by
382  * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
383  * be used for devices which cannot disable the interrupt at the
384  * device level under certain circumstances and have to use
385  * disable_irq[_nosync] instead.
386  */
irq_disable(struct irq_desc * desc)387 void irq_disable(struct irq_desc *desc)
388 {
389 	__irq_disable(desc, irq_settings_disable_unlazy(desc));
390 }
391 
irq_percpu_enable(struct irq_desc * desc,unsigned int cpu)392 void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
393 {
394 	if (desc->irq_data.chip->irq_enable)
395 		desc->irq_data.chip->irq_enable(&desc->irq_data);
396 	else
397 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
398 	cpumask_set_cpu(cpu, desc->percpu_enabled);
399 }
400 
irq_percpu_disable(struct irq_desc * desc,unsigned int cpu)401 void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
402 {
403 	if (desc->irq_data.chip->irq_disable)
404 		desc->irq_data.chip->irq_disable(&desc->irq_data);
405 	else
406 		desc->irq_data.chip->irq_mask(&desc->irq_data);
407 	cpumask_clear_cpu(cpu, desc->percpu_enabled);
408 }
409 
mask_ack_irq(struct irq_desc * desc)410 static inline void mask_ack_irq(struct irq_desc *desc)
411 {
412 	if (desc->irq_data.chip->irq_mask_ack) {
413 		desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
414 		irq_state_set_masked(desc);
415 	} else {
416 		mask_irq(desc);
417 		if (desc->irq_data.chip->irq_ack)
418 			desc->irq_data.chip->irq_ack(&desc->irq_data);
419 	}
420 }
421 
mask_irq(struct irq_desc * desc)422 void mask_irq(struct irq_desc *desc)
423 {
424 	if (irqd_irq_masked(&desc->irq_data))
425 		return;
426 
427 	if (desc->irq_data.chip->irq_mask) {
428 		desc->irq_data.chip->irq_mask(&desc->irq_data);
429 		irq_state_set_masked(desc);
430 	}
431 }
432 
unmask_irq(struct irq_desc * desc)433 void unmask_irq(struct irq_desc *desc)
434 {
435 	if (!irqd_irq_masked(&desc->irq_data))
436 		return;
437 
438 	if (desc->irq_data.chip->irq_unmask) {
439 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
440 		irq_state_clr_masked(desc);
441 	}
442 }
443 
unmask_threaded_irq(struct irq_desc * desc)444 void unmask_threaded_irq(struct irq_desc *desc)
445 {
446 	struct irq_chip *chip = desc->irq_data.chip;
447 
448 	if (chip->flags & IRQCHIP_EOI_THREADED)
449 		chip->irq_eoi(&desc->irq_data);
450 
451 	unmask_irq(desc);
452 }
453 
454 /*
455  *	handle_nested_irq - Handle a nested irq from a irq thread
456  *	@irq:	the interrupt number
457  *
458  *	Handle interrupts which are nested into a threaded interrupt
459  *	handler. The handler function is called inside the calling
460  *	threads context.
461  */
handle_nested_irq(unsigned int irq)462 void handle_nested_irq(unsigned int irq)
463 {
464 	struct irq_desc *desc = irq_to_desc(irq);
465 	struct irqaction *action;
466 	irqreturn_t action_ret;
467 
468 	might_sleep();
469 
470 	raw_spin_lock_irq(&desc->lock);
471 
472 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
473 
474 	action = desc->action;
475 	if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
476 		desc->istate |= IRQS_PENDING;
477 		goto out_unlock;
478 	}
479 
480 	kstat_incr_irqs_this_cpu(desc);
481 	irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
482 	raw_spin_unlock_irq(&desc->lock);
483 
484 	action_ret = IRQ_NONE;
485 	for_each_action_of_desc(desc, action)
486 		action_ret |= action->thread_fn(action->irq, action->dev_id);
487 
488 	if (!irq_settings_no_debug(desc))
489 		note_interrupt(desc, action_ret);
490 
491 	raw_spin_lock_irq(&desc->lock);
492 	irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
493 
494 out_unlock:
495 	raw_spin_unlock_irq(&desc->lock);
496 }
497 EXPORT_SYMBOL_GPL(handle_nested_irq);
498 
irq_check_poll(struct irq_desc * desc)499 static bool irq_check_poll(struct irq_desc *desc)
500 {
501 	if (!(desc->istate & IRQS_POLL_INPROGRESS))
502 		return false;
503 	return irq_wait_for_poll(desc);
504 }
505 
irq_may_run(struct irq_desc * desc)506 static bool irq_may_run(struct irq_desc *desc)
507 {
508 	unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
509 
510 	/*
511 	 * If the interrupt is not in progress and is not an armed
512 	 * wakeup interrupt, proceed.
513 	 */
514 	if (!irqd_has_set(&desc->irq_data, mask)) {
515 #ifdef CONFIG_PM_SLEEP
516 		if (unlikely(desc->no_suspend_depth &&
517 			     irqd_is_wakeup_set(&desc->irq_data))) {
518 			unsigned int irq = irq_desc_get_irq(desc);
519 			const char *name = "(unnamed)";
520 
521 			if (desc->action && desc->action->name)
522 				name = desc->action->name;
523 
524 			log_abnormal_wakeup_reason("misconfigured IRQ %u %s",
525 						   irq, name);
526 		}
527 #endif
528 		return true;
529 	}
530 
531 	/*
532 	 * If the interrupt is an armed wakeup source, mark it pending
533 	 * and suspended, disable it and notify the pm core about the
534 	 * event.
535 	 */
536 	if (irq_pm_check_wakeup(desc))
537 		return false;
538 
539 	/*
540 	 * Handle a potential concurrent poll on a different core.
541 	 */
542 	return irq_check_poll(desc);
543 }
544 
545 /**
546  *	handle_simple_irq - Simple and software-decoded IRQs.
547  *	@desc:	the interrupt description structure for this irq
548  *
549  *	Simple interrupts are either sent from a demultiplexing interrupt
550  *	handler or come from hardware, where no interrupt hardware control
551  *	is necessary.
552  *
553  *	Note: The caller is expected to handle the ack, clear, mask and
554  *	unmask issues if necessary.
555  */
handle_simple_irq(struct irq_desc * desc)556 void handle_simple_irq(struct irq_desc *desc)
557 {
558 	raw_spin_lock(&desc->lock);
559 
560 	if (!irq_may_run(desc))
561 		goto out_unlock;
562 
563 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
564 
565 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
566 		desc->istate |= IRQS_PENDING;
567 		goto out_unlock;
568 	}
569 
570 	kstat_incr_irqs_this_cpu(desc);
571 	handle_irq_event(desc);
572 
573 out_unlock:
574 	raw_spin_unlock(&desc->lock);
575 }
576 EXPORT_SYMBOL_GPL(handle_simple_irq);
577 
578 /**
579  *	handle_untracked_irq - Simple and software-decoded IRQs.
580  *	@desc:	the interrupt description structure for this irq
581  *
582  *	Untracked interrupts are sent from a demultiplexing interrupt
583  *	handler when the demultiplexer does not know which device it its
584  *	multiplexed irq domain generated the interrupt. IRQ's handled
585  *	through here are not subjected to stats tracking, randomness, or
586  *	spurious interrupt detection.
587  *
588  *	Note: Like handle_simple_irq, the caller is expected to handle
589  *	the ack, clear, mask and unmask issues if necessary.
590  */
handle_untracked_irq(struct irq_desc * desc)591 void handle_untracked_irq(struct irq_desc *desc)
592 {
593 	unsigned int flags = 0;
594 
595 	raw_spin_lock(&desc->lock);
596 
597 	if (!irq_may_run(desc))
598 		goto out_unlock;
599 
600 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
601 
602 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
603 		desc->istate |= IRQS_PENDING;
604 		goto out_unlock;
605 	}
606 
607 	desc->istate &= ~IRQS_PENDING;
608 	irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
609 	raw_spin_unlock(&desc->lock);
610 
611 	__handle_irq_event_percpu(desc, &flags);
612 
613 	raw_spin_lock(&desc->lock);
614 	irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
615 
616 out_unlock:
617 	raw_spin_unlock(&desc->lock);
618 }
619 EXPORT_SYMBOL_GPL(handle_untracked_irq);
620 
621 /*
622  * Called unconditionally from handle_level_irq() and only for oneshot
623  * interrupts from handle_fasteoi_irq()
624  */
cond_unmask_irq(struct irq_desc * desc)625 static void cond_unmask_irq(struct irq_desc *desc)
626 {
627 	/*
628 	 * We need to unmask in the following cases:
629 	 * - Standard level irq (IRQF_ONESHOT is not set)
630 	 * - Oneshot irq which did not wake the thread (caused by a
631 	 *   spurious interrupt or a primary handler handling it
632 	 *   completely).
633 	 */
634 	if (!irqd_irq_disabled(&desc->irq_data) &&
635 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
636 		unmask_irq(desc);
637 }
638 
639 /**
640  *	handle_level_irq - Level type irq handler
641  *	@desc:	the interrupt description structure for this irq
642  *
643  *	Level type interrupts are active as long as the hardware line has
644  *	the active level. This may require to mask the interrupt and unmask
645  *	it after the associated handler has acknowledged the device, so the
646  *	interrupt line is back to inactive.
647  */
handle_level_irq(struct irq_desc * desc)648 void handle_level_irq(struct irq_desc *desc)
649 {
650 	raw_spin_lock(&desc->lock);
651 	mask_ack_irq(desc);
652 
653 	if (!irq_may_run(desc))
654 		goto out_unlock;
655 
656 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
657 
658 	/*
659 	 * If its disabled or no action available
660 	 * keep it masked and get out of here
661 	 */
662 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
663 		desc->istate |= IRQS_PENDING;
664 		goto out_unlock;
665 	}
666 
667 	kstat_incr_irqs_this_cpu(desc);
668 	handle_irq_event(desc);
669 
670 	cond_unmask_irq(desc);
671 
672 out_unlock:
673 	raw_spin_unlock(&desc->lock);
674 }
675 EXPORT_SYMBOL_GPL(handle_level_irq);
676 
cond_unmask_eoi_irq(struct irq_desc * desc,struct irq_chip * chip)677 static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
678 {
679 	if (!(desc->istate & IRQS_ONESHOT)) {
680 		chip->irq_eoi(&desc->irq_data);
681 		return;
682 	}
683 	/*
684 	 * We need to unmask in the following cases:
685 	 * - Oneshot irq which did not wake the thread (caused by a
686 	 *   spurious interrupt or a primary handler handling it
687 	 *   completely).
688 	 */
689 	if (!irqd_irq_disabled(&desc->irq_data) &&
690 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
691 		chip->irq_eoi(&desc->irq_data);
692 		unmask_irq(desc);
693 	} else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
694 		chip->irq_eoi(&desc->irq_data);
695 	}
696 }
697 
698 /**
699  *	handle_fasteoi_irq - irq handler for transparent controllers
700  *	@desc:	the interrupt description structure for this irq
701  *
702  *	Only a single callback will be issued to the chip: an ->eoi()
703  *	call when the interrupt has been serviced. This enables support
704  *	for modern forms of interrupt handlers, which handle the flow
705  *	details in hardware, transparently.
706  */
handle_fasteoi_irq(struct irq_desc * desc)707 void handle_fasteoi_irq(struct irq_desc *desc)
708 {
709 	struct irq_chip *chip = desc->irq_data.chip;
710 
711 	raw_spin_lock(&desc->lock);
712 
713 	if (!irq_may_run(desc))
714 		goto out;
715 
716 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
717 
718 	/*
719 	 * If its disabled or no action available
720 	 * then mask it and get out of here:
721 	 */
722 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
723 		desc->istate |= IRQS_PENDING;
724 		mask_irq(desc);
725 		goto out;
726 	}
727 
728 	kstat_incr_irqs_this_cpu(desc);
729 	if (desc->istate & IRQS_ONESHOT)
730 		mask_irq(desc);
731 
732 	handle_irq_event(desc);
733 
734 	cond_unmask_eoi_irq(desc, chip);
735 
736 	raw_spin_unlock(&desc->lock);
737 	return;
738 out:
739 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
740 		chip->irq_eoi(&desc->irq_data);
741 	raw_spin_unlock(&desc->lock);
742 }
743 EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
744 
745 /**
746  *	handle_fasteoi_nmi - irq handler for NMI interrupt lines
747  *	@desc:	the interrupt description structure for this irq
748  *
749  *	A simple NMI-safe handler, considering the restrictions
750  *	from request_nmi.
751  *
752  *	Only a single callback will be issued to the chip: an ->eoi()
753  *	call when the interrupt has been serviced. This enables support
754  *	for modern forms of interrupt handlers, which handle the flow
755  *	details in hardware, transparently.
756  */
handle_fasteoi_nmi(struct irq_desc * desc)757 void handle_fasteoi_nmi(struct irq_desc *desc)
758 {
759 	struct irq_chip *chip = irq_desc_get_chip(desc);
760 	struct irqaction *action = desc->action;
761 	unsigned int irq = irq_desc_get_irq(desc);
762 	irqreturn_t res;
763 
764 	__kstat_incr_irqs_this_cpu(desc);
765 
766 	trace_irq_handler_entry(irq, action);
767 	/*
768 	 * NMIs cannot be shared, there is only one action.
769 	 */
770 	res = action->handler(irq, action->dev_id);
771 	trace_irq_handler_exit(irq, action, res);
772 
773 	if (chip->irq_eoi)
774 		chip->irq_eoi(&desc->irq_data);
775 }
776 EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
777 
778 /**
779  *	handle_edge_irq - edge type IRQ handler
780  *	@desc:	the interrupt description structure for this irq
781  *
782  *	Interrupt occurs on the falling and/or rising edge of a hardware
783  *	signal. The occurrence is latched into the irq controller hardware
784  *	and must be acked in order to be reenabled. After the ack another
785  *	interrupt can happen on the same source even before the first one
786  *	is handled by the associated event handler. If this happens it
787  *	might be necessary to disable (mask) the interrupt depending on the
788  *	controller hardware. This requires to reenable the interrupt inside
789  *	of the loop which handles the interrupts which have arrived while
790  *	the handler was running. If all pending interrupts are handled, the
791  *	loop is left.
792  */
handle_edge_irq(struct irq_desc * desc)793 void handle_edge_irq(struct irq_desc *desc)
794 {
795 	raw_spin_lock(&desc->lock);
796 
797 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
798 
799 	if (!irq_may_run(desc)) {
800 		desc->istate |= IRQS_PENDING;
801 		mask_ack_irq(desc);
802 		goto out_unlock;
803 	}
804 
805 	/*
806 	 * If its disabled or no action available then mask it and get
807 	 * out of here.
808 	 */
809 	if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
810 		desc->istate |= IRQS_PENDING;
811 		mask_ack_irq(desc);
812 		goto out_unlock;
813 	}
814 
815 	kstat_incr_irqs_this_cpu(desc);
816 
817 	/* Start handling the irq */
818 	desc->irq_data.chip->irq_ack(&desc->irq_data);
819 
820 	do {
821 		if (unlikely(!desc->action)) {
822 			mask_irq(desc);
823 			goto out_unlock;
824 		}
825 
826 		/*
827 		 * When another irq arrived while we were handling
828 		 * one, we could have masked the irq.
829 		 * Reenable it, if it was not disabled in meantime.
830 		 */
831 		if (unlikely(desc->istate & IRQS_PENDING)) {
832 			if (!irqd_irq_disabled(&desc->irq_data) &&
833 			    irqd_irq_masked(&desc->irq_data))
834 				unmask_irq(desc);
835 		}
836 
837 		handle_irq_event(desc);
838 
839 	} while ((desc->istate & IRQS_PENDING) &&
840 		 !irqd_irq_disabled(&desc->irq_data));
841 
842 out_unlock:
843 	raw_spin_unlock(&desc->lock);
844 }
845 EXPORT_SYMBOL(handle_edge_irq);
846 
847 #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
848 /**
849  *	handle_edge_eoi_irq - edge eoi type IRQ handler
850  *	@desc:	the interrupt description structure for this irq
851  *
852  * Similar as the above handle_edge_irq, but using eoi and w/o the
853  * mask/unmask logic.
854  */
handle_edge_eoi_irq(struct irq_desc * desc)855 void handle_edge_eoi_irq(struct irq_desc *desc)
856 {
857 	struct irq_chip *chip = irq_desc_get_chip(desc);
858 
859 	raw_spin_lock(&desc->lock);
860 
861 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
862 
863 	if (!irq_may_run(desc)) {
864 		desc->istate |= IRQS_PENDING;
865 		goto out_eoi;
866 	}
867 
868 	/*
869 	 * If its disabled or no action available then mask it and get
870 	 * out of here.
871 	 */
872 	if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
873 		desc->istate |= IRQS_PENDING;
874 		goto out_eoi;
875 	}
876 
877 	kstat_incr_irqs_this_cpu(desc);
878 
879 	do {
880 		if (unlikely(!desc->action))
881 			goto out_eoi;
882 
883 		handle_irq_event(desc);
884 
885 	} while ((desc->istate & IRQS_PENDING) &&
886 		 !irqd_irq_disabled(&desc->irq_data));
887 
888 out_eoi:
889 	chip->irq_eoi(&desc->irq_data);
890 	raw_spin_unlock(&desc->lock);
891 }
892 #endif
893 
894 /**
895  *	handle_percpu_irq - Per CPU local irq handler
896  *	@desc:	the interrupt description structure for this irq
897  *
898  *	Per CPU interrupts on SMP machines without locking requirements
899  */
handle_percpu_irq(struct irq_desc * desc)900 void handle_percpu_irq(struct irq_desc *desc)
901 {
902 	struct irq_chip *chip = irq_desc_get_chip(desc);
903 
904 	/*
905 	 * PER CPU interrupts are not serialized. Do not touch
906 	 * desc->tot_count.
907 	 */
908 	__kstat_incr_irqs_this_cpu(desc);
909 
910 	if (chip->irq_ack)
911 		chip->irq_ack(&desc->irq_data);
912 
913 	handle_irq_event_percpu(desc);
914 
915 	if (chip->irq_eoi)
916 		chip->irq_eoi(&desc->irq_data);
917 }
918 
919 /**
920  * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
921  * @desc:	the interrupt description structure for this irq
922  *
923  * Per CPU interrupts on SMP machines without locking requirements. Same as
924  * handle_percpu_irq() above but with the following extras:
925  *
926  * action->percpu_dev_id is a pointer to percpu variables which
927  * contain the real device id for the cpu on which this handler is
928  * called
929  */
handle_percpu_devid_irq(struct irq_desc * desc)930 void handle_percpu_devid_irq(struct irq_desc *desc)
931 {
932 	struct irq_chip *chip = irq_desc_get_chip(desc);
933 	struct irqaction *action = desc->action;
934 	unsigned int irq = irq_desc_get_irq(desc);
935 	irqreturn_t res;
936 
937 	/*
938 	 * PER CPU interrupts are not serialized. Do not touch
939 	 * desc->tot_count.
940 	 */
941 	__kstat_incr_irqs_this_cpu(desc);
942 
943 	if (chip->irq_ack)
944 		chip->irq_ack(&desc->irq_data);
945 
946 	if (likely(action)) {
947 		trace_irq_handler_entry(irq, action);
948 		res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
949 		trace_irq_handler_exit(irq, action, res);
950 	} else {
951 		unsigned int cpu = smp_processor_id();
952 		bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
953 
954 		if (enabled)
955 			irq_percpu_disable(desc, cpu);
956 
957 		pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
958 			    enabled ? " and unmasked" : "", irq, cpu);
959 	}
960 
961 	if (chip->irq_eoi)
962 		chip->irq_eoi(&desc->irq_data);
963 }
964 
965 /**
966  * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
967  *				     dev ids
968  * @desc:	the interrupt description structure for this irq
969  *
970  * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
971  * as a percpu pointer.
972  */
handle_percpu_devid_fasteoi_nmi(struct irq_desc * desc)973 void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
974 {
975 	struct irq_chip *chip = irq_desc_get_chip(desc);
976 	struct irqaction *action = desc->action;
977 	unsigned int irq = irq_desc_get_irq(desc);
978 	irqreturn_t res;
979 
980 	__kstat_incr_irqs_this_cpu(desc);
981 
982 	trace_irq_handler_entry(irq, action);
983 	res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
984 	trace_irq_handler_exit(irq, action, res);
985 
986 	if (chip->irq_eoi)
987 		chip->irq_eoi(&desc->irq_data);
988 }
989 
990 static void
__irq_do_set_handler(struct irq_desc * desc,irq_flow_handler_t handle,int is_chained,const char * name)991 __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
992 		     int is_chained, const char *name)
993 {
994 	if (!handle) {
995 		handle = handle_bad_irq;
996 	} else {
997 		struct irq_data *irq_data = &desc->irq_data;
998 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
999 		/*
1000 		 * With hierarchical domains we might run into a
1001 		 * situation where the outermost chip is not yet set
1002 		 * up, but the inner chips are there.  Instead of
1003 		 * bailing we install the handler, but obviously we
1004 		 * cannot enable/startup the interrupt at this point.
1005 		 */
1006 		while (irq_data) {
1007 			if (irq_data->chip != &no_irq_chip)
1008 				break;
1009 			/*
1010 			 * Bail out if the outer chip is not set up
1011 			 * and the interrupt supposed to be started
1012 			 * right away.
1013 			 */
1014 			if (WARN_ON(is_chained))
1015 				return;
1016 			/* Try the parent */
1017 			irq_data = irq_data->parent_data;
1018 		}
1019 #endif
1020 		if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
1021 			return;
1022 	}
1023 
1024 	/* Uninstall? */
1025 	if (handle == handle_bad_irq) {
1026 		if (desc->irq_data.chip != &no_irq_chip)
1027 			mask_ack_irq(desc);
1028 		irq_state_set_disabled(desc);
1029 		if (is_chained)
1030 			desc->action = NULL;
1031 		desc->depth = 1;
1032 	}
1033 	desc->handle_irq = handle;
1034 	desc->name = name;
1035 
1036 	if (handle != handle_bad_irq && is_chained) {
1037 		unsigned int type = irqd_get_trigger_type(&desc->irq_data);
1038 
1039 		/*
1040 		 * We're about to start this interrupt immediately,
1041 		 * hence the need to set the trigger configuration.
1042 		 * But the .set_type callback may have overridden the
1043 		 * flow handler, ignoring that we're dealing with a
1044 		 * chained interrupt. Reset it immediately because we
1045 		 * do know better.
1046 		 */
1047 		if (type != IRQ_TYPE_NONE) {
1048 			__irq_set_trigger(desc, type);
1049 			desc->handle_irq = handle;
1050 		}
1051 
1052 		irq_settings_set_noprobe(desc);
1053 		irq_settings_set_norequest(desc);
1054 		irq_settings_set_nothread(desc);
1055 		desc->action = &chained_action;
1056 		irq_activate_and_startup(desc, IRQ_RESEND);
1057 	}
1058 }
1059 
1060 void
__irq_set_handler(unsigned int irq,irq_flow_handler_t handle,int is_chained,const char * name)1061 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
1062 		  const char *name)
1063 {
1064 	unsigned long flags;
1065 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1066 
1067 	if (!desc)
1068 		return;
1069 
1070 	__irq_do_set_handler(desc, handle, is_chained, name);
1071 	irq_put_desc_busunlock(desc, flags);
1072 }
1073 EXPORT_SYMBOL_GPL(__irq_set_handler);
1074 
1075 void
irq_set_chained_handler_and_data(unsigned int irq,irq_flow_handler_t handle,void * data)1076 irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
1077 				 void *data)
1078 {
1079 	unsigned long flags;
1080 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1081 
1082 	if (!desc)
1083 		return;
1084 
1085 	desc->irq_common_data.handler_data = data;
1086 	__irq_do_set_handler(desc, handle, 1, NULL);
1087 
1088 	irq_put_desc_busunlock(desc, flags);
1089 }
1090 EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1091 
1092 void
irq_set_chip_and_handler_name(unsigned int irq,struct irq_chip * chip,irq_flow_handler_t handle,const char * name)1093 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
1094 			      irq_flow_handler_t handle, const char *name)
1095 {
1096 	irq_set_chip(irq, chip);
1097 	__irq_set_handler(irq, handle, 0, name);
1098 }
1099 EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1100 
irq_modify_status(unsigned int irq,unsigned long clr,unsigned long set)1101 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1102 {
1103 	unsigned long flags, trigger, tmp;
1104 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1105 
1106 	if (!desc)
1107 		return;
1108 
1109 	/*
1110 	 * Warn when a driver sets the no autoenable flag on an already
1111 	 * active interrupt.
1112 	 */
1113 	WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1114 
1115 	irq_settings_clr_and_set(desc, clr, set);
1116 
1117 	trigger = irqd_get_trigger_type(&desc->irq_data);
1118 
1119 	irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1120 		   IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
1121 	if (irq_settings_has_no_balance_set(desc))
1122 		irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1123 	if (irq_settings_is_per_cpu(desc))
1124 		irqd_set(&desc->irq_data, IRQD_PER_CPU);
1125 	if (irq_settings_can_move_pcntxt(desc))
1126 		irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
1127 	if (irq_settings_is_level(desc))
1128 		irqd_set(&desc->irq_data, IRQD_LEVEL);
1129 
1130 	tmp = irq_settings_get_trigger_mask(desc);
1131 	if (tmp != IRQ_TYPE_NONE)
1132 		trigger = tmp;
1133 
1134 	irqd_set(&desc->irq_data, trigger);
1135 
1136 	irq_put_desc_unlock(desc, flags);
1137 }
1138 EXPORT_SYMBOL_GPL(irq_modify_status);
1139 
1140 /**
1141  *	irq_cpu_online - Invoke all irq_cpu_online functions.
1142  *
1143  *	Iterate through all irqs and invoke the chip.irq_cpu_online()
1144  *	for each.
1145  */
irq_cpu_online(void)1146 void irq_cpu_online(void)
1147 {
1148 	struct irq_desc *desc;
1149 	struct irq_chip *chip;
1150 	unsigned long flags;
1151 	unsigned int irq;
1152 
1153 	for_each_active_irq(irq) {
1154 		desc = irq_to_desc(irq);
1155 		if (!desc)
1156 			continue;
1157 
1158 		raw_spin_lock_irqsave(&desc->lock, flags);
1159 
1160 		chip = irq_data_get_irq_chip(&desc->irq_data);
1161 		if (chip && chip->irq_cpu_online &&
1162 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1163 		     !irqd_irq_disabled(&desc->irq_data)))
1164 			chip->irq_cpu_online(&desc->irq_data);
1165 
1166 		raw_spin_unlock_irqrestore(&desc->lock, flags);
1167 	}
1168 }
1169 
1170 /**
1171  *	irq_cpu_offline - Invoke all irq_cpu_offline functions.
1172  *
1173  *	Iterate through all irqs and invoke the chip.irq_cpu_offline()
1174  *	for each.
1175  */
irq_cpu_offline(void)1176 void irq_cpu_offline(void)
1177 {
1178 	struct irq_desc *desc;
1179 	struct irq_chip *chip;
1180 	unsigned long flags;
1181 	unsigned int irq;
1182 
1183 	for_each_active_irq(irq) {
1184 		desc = irq_to_desc(irq);
1185 		if (!desc)
1186 			continue;
1187 
1188 		raw_spin_lock_irqsave(&desc->lock, flags);
1189 
1190 		chip = irq_data_get_irq_chip(&desc->irq_data);
1191 		if (chip && chip->irq_cpu_offline &&
1192 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1193 		     !irqd_irq_disabled(&desc->irq_data)))
1194 			chip->irq_cpu_offline(&desc->irq_data);
1195 
1196 		raw_spin_unlock_irqrestore(&desc->lock, flags);
1197 	}
1198 }
1199 
1200 #ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
1201 
1202 #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1203 /**
1204  *	handle_fasteoi_ack_irq - irq handler for edge hierarchy
1205  *	stacked on transparent controllers
1206  *
1207  *	@desc:	the interrupt description structure for this irq
1208  *
1209  *	Like handle_fasteoi_irq(), but for use with hierarchy where
1210  *	the irq_chip also needs to have its ->irq_ack() function
1211  *	called.
1212  */
handle_fasteoi_ack_irq(struct irq_desc * desc)1213 void handle_fasteoi_ack_irq(struct irq_desc *desc)
1214 {
1215 	struct irq_chip *chip = desc->irq_data.chip;
1216 
1217 	raw_spin_lock(&desc->lock);
1218 
1219 	if (!irq_may_run(desc))
1220 		goto out;
1221 
1222 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1223 
1224 	/*
1225 	 * If its disabled or no action available
1226 	 * then mask it and get out of here:
1227 	 */
1228 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1229 		desc->istate |= IRQS_PENDING;
1230 		mask_irq(desc);
1231 		goto out;
1232 	}
1233 
1234 	kstat_incr_irqs_this_cpu(desc);
1235 	if (desc->istate & IRQS_ONESHOT)
1236 		mask_irq(desc);
1237 
1238 	/* Start handling the irq */
1239 	desc->irq_data.chip->irq_ack(&desc->irq_data);
1240 
1241 	handle_irq_event(desc);
1242 
1243 	cond_unmask_eoi_irq(desc, chip);
1244 
1245 	raw_spin_unlock(&desc->lock);
1246 	return;
1247 out:
1248 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1249 		chip->irq_eoi(&desc->irq_data);
1250 	raw_spin_unlock(&desc->lock);
1251 }
1252 EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1253 
1254 /**
1255  *	handle_fasteoi_mask_irq - irq handler for level hierarchy
1256  *	stacked on transparent controllers
1257  *
1258  *	@desc:	the interrupt description structure for this irq
1259  *
1260  *	Like handle_fasteoi_irq(), but for use with hierarchy where
1261  *	the irq_chip also needs to have its ->irq_mask_ack() function
1262  *	called.
1263  */
handle_fasteoi_mask_irq(struct irq_desc * desc)1264 void handle_fasteoi_mask_irq(struct irq_desc *desc)
1265 {
1266 	struct irq_chip *chip = desc->irq_data.chip;
1267 
1268 	raw_spin_lock(&desc->lock);
1269 	mask_ack_irq(desc);
1270 
1271 	if (!irq_may_run(desc))
1272 		goto out;
1273 
1274 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1275 
1276 	/*
1277 	 * If its disabled or no action available
1278 	 * then mask it and get out of here:
1279 	 */
1280 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1281 		desc->istate |= IRQS_PENDING;
1282 		mask_irq(desc);
1283 		goto out;
1284 	}
1285 
1286 	kstat_incr_irqs_this_cpu(desc);
1287 	if (desc->istate & IRQS_ONESHOT)
1288 		mask_irq(desc);
1289 
1290 	handle_irq_event(desc);
1291 
1292 	cond_unmask_eoi_irq(desc, chip);
1293 
1294 	raw_spin_unlock(&desc->lock);
1295 	return;
1296 out:
1297 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1298 		chip->irq_eoi(&desc->irq_data);
1299 	raw_spin_unlock(&desc->lock);
1300 }
1301 EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1302 
1303 #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1304 
1305 /**
1306  * irq_chip_set_parent_state - set the state of a parent interrupt.
1307  *
1308  * @data: Pointer to interrupt specific data
1309  * @which: State to be restored (one of IRQCHIP_STATE_*)
1310  * @val: Value corresponding to @which
1311  *
1312  * Conditional success, if the underlying irqchip does not implement it.
1313  */
irq_chip_set_parent_state(struct irq_data * data,enum irqchip_irq_state which,bool val)1314 int irq_chip_set_parent_state(struct irq_data *data,
1315 			      enum irqchip_irq_state which,
1316 			      bool val)
1317 {
1318 	data = data->parent_data;
1319 
1320 	if (!data || !data->chip->irq_set_irqchip_state)
1321 		return 0;
1322 
1323 	return data->chip->irq_set_irqchip_state(data, which, val);
1324 }
1325 EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
1326 
1327 /**
1328  * irq_chip_get_parent_state - get the state of a parent interrupt.
1329  *
1330  * @data: Pointer to interrupt specific data
1331  * @which: one of IRQCHIP_STATE_* the caller wants to know
1332  * @state: a pointer to a boolean where the state is to be stored
1333  *
1334  * Conditional success, if the underlying irqchip does not implement it.
1335  */
irq_chip_get_parent_state(struct irq_data * data,enum irqchip_irq_state which,bool * state)1336 int irq_chip_get_parent_state(struct irq_data *data,
1337 			      enum irqchip_irq_state which,
1338 			      bool *state)
1339 {
1340 	data = data->parent_data;
1341 
1342 	if (!data || !data->chip->irq_get_irqchip_state)
1343 		return 0;
1344 
1345 	return data->chip->irq_get_irqchip_state(data, which, state);
1346 }
1347 EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
1348 
1349 /**
1350  * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1351  * NULL)
1352  * @data:	Pointer to interrupt specific data
1353  */
irq_chip_enable_parent(struct irq_data * data)1354 void irq_chip_enable_parent(struct irq_data *data)
1355 {
1356 	data = data->parent_data;
1357 	if (data->chip->irq_enable)
1358 		data->chip->irq_enable(data);
1359 	else
1360 		data->chip->irq_unmask(data);
1361 }
1362 EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1363 
1364 /**
1365  * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1366  * NULL)
1367  * @data:	Pointer to interrupt specific data
1368  */
irq_chip_disable_parent(struct irq_data * data)1369 void irq_chip_disable_parent(struct irq_data *data)
1370 {
1371 	data = data->parent_data;
1372 	if (data->chip->irq_disable)
1373 		data->chip->irq_disable(data);
1374 	else
1375 		data->chip->irq_mask(data);
1376 }
1377 EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1378 
1379 /**
1380  * irq_chip_ack_parent - Acknowledge the parent interrupt
1381  * @data:	Pointer to interrupt specific data
1382  */
irq_chip_ack_parent(struct irq_data * data)1383 void irq_chip_ack_parent(struct irq_data *data)
1384 {
1385 	data = data->parent_data;
1386 	data->chip->irq_ack(data);
1387 }
1388 EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1389 
1390 /**
1391  * irq_chip_mask_parent - Mask the parent interrupt
1392  * @data:	Pointer to interrupt specific data
1393  */
irq_chip_mask_parent(struct irq_data * data)1394 void irq_chip_mask_parent(struct irq_data *data)
1395 {
1396 	data = data->parent_data;
1397 	data->chip->irq_mask(data);
1398 }
1399 EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1400 
1401 /**
1402  * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
1403  * @data:	Pointer to interrupt specific data
1404  */
irq_chip_mask_ack_parent(struct irq_data * data)1405 void irq_chip_mask_ack_parent(struct irq_data *data)
1406 {
1407 	data = data->parent_data;
1408 	data->chip->irq_mask_ack(data);
1409 }
1410 EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
1411 
1412 /**
1413  * irq_chip_unmask_parent - Unmask the parent interrupt
1414  * @data:	Pointer to interrupt specific data
1415  */
irq_chip_unmask_parent(struct irq_data * data)1416 void irq_chip_unmask_parent(struct irq_data *data)
1417 {
1418 	data = data->parent_data;
1419 	data->chip->irq_unmask(data);
1420 }
1421 EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1422 
1423 /**
1424  * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1425  * @data:	Pointer to interrupt specific data
1426  */
irq_chip_eoi_parent(struct irq_data * data)1427 void irq_chip_eoi_parent(struct irq_data *data)
1428 {
1429 	data = data->parent_data;
1430 	data->chip->irq_eoi(data);
1431 }
1432 EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1433 
1434 /**
1435  * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1436  * @data:	Pointer to interrupt specific data
1437  * @dest:	The affinity mask to set
1438  * @force:	Flag to enforce setting (disable online checks)
1439  *
1440  * Conditional, as the underlying parent chip might not implement it.
1441  */
irq_chip_set_affinity_parent(struct irq_data * data,const struct cpumask * dest,bool force)1442 int irq_chip_set_affinity_parent(struct irq_data *data,
1443 				 const struct cpumask *dest, bool force)
1444 {
1445 	data = data->parent_data;
1446 	if (data->chip->irq_set_affinity)
1447 		return data->chip->irq_set_affinity(data, dest, force);
1448 
1449 	return -ENOSYS;
1450 }
1451 EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1452 
1453 /**
1454  * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1455  * @data:	Pointer to interrupt specific data
1456  * @type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1457  *
1458  * Conditional, as the underlying parent chip might not implement it.
1459  */
irq_chip_set_type_parent(struct irq_data * data,unsigned int type)1460 int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1461 {
1462 	data = data->parent_data;
1463 
1464 	if (data->chip->irq_set_type)
1465 		return data->chip->irq_set_type(data, type);
1466 
1467 	return -ENOSYS;
1468 }
1469 EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1470 
1471 /**
1472  * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1473  * @data:	Pointer to interrupt specific data
1474  *
1475  * Iterate through the domain hierarchy of the interrupt and check
1476  * whether a hw retrigger function exists. If yes, invoke it.
1477  */
irq_chip_retrigger_hierarchy(struct irq_data * data)1478 int irq_chip_retrigger_hierarchy(struct irq_data *data)
1479 {
1480 	for (data = data->parent_data; data; data = data->parent_data)
1481 		if (data->chip && data->chip->irq_retrigger)
1482 			return data->chip->irq_retrigger(data);
1483 
1484 	return 0;
1485 }
1486 EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
1487 
1488 /**
1489  * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1490  * @data:	Pointer to interrupt specific data
1491  * @vcpu_info:	The vcpu affinity information
1492  */
irq_chip_set_vcpu_affinity_parent(struct irq_data * data,void * vcpu_info)1493 int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1494 {
1495 	data = data->parent_data;
1496 	if (data->chip->irq_set_vcpu_affinity)
1497 		return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1498 
1499 	return -ENOSYS;
1500 }
1501 EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
1502 /**
1503  * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1504  * @data:	Pointer to interrupt specific data
1505  * @on:		Whether to set or reset the wake-up capability of this irq
1506  *
1507  * Conditional, as the underlying parent chip might not implement it.
1508  */
irq_chip_set_wake_parent(struct irq_data * data,unsigned int on)1509 int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1510 {
1511 	data = data->parent_data;
1512 
1513 	if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
1514 		return 0;
1515 
1516 	if (data->chip->irq_set_wake)
1517 		return data->chip->irq_set_wake(data, on);
1518 
1519 	return -ENOSYS;
1520 }
1521 EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
1522 
1523 /**
1524  * irq_chip_request_resources_parent - Request resources on the parent interrupt
1525  * @data:	Pointer to interrupt specific data
1526  */
irq_chip_request_resources_parent(struct irq_data * data)1527 int irq_chip_request_resources_parent(struct irq_data *data)
1528 {
1529 	data = data->parent_data;
1530 
1531 	if (data->chip->irq_request_resources)
1532 		return data->chip->irq_request_resources(data);
1533 
1534 	/* no error on missing optional irq_chip::irq_request_resources */
1535 	return 0;
1536 }
1537 EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
1538 
1539 /**
1540  * irq_chip_release_resources_parent - Release resources on the parent interrupt
1541  * @data:	Pointer to interrupt specific data
1542  */
irq_chip_release_resources_parent(struct irq_data * data)1543 void irq_chip_release_resources_parent(struct irq_data *data)
1544 {
1545 	data = data->parent_data;
1546 	if (data->chip->irq_release_resources)
1547 		data->chip->irq_release_resources(data);
1548 }
1549 EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
1550 #endif
1551 
1552 /**
1553  * irq_chip_compose_msi_msg - Compose msi message for a irq chip
1554  * @data:	Pointer to interrupt specific data
1555  * @msg:	Pointer to the MSI message
1556  *
1557  * For hierarchical domains we find the first chip in the hierarchy
1558  * which implements the irq_compose_msi_msg callback. For non
1559  * hierarchical we use the top level chip.
1560  */
irq_chip_compose_msi_msg(struct irq_data * data,struct msi_msg * msg)1561 int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1562 {
1563 	struct irq_data *pos;
1564 
1565 	for (pos = NULL; !pos && data; data = irqd_get_parent_data(data)) {
1566 		if (data->chip && data->chip->irq_compose_msi_msg)
1567 			pos = data;
1568 	}
1569 
1570 	if (!pos)
1571 		return -ENOSYS;
1572 
1573 	pos->chip->irq_compose_msi_msg(pos, msg);
1574 	return 0;
1575 }
1576 
1577 /**
1578  * irq_chip_pm_get - Enable power for an IRQ chip
1579  * @data:	Pointer to interrupt specific data
1580  *
1581  * Enable the power to the IRQ chip referenced by the interrupt data
1582  * structure.
1583  */
irq_chip_pm_get(struct irq_data * data)1584 int irq_chip_pm_get(struct irq_data *data)
1585 {
1586 	int retval;
1587 
1588 	if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1589 		retval = pm_runtime_get_sync(data->chip->parent_device);
1590 		if (retval < 0) {
1591 			pm_runtime_put_noidle(data->chip->parent_device);
1592 			return retval;
1593 		}
1594 	}
1595 
1596 	return 0;
1597 }
1598 
1599 /**
1600  * irq_chip_pm_put - Disable power for an IRQ chip
1601  * @data:	Pointer to interrupt specific data
1602  *
1603  * Disable the power to the IRQ chip referenced by the interrupt data
1604  * structure, belongs. Note that power will only be disabled, once this
1605  * function has been called for all IRQs that have called irq_chip_pm_get().
1606  */
irq_chip_pm_put(struct irq_data * data)1607 int irq_chip_pm_put(struct irq_data *data)
1608 {
1609 	int retval = 0;
1610 
1611 	if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1612 		retval = pm_runtime_put(data->chip->parent_device);
1613 
1614 	return (retval < 0) ? retval : 0;
1615 }
1616