1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2018 Intel Corporation. */
3
4 #include <linux/bpf_trace.h>
5 #include <net/xdp_sock_drv.h>
6 #include <net/xdp.h>
7
8 #include "ixgbe.h"
9 #include "ixgbe_txrx_common.h"
10
ixgbe_xsk_pool(struct ixgbe_adapter * adapter,struct ixgbe_ring * ring)11 struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter,
12 struct ixgbe_ring *ring)
13 {
14 bool xdp_on = READ_ONCE(adapter->xdp_prog);
15 int qid = ring->ring_idx;
16
17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
18 return NULL;
19
20 return xsk_get_pool_from_qid(adapter->netdev, qid);
21 }
22
ixgbe_xsk_pool_enable(struct ixgbe_adapter * adapter,struct xsk_buff_pool * pool,u16 qid)23 static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter,
24 struct xsk_buff_pool *pool,
25 u16 qid)
26 {
27 struct net_device *netdev = adapter->netdev;
28 bool if_running;
29 int err;
30
31 if (qid >= adapter->num_rx_queues)
32 return -EINVAL;
33
34 if (qid >= netdev->real_num_rx_queues ||
35 qid >= netdev->real_num_tx_queues)
36 return -EINVAL;
37
38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR);
39 if (err)
40 return err;
41
42 if_running = netif_running(adapter->netdev) &&
43 ixgbe_enabled_xdp_adapter(adapter);
44
45 if (if_running)
46 ixgbe_txrx_ring_disable(adapter, qid);
47
48 set_bit(qid, adapter->af_xdp_zc_qps);
49
50 if (if_running) {
51 ixgbe_txrx_ring_enable(adapter, qid);
52
53 /* Kick start the NAPI context so that receiving will start */
54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
55 if (err) {
56 clear_bit(qid, adapter->af_xdp_zc_qps);
57 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
58 return err;
59 }
60 }
61
62 return 0;
63 }
64
ixgbe_xsk_pool_disable(struct ixgbe_adapter * adapter,u16 qid)65 static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid)
66 {
67 struct xsk_buff_pool *pool;
68 bool if_running;
69
70 pool = xsk_get_pool_from_qid(adapter->netdev, qid);
71 if (!pool)
72 return -EINVAL;
73
74 if_running = netif_running(adapter->netdev) &&
75 ixgbe_enabled_xdp_adapter(adapter);
76
77 if (if_running)
78 ixgbe_txrx_ring_disable(adapter, qid);
79
80 clear_bit(qid, adapter->af_xdp_zc_qps);
81 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
82
83 if (if_running)
84 ixgbe_txrx_ring_enable(adapter, qid);
85
86 return 0;
87 }
88
ixgbe_xsk_pool_setup(struct ixgbe_adapter * adapter,struct xsk_buff_pool * pool,u16 qid)89 int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter,
90 struct xsk_buff_pool *pool,
91 u16 qid)
92 {
93 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) :
94 ixgbe_xsk_pool_disable(adapter, qid);
95 }
96
ixgbe_run_xdp_zc(struct ixgbe_adapter * adapter,struct ixgbe_ring * rx_ring,struct xdp_buff * xdp)97 static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
98 struct ixgbe_ring *rx_ring,
99 struct xdp_buff *xdp)
100 {
101 int err, result = IXGBE_XDP_PASS;
102 struct bpf_prog *xdp_prog;
103 struct xdp_frame *xdpf;
104 u32 act;
105
106 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
107 act = bpf_prog_run_xdp(xdp_prog, xdp);
108
109 if (likely(act == XDP_REDIRECT)) {
110 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
111 if (err)
112 goto out_failure;
113 return IXGBE_XDP_REDIR;
114 }
115
116 switch (act) {
117 case XDP_PASS:
118 break;
119 case XDP_TX:
120 xdpf = xdp_convert_buff_to_frame(xdp);
121 if (unlikely(!xdpf))
122 goto out_failure;
123 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
124 if (result == IXGBE_XDP_CONSUMED)
125 goto out_failure;
126 break;
127 default:
128 bpf_warn_invalid_xdp_action(act);
129 fallthrough;
130 case XDP_ABORTED:
131 out_failure:
132 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
133 fallthrough; /* handle aborts by dropping packet */
134 case XDP_DROP:
135 result = IXGBE_XDP_CONSUMED;
136 break;
137 }
138 return result;
139 }
140
ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring * rx_ring,u16 count)141 bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
142 {
143 union ixgbe_adv_rx_desc *rx_desc;
144 struct ixgbe_rx_buffer *bi;
145 u16 i = rx_ring->next_to_use;
146 dma_addr_t dma;
147 bool ok = true;
148
149 /* nothing to do */
150 if (!count)
151 return true;
152
153 rx_desc = IXGBE_RX_DESC(rx_ring, i);
154 bi = &rx_ring->rx_buffer_info[i];
155 i -= rx_ring->count;
156
157 do {
158 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool);
159 if (!bi->xdp) {
160 ok = false;
161 break;
162 }
163
164 dma = xsk_buff_xdp_get_dma(bi->xdp);
165
166 /* Refresh the desc even if buffer_addrs didn't change
167 * because each write-back erases this info.
168 */
169 rx_desc->read.pkt_addr = cpu_to_le64(dma);
170
171 rx_desc++;
172 bi++;
173 i++;
174 if (unlikely(!i)) {
175 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
176 bi = rx_ring->rx_buffer_info;
177 i -= rx_ring->count;
178 }
179
180 /* clear the length for the next_to_use descriptor */
181 rx_desc->wb.upper.length = 0;
182
183 count--;
184 } while (count);
185
186 i += rx_ring->count;
187
188 if (rx_ring->next_to_use != i) {
189 rx_ring->next_to_use = i;
190
191 /* Force memory writes to complete before letting h/w
192 * know there are new descriptors to fetch. (Only
193 * applicable for weak-ordered memory model archs,
194 * such as IA-64).
195 */
196 wmb();
197 writel(i, rx_ring->tail);
198 }
199
200 return ok;
201 }
202
ixgbe_construct_skb_zc(struct ixgbe_ring * rx_ring,const struct xdp_buff * xdp)203 static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
204 const struct xdp_buff *xdp)
205 {
206 unsigned int totalsize = xdp->data_end - xdp->data_meta;
207 unsigned int metasize = xdp->data - xdp->data_meta;
208 struct sk_buff *skb;
209
210 net_prefetch(xdp->data_meta);
211
212 /* allocate a skb to store the frags */
213 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, totalsize,
214 GFP_ATOMIC | __GFP_NOWARN);
215 if (unlikely(!skb))
216 return NULL;
217
218 memcpy(__skb_put(skb, totalsize), xdp->data_meta,
219 ALIGN(totalsize, sizeof(long)));
220
221 if (metasize) {
222 skb_metadata_set(skb, metasize);
223 __skb_pull(skb, metasize);
224 }
225
226 return skb;
227 }
228
ixgbe_inc_ntc(struct ixgbe_ring * rx_ring)229 static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
230 {
231 u32 ntc = rx_ring->next_to_clean + 1;
232
233 ntc = (ntc < rx_ring->count) ? ntc : 0;
234 rx_ring->next_to_clean = ntc;
235 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
236 }
237
ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector * q_vector,struct ixgbe_ring * rx_ring,const int budget)238 int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
239 struct ixgbe_ring *rx_ring,
240 const int budget)
241 {
242 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
243 struct ixgbe_adapter *adapter = q_vector->adapter;
244 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
245 unsigned int xdp_res, xdp_xmit = 0;
246 bool failure = false;
247 struct sk_buff *skb;
248
249 while (likely(total_rx_packets < budget)) {
250 union ixgbe_adv_rx_desc *rx_desc;
251 struct ixgbe_rx_buffer *bi;
252 unsigned int size;
253
254 /* return some buffers to hardware, one at a time is too slow */
255 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
256 failure = failure ||
257 !ixgbe_alloc_rx_buffers_zc(rx_ring,
258 cleaned_count);
259 cleaned_count = 0;
260 }
261
262 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
263 size = le16_to_cpu(rx_desc->wb.upper.length);
264 if (!size)
265 break;
266
267 /* This memory barrier is needed to keep us from reading
268 * any other fields out of the rx_desc until we know the
269 * descriptor has been written back
270 */
271 dma_rmb();
272
273 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
274
275 if (unlikely(!ixgbe_test_staterr(rx_desc,
276 IXGBE_RXD_STAT_EOP))) {
277 struct ixgbe_rx_buffer *next_bi;
278
279 xsk_buff_free(bi->xdp);
280 bi->xdp = NULL;
281 ixgbe_inc_ntc(rx_ring);
282 next_bi =
283 &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
284 next_bi->discard = true;
285 continue;
286 }
287
288 if (unlikely(bi->discard)) {
289 xsk_buff_free(bi->xdp);
290 bi->xdp = NULL;
291 bi->discard = false;
292 ixgbe_inc_ntc(rx_ring);
293 continue;
294 }
295
296 bi->xdp->data_end = bi->xdp->data + size;
297 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool);
298 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp);
299
300 if (xdp_res) {
301 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR))
302 xdp_xmit |= xdp_res;
303 else
304 xsk_buff_free(bi->xdp);
305
306 bi->xdp = NULL;
307 total_rx_packets++;
308 total_rx_bytes += size;
309
310 cleaned_count++;
311 ixgbe_inc_ntc(rx_ring);
312 continue;
313 }
314
315 /* XDP_PASS path */
316 skb = ixgbe_construct_skb_zc(rx_ring, bi->xdp);
317 if (!skb) {
318 rx_ring->rx_stats.alloc_rx_buff_failed++;
319 break;
320 }
321
322 xsk_buff_free(bi->xdp);
323 bi->xdp = NULL;
324
325 cleaned_count++;
326 ixgbe_inc_ntc(rx_ring);
327
328 if (eth_skb_pad(skb))
329 continue;
330
331 total_rx_bytes += skb->len;
332 total_rx_packets++;
333
334 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
335 ixgbe_rx_skb(q_vector, skb);
336 }
337
338 if (xdp_xmit & IXGBE_XDP_REDIR)
339 xdp_do_flush_map();
340
341 if (xdp_xmit & IXGBE_XDP_TX) {
342 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
343
344 /* Force memory writes to complete before letting h/w
345 * know there are new descriptors to fetch.
346 */
347 wmb();
348 writel(ring->next_to_use, ring->tail);
349 }
350
351 u64_stats_update_begin(&rx_ring->syncp);
352 rx_ring->stats.packets += total_rx_packets;
353 rx_ring->stats.bytes += total_rx_bytes;
354 u64_stats_update_end(&rx_ring->syncp);
355 q_vector->rx.total_packets += total_rx_packets;
356 q_vector->rx.total_bytes += total_rx_bytes;
357
358 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
359 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
360 xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
361 else
362 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
363
364 return (int)total_rx_packets;
365 }
366 return failure ? budget : (int)total_rx_packets;
367 }
368
ixgbe_xsk_clean_rx_ring(struct ixgbe_ring * rx_ring)369 void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
370 {
371 struct ixgbe_rx_buffer *bi;
372 u16 i;
373
374 for (i = 0; i < rx_ring->count; i++) {
375 bi = &rx_ring->rx_buffer_info[i];
376
377 if (!bi->xdp)
378 continue;
379
380 xsk_buff_free(bi->xdp);
381 bi->xdp = NULL;
382 }
383 }
384
ixgbe_xmit_zc(struct ixgbe_ring * xdp_ring,unsigned int budget)385 static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
386 {
387 struct xsk_buff_pool *pool = xdp_ring->xsk_pool;
388 union ixgbe_adv_tx_desc *tx_desc = NULL;
389 struct ixgbe_tx_buffer *tx_bi;
390 bool work_done = true;
391 struct xdp_desc desc;
392 dma_addr_t dma;
393 u32 cmd_type;
394
395 while (budget-- > 0) {
396 if (unlikely(!ixgbe_desc_unused(xdp_ring))) {
397 work_done = false;
398 break;
399 }
400
401 if (!netif_carrier_ok(xdp_ring->netdev))
402 break;
403
404 if (!xsk_tx_peek_desc(pool, &desc))
405 break;
406
407 dma = xsk_buff_raw_get_dma(pool, desc.addr);
408 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len);
409
410 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
411 tx_bi->bytecount = desc.len;
412 tx_bi->xdpf = NULL;
413 tx_bi->gso_segs = 1;
414
415 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
416 tx_desc->read.buffer_addr = cpu_to_le64(dma);
417
418 /* put descriptor type bits */
419 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
420 IXGBE_ADVTXD_DCMD_DEXT |
421 IXGBE_ADVTXD_DCMD_IFCS;
422 cmd_type |= desc.len | IXGBE_TXD_CMD;
423 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
424 tx_desc->read.olinfo_status =
425 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
426
427 xdp_ring->next_to_use++;
428 if (xdp_ring->next_to_use == xdp_ring->count)
429 xdp_ring->next_to_use = 0;
430 }
431
432 if (tx_desc) {
433 ixgbe_xdp_ring_update_tail(xdp_ring);
434 xsk_tx_release(pool);
435 }
436
437 return !!budget && work_done;
438 }
439
ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring * tx_ring,struct ixgbe_tx_buffer * tx_bi)440 static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
441 struct ixgbe_tx_buffer *tx_bi)
442 {
443 xdp_return_frame(tx_bi->xdpf);
444 dma_unmap_single(tx_ring->dev,
445 dma_unmap_addr(tx_bi, dma),
446 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
447 dma_unmap_len_set(tx_bi, len, 0);
448 }
449
ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector * q_vector,struct ixgbe_ring * tx_ring,int napi_budget)450 bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
451 struct ixgbe_ring *tx_ring, int napi_budget)
452 {
453 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
454 unsigned int total_packets = 0, total_bytes = 0;
455 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
456 union ixgbe_adv_tx_desc *tx_desc;
457 struct ixgbe_tx_buffer *tx_bi;
458 u32 xsk_frames = 0;
459
460 tx_bi = &tx_ring->tx_buffer_info[ntc];
461 tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
462
463 while (ntc != ntu) {
464 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
465 break;
466
467 total_bytes += tx_bi->bytecount;
468 total_packets += tx_bi->gso_segs;
469
470 if (tx_bi->xdpf)
471 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
472 else
473 xsk_frames++;
474
475 tx_bi->xdpf = NULL;
476
477 tx_bi++;
478 tx_desc++;
479 ntc++;
480 if (unlikely(ntc == tx_ring->count)) {
481 ntc = 0;
482 tx_bi = tx_ring->tx_buffer_info;
483 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
484 }
485
486 /* issue prefetch for next Tx descriptor */
487 prefetch(tx_desc);
488 }
489
490 tx_ring->next_to_clean = ntc;
491
492 u64_stats_update_begin(&tx_ring->syncp);
493 tx_ring->stats.bytes += total_bytes;
494 tx_ring->stats.packets += total_packets;
495 u64_stats_update_end(&tx_ring->syncp);
496 q_vector->tx.total_bytes += total_bytes;
497 q_vector->tx.total_packets += total_packets;
498
499 if (xsk_frames)
500 xsk_tx_completed(pool, xsk_frames);
501
502 if (xsk_uses_need_wakeup(pool))
503 xsk_set_tx_need_wakeup(pool);
504
505 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
506 }
507
ixgbe_xsk_wakeup(struct net_device * dev,u32 qid,u32 flags)508 int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
509 {
510 struct ixgbe_adapter *adapter = netdev_priv(dev);
511 struct ixgbe_ring *ring;
512
513 if (test_bit(__IXGBE_DOWN, &adapter->state))
514 return -ENETDOWN;
515
516 if (!READ_ONCE(adapter->xdp_prog))
517 return -ENXIO;
518
519 if (qid >= adapter->num_xdp_queues)
520 return -ENXIO;
521
522 ring = adapter->xdp_ring[qid];
523
524 if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
525 return -ENETDOWN;
526
527 if (!ring->xsk_pool)
528 return -ENXIO;
529
530 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
531 u64 eics = BIT_ULL(ring->q_vector->v_idx);
532
533 ixgbe_irq_rearm_queues(adapter, eics);
534 }
535
536 return 0;
537 }
538
ixgbe_xsk_clean_tx_ring(struct ixgbe_ring * tx_ring)539 void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
540 {
541 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
542 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
543 struct ixgbe_tx_buffer *tx_bi;
544 u32 xsk_frames = 0;
545
546 while (ntc != ntu) {
547 tx_bi = &tx_ring->tx_buffer_info[ntc];
548
549 if (tx_bi->xdpf)
550 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
551 else
552 xsk_frames++;
553
554 tx_bi->xdpf = NULL;
555
556 ntc++;
557 if (ntc == tx_ring->count)
558 ntc = 0;
559 }
560
561 if (xsk_frames)
562 xsk_tx_completed(pool, xsk_frames);
563 }
564