1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
24 or
25 http://www.parl.clemson.edu/~keithu/hamachi.html
26
27 */
28
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
32
33
34 /* A few user-configurable values. */
35
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
45 */
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
52
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
56 */
57 static int rx_copybreak;
58
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
62 */
63 static int force32;
64
65
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
75 Default is autodetect
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
84 */
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
91 *
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
98 * interrupts.
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
101 *
102 */
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
105
106 /* Operational parameters that are set at compile time. */
107
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
118 */
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
123
124 /*
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
127 */
128
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
131
132 /*
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
136 */
137 #define RX_CHECKSUM
138
139 /* Operational parameters that usually are not changed. */
140 /* Time in jiffies before concluding the transmitter is hung. */
141 #define TX_TIMEOUT (5*HZ)
142
143 #include <linux/capability.h>
144 #include <linux/module.h>
145 #include <linux/kernel.h>
146 #include <linux/string.h>
147 #include <linux/timer.h>
148 #include <linux/time.h>
149 #include <linux/errno.h>
150 #include <linux/ioport.h>
151 #include <linux/interrupt.h>
152 #include <linux/pci.h>
153 #include <linux/init.h>
154 #include <linux/ethtool.h>
155 #include <linux/mii.h>
156 #include <linux/netdevice.h>
157 #include <linux/etherdevice.h>
158 #include <linux/skbuff.h>
159 #include <linux/ip.h>
160 #include <linux/delay.h>
161 #include <linux/bitops.h>
162
163 #include <linux/uaccess.h>
164 #include <asm/processor.h> /* Processor type for cache alignment. */
165 #include <asm/io.h>
166 #include <asm/unaligned.h>
167 #include <asm/cache.h>
168
169 static const char version[] =
170 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
171 " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
172 " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
173
174
175 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
176 we need it for hardware checksumming support. FYI... some of
177 the definitions in <netinet/ip.h> conflict/duplicate those in
178 other linux headers causing many compiler warnings.
179 */
180 #ifndef IP_MF
181 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
182 #endif
183
184 /* Define IP_OFFSET to be IPOPT_OFFSET */
185 #ifndef IP_OFFSET
186 #ifdef IPOPT_OFFSET
187 #define IP_OFFSET IPOPT_OFFSET
188 #else
189 #define IP_OFFSET 2
190 #endif
191 #endif
192
193 #define RUN_AT(x) (jiffies + (x))
194
195 #ifndef ADDRLEN
196 #define ADDRLEN 32
197 #endif
198
199 /* Condensed bus+endian portability operations. */
200 #if ADDRLEN == 64
201 #define cpu_to_leXX(addr) cpu_to_le64(addr)
202 #define leXX_to_cpu(addr) le64_to_cpu(addr)
203 #else
204 #define cpu_to_leXX(addr) cpu_to_le32(addr)
205 #define leXX_to_cpu(addr) le32_to_cpu(addr)
206 #endif
207
208
209 /*
210 Theory of Operation
211
212 I. Board Compatibility
213
214 This device driver is designed for the Packet Engines "Hamachi"
215 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
216 66Mhz PCI card.
217
218 II. Board-specific settings
219
220 No jumpers exist on the board. The chip supports software correction of
221 various motherboard wiring errors, however this driver does not support
222 that feature.
223
224 III. Driver operation
225
226 IIIa. Ring buffers
227
228 The Hamachi uses a typical descriptor based bus-master architecture.
229 The descriptor list is similar to that used by the Digital Tulip.
230 This driver uses two statically allocated fixed-size descriptor lists
231 formed into rings by a branch from the final descriptor to the beginning of
232 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
233
234 This driver uses a zero-copy receive and transmit scheme similar my other
235 network drivers.
236 The driver allocates full frame size skbuffs for the Rx ring buffers at
237 open() time and passes the skb->data field to the Hamachi as receive data
238 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
239 a fresh skbuff is allocated and the frame is copied to the new skbuff.
240 When the incoming frame is larger, the skbuff is passed directly up the
241 protocol stack and replaced by a newly allocated skbuff.
242
243 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
244 using a full-sized skbuff for small frames vs. the copying costs of larger
245 frames. Gigabit cards are typically used on generously configured machines
246 and the underfilled buffers have negligible impact compared to the benefit of
247 a single allocation size, so the default value of zero results in never
248 copying packets.
249
250 IIIb/c. Transmit/Receive Structure
251
252 The Rx and Tx descriptor structure are straight-forward, with no historical
253 baggage that must be explained. Unlike the awkward DBDMA structure, there
254 are no unused fields or option bits that had only one allowable setting.
255
256 Two details should be noted about the descriptors: The chip supports both 32
257 bit and 64 bit address structures, and the length field is overwritten on
258 the receive descriptors. The descriptor length is set in the control word
259 for each channel. The development driver uses 32 bit addresses only, however
260 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
261
262 IIId. Synchronization
263
264 This driver is very similar to my other network drivers.
265 The driver runs as two independent, single-threaded flows of control. One
266 is the send-packet routine, which enforces single-threaded use by the
267 dev->tbusy flag. The other thread is the interrupt handler, which is single
268 threaded by the hardware and other software.
269
270 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
271 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
272 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
273 the 'hmp->tx_full' flag.
274
275 The interrupt handler has exclusive control over the Rx ring and records stats
276 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
277 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
278 clears both the tx_full and tbusy flags.
279
280 IV. Notes
281
282 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
283
284 IVb. References
285
286 Hamachi Engineering Design Specification, 5/15/97
287 (Note: This version was marked "Confidential".)
288
289 IVc. Errata
290
291 None noted.
292
293 V. Recent Changes
294
295 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
296 to help avoid some stall conditions -- this needs further research.
297
298 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
299 the Tx ring and is called from hamachi_start_xmit (this used to be
300 called from hamachi_interrupt but it tends to delay execution of the
301 interrupt handler and thus reduce bandwidth by reducing the latency
302 between hamachi_rx()'s). Notably, some modification has been made so
303 that the cleaning loop checks only to make sure that the DescOwn bit
304 isn't set in the status flag since the card is not required
305 to set the entire flag to zero after processing.
306
307 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
308 checked before attempting to add a buffer to the ring. If the ring is full
309 an attempt is made to free any dirty buffers and thus find space for
310 the new buffer or the function returns non-zero which should case the
311 scheduler to reschedule the buffer later.
312
313 01/15/1999 EPK Some adjustments were made to the chip initialization.
314 End-to-end flow control should now be fully active and the interrupt
315 algorithm vars have been changed. These could probably use further tuning.
316
317 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
318 set the rx and tx latencies for the Hamachi interrupts. If you're having
319 problems with network stalls, try setting these to higher values.
320 Valid values are 0x00 through 0xff.
321
322 01/15/1999 EPK In general, the overall bandwidth has increased and
323 latencies are better (sometimes by a factor of 2). Stalls are rare at
324 this point, however there still appears to be a bug somewhere between the
325 hardware and driver. TCP checksum errors under load also appear to be
326 eliminated at this point.
327
328 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
329 Rx and Tx rings. This appears to have been affecting whether a particular
330 peer-to-peer connection would hang under high load. I believe the Rx
331 rings was typically getting set correctly, but the Tx ring wasn't getting
332 the DescEndRing bit set during initialization. ??? Does this mean the
333 hamachi card is using the DescEndRing in processing even if a particular
334 slot isn't in use -- hypothetically, the card might be searching the
335 entire Tx ring for slots with the DescOwn bit set and then processing
336 them. If the DescEndRing bit isn't set, then it might just wander off
337 through memory until it hits a chunk of data with that bit set
338 and then looping back.
339
340 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
341 problem (TxCmd and RxCmd need only to be set when idle or stopped.
342
343 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
344 (Michel Mueller pointed out the ``permanently busy'' potential
345 problem here).
346
347 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
348
349 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
350 incorrectly defined and corrected (as per Michel Mueller).
351
352 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
353 were available before resetting the tbusy and tx_full flags
354 (as per Michel Mueller).
355
356 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
357
358 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
359 32 bit.
360
361 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
362 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
363 re-structuring I would like to do.
364
365 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
366 parameters on a dual P3-450 setup yielded the new default interrupt
367 mitigation parameters. Tx should interrupt VERY infrequently due to
368 Eric's scheme. Rx should be more often...
369
370 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
371 nicely with non-linux machines.
372
373 03/13/2000 KDU Experimented with some of the configuration values:
374
375 -It seems that enabling PCI performance commands for descriptors
376 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
377 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
378 leave them that way until I hear further feedback.
379
380 -Increasing the PCI_LATENCY_TIMER to 130
381 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
382 degrade performance. Leaving default at 64 pending further information.
383
384 03/14/2000 KDU Further tuning:
385
386 -adjusted boguscnt in hamachi_rx() to depend on interrupt
387 mitigation parameters chosen.
388
389 -Selected a set of interrupt parameters based on some extensive testing.
390 These may change with more testing.
391
392 TO DO:
393
394 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
395 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
396 that case.
397
398 -fix the reset procedure. It doesn't quite work.
399 */
400
401 /* A few values that may be tweaked. */
402 /* Size of each temporary Rx buffer, calculated as:
403 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
404 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum
405 */
406 #define PKT_BUF_SZ 1536
407
408 /* For now, this is going to be set to the maximum size of an ethernet
409 * packet. Eventually, we may want to make it a variable that is
410 * related to the MTU
411 */
412 #define MAX_FRAME_SIZE 1518
413
414 /* The rest of these values should never change. */
415
416 static void hamachi_timer(struct timer_list *t);
417
418 enum capability_flags {CanHaveMII=1, };
419 static const struct chip_info {
420 u16 vendor_id, device_id, device_id_mask, pad;
421 const char *name;
422 void (*media_timer)(struct timer_list *t);
423 int flags;
424 } chip_tbl[] = {
425 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
426 {0,},
427 };
428
429 /* Offsets to the Hamachi registers. Various sizes. */
430 enum hamachi_offsets {
431 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
432 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
433 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
434 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
435 TxChecksum=0x074, RxChecksum=0x076,
436 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
437 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
438 EventStatus=0x08C,
439 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
440 /* See enum MII_offsets below. */
441 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
442 AddrMode=0x0D0, StationAddr=0x0D2,
443 /* Gigabit AutoNegotiation. */
444 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
445 ANLinkPartnerAbility=0x0EA,
446 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
447 FIFOcfg=0x0F8,
448 };
449
450 /* Offsets to the MII-mode registers. */
451 enum MII_offsets {
452 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
453 MII_Status=0xAE,
454 };
455
456 /* Bits in the interrupt status/mask registers. */
457 enum intr_status_bits {
458 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
459 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
460 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
461
462 /* The Hamachi Rx and Tx buffer descriptors. */
463 struct hamachi_desc {
464 __le32 status_n_length;
465 #if ADDRLEN == 64
466 u32 pad;
467 __le64 addr;
468 #else
469 __le32 addr;
470 #endif
471 };
472
473 /* Bits in hamachi_desc.status_n_length */
474 enum desc_status_bits {
475 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
476 DescIntr=0x10000000,
477 };
478
479 #define PRIV_ALIGN 15 /* Required alignment mask */
480 #define MII_CNT 4
481 struct hamachi_private {
482 /* Descriptor rings first for alignment. Tx requires a second descriptor
483 for status. */
484 struct hamachi_desc *rx_ring;
485 struct hamachi_desc *tx_ring;
486 struct sk_buff* rx_skbuff[RX_RING_SIZE];
487 struct sk_buff* tx_skbuff[TX_RING_SIZE];
488 dma_addr_t tx_ring_dma;
489 dma_addr_t rx_ring_dma;
490 struct timer_list timer; /* Media selection timer. */
491 /* Frequently used and paired value: keep adjacent for cache effect. */
492 spinlock_t lock;
493 int chip_id;
494 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
495 unsigned int cur_tx, dirty_tx;
496 unsigned int rx_buf_sz; /* Based on MTU+slack. */
497 unsigned int tx_full:1; /* The Tx queue is full. */
498 unsigned int duplex_lock:1;
499 unsigned int default_port:4; /* Last dev->if_port value. */
500 /* MII transceiver section. */
501 int mii_cnt; /* MII device addresses. */
502 struct mii_if_info mii_if; /* MII lib hooks/info */
503 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
504 u32 rx_int_var, tx_int_var; /* interrupt control variables */
505 u32 option; /* Hold on to a copy of the options */
506 struct pci_dev *pci_dev;
507 void __iomem *base;
508 };
509
510 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
511 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
512 MODULE_LICENSE("GPL");
513
514 module_param(max_interrupt_work, int, 0);
515 module_param(mtu, int, 0);
516 module_param(debug, int, 0);
517 module_param(min_rx_pkt, int, 0);
518 module_param(max_rx_gap, int, 0);
519 module_param(max_rx_latency, int, 0);
520 module_param(min_tx_pkt, int, 0);
521 module_param(max_tx_gap, int, 0);
522 module_param(max_tx_latency, int, 0);
523 module_param(rx_copybreak, int, 0);
524 module_param_array(rx_params, int, NULL, 0);
525 module_param_array(tx_params, int, NULL, 0);
526 module_param_array(options, int, NULL, 0);
527 module_param_array(full_duplex, int, NULL, 0);
528 module_param(force32, int, 0);
529 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
530 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
531 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
532 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
533 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
534 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
535 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
536 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
537 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
538 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
539 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
540 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
541 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
542 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
543 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
544
545 static int read_eeprom(void __iomem *ioaddr, int location);
546 static int mdio_read(struct net_device *dev, int phy_id, int location);
547 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
548 static int hamachi_open(struct net_device *dev);
549 static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
550 static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
551 void __user *data, int cmd);
552 static void hamachi_timer(struct timer_list *t);
553 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue);
554 static void hamachi_init_ring(struct net_device *dev);
555 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
556 struct net_device *dev);
557 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
558 static int hamachi_rx(struct net_device *dev);
559 static inline int hamachi_tx(struct net_device *dev);
560 static void hamachi_error(struct net_device *dev, int intr_status);
561 static int hamachi_close(struct net_device *dev);
562 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
563 static void set_rx_mode(struct net_device *dev);
564 static const struct ethtool_ops ethtool_ops;
565 static const struct ethtool_ops ethtool_ops_no_mii;
566
567 static const struct net_device_ops hamachi_netdev_ops = {
568 .ndo_open = hamachi_open,
569 .ndo_stop = hamachi_close,
570 .ndo_start_xmit = hamachi_start_xmit,
571 .ndo_get_stats = hamachi_get_stats,
572 .ndo_set_rx_mode = set_rx_mode,
573 .ndo_validate_addr = eth_validate_addr,
574 .ndo_set_mac_address = eth_mac_addr,
575 .ndo_tx_timeout = hamachi_tx_timeout,
576 .ndo_eth_ioctl = hamachi_ioctl,
577 .ndo_siocdevprivate = hamachi_siocdevprivate,
578 };
579
580
hamachi_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)581 static int hamachi_init_one(struct pci_dev *pdev,
582 const struct pci_device_id *ent)
583 {
584 struct hamachi_private *hmp;
585 int option, i, rx_int_var, tx_int_var, boguscnt;
586 int chip_id = ent->driver_data;
587 int irq;
588 void __iomem *ioaddr;
589 unsigned long base;
590 static int card_idx;
591 struct net_device *dev;
592 void *ring_space;
593 dma_addr_t ring_dma;
594 int ret = -ENOMEM;
595
596 /* when built into the kernel, we only print version if device is found */
597 #ifndef MODULE
598 static int printed_version;
599 if (!printed_version++)
600 printk(version);
601 #endif
602
603 if (pci_enable_device(pdev)) {
604 ret = -EIO;
605 goto err_out;
606 }
607
608 base = pci_resource_start(pdev, 0);
609 #ifdef __alpha__ /* Really "64 bit addrs" */
610 base |= (pci_resource_start(pdev, 1) << 32);
611 #endif
612
613 pci_set_master(pdev);
614
615 i = pci_request_regions(pdev, DRV_NAME);
616 if (i)
617 return i;
618
619 irq = pdev->irq;
620 ioaddr = ioremap(base, 0x400);
621 if (!ioaddr)
622 goto err_out_release;
623
624 dev = alloc_etherdev(sizeof(struct hamachi_private));
625 if (!dev)
626 goto err_out_iounmap;
627
628 SET_NETDEV_DEV(dev, &pdev->dev);
629
630 for (i = 0; i < 6; i++)
631 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
632 : readb(ioaddr + StationAddr + i);
633
634 #if ! defined(final_version)
635 if (hamachi_debug > 4)
636 for (i = 0; i < 0x10; i++)
637 printk("%2.2x%s",
638 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
639 #endif
640
641 hmp = netdev_priv(dev);
642 spin_lock_init(&hmp->lock);
643
644 hmp->mii_if.dev = dev;
645 hmp->mii_if.mdio_read = mdio_read;
646 hmp->mii_if.mdio_write = mdio_write;
647 hmp->mii_if.phy_id_mask = 0x1f;
648 hmp->mii_if.reg_num_mask = 0x1f;
649
650 ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma,
651 GFP_KERNEL);
652 if (!ring_space)
653 goto err_out_cleardev;
654 hmp->tx_ring = ring_space;
655 hmp->tx_ring_dma = ring_dma;
656
657 ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma,
658 GFP_KERNEL);
659 if (!ring_space)
660 goto err_out_unmap_tx;
661 hmp->rx_ring = ring_space;
662 hmp->rx_ring_dma = ring_dma;
663
664 /* Check for options being passed in */
665 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
666 if (dev->mem_start)
667 option = dev->mem_start;
668
669 /* If the bus size is misidentified, do the following. */
670 force32 = force32 ? force32 :
671 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
672 if (force32)
673 writeb(force32, ioaddr + VirtualJumpers);
674
675 /* Hmmm, do we really need to reset the chip???. */
676 writeb(0x01, ioaddr + ChipReset);
677
678 /* After a reset, the clock speed measurement of the PCI bus will not
679 * be valid for a moment. Wait for a little while until it is. If
680 * it takes more than 10ms, forget it.
681 */
682 udelay(10);
683 i = readb(ioaddr + PCIClkMeas);
684 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
685 udelay(10);
686 i = readb(ioaddr + PCIClkMeas);
687 }
688
689 hmp->base = ioaddr;
690 pci_set_drvdata(pdev, dev);
691
692 hmp->chip_id = chip_id;
693 hmp->pci_dev = pdev;
694
695 /* The lower four bits are the media type. */
696 if (option > 0) {
697 hmp->option = option;
698 if (option & 0x200)
699 hmp->mii_if.full_duplex = 1;
700 else if (option & 0x080)
701 hmp->mii_if.full_duplex = 0;
702 hmp->default_port = option & 15;
703 if (hmp->default_port)
704 hmp->mii_if.force_media = 1;
705 }
706 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
707 hmp->mii_if.full_duplex = 1;
708
709 /* lock the duplex mode if someone specified a value */
710 if (hmp->mii_if.full_duplex || (option & 0x080))
711 hmp->duplex_lock = 1;
712
713 /* Set interrupt tuning parameters */
714 max_rx_latency = max_rx_latency & 0x00ff;
715 max_rx_gap = max_rx_gap & 0x00ff;
716 min_rx_pkt = min_rx_pkt & 0x00ff;
717 max_tx_latency = max_tx_latency & 0x00ff;
718 max_tx_gap = max_tx_gap & 0x00ff;
719 min_tx_pkt = min_tx_pkt & 0x00ff;
720
721 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
722 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
723 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
724 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
725 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
726 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
727
728
729 /* The Hamachi-specific entries in the device structure. */
730 dev->netdev_ops = &hamachi_netdev_ops;
731 dev->ethtool_ops = (chip_tbl[hmp->chip_id].flags & CanHaveMII) ?
732 ðtool_ops : ðtool_ops_no_mii;
733 dev->watchdog_timeo = TX_TIMEOUT;
734 if (mtu)
735 dev->mtu = mtu;
736
737 i = register_netdev(dev);
738 if (i) {
739 ret = i;
740 goto err_out_unmap_rx;
741 }
742
743 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
744 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
745 ioaddr, dev->dev_addr, irq);
746 i = readb(ioaddr + PCIClkMeas);
747 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
748 "%2.2x, LPA %4.4x.\n",
749 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
750 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
751 readw(ioaddr + ANLinkPartnerAbility));
752
753 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
754 int phy, phy_idx = 0;
755 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
756 int mii_status = mdio_read(dev, phy, MII_BMSR);
757 if (mii_status != 0xffff &&
758 mii_status != 0x0000) {
759 hmp->phys[phy_idx++] = phy;
760 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
761 printk(KERN_INFO "%s: MII PHY found at address %d, status "
762 "0x%4.4x advertising %4.4x.\n",
763 dev->name, phy, mii_status, hmp->mii_if.advertising);
764 }
765 }
766 hmp->mii_cnt = phy_idx;
767 if (hmp->mii_cnt > 0)
768 hmp->mii_if.phy_id = hmp->phys[0];
769 else
770 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
771 }
772 /* Configure gigabit autonegotiation. */
773 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
774 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
775 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
776
777 card_idx++;
778 return 0;
779
780 err_out_unmap_rx:
781 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
782 hmp->rx_ring_dma);
783 err_out_unmap_tx:
784 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
785 hmp->tx_ring_dma);
786 err_out_cleardev:
787 free_netdev (dev);
788 err_out_iounmap:
789 iounmap(ioaddr);
790 err_out_release:
791 pci_release_regions(pdev);
792 err_out:
793 return ret;
794 }
795
read_eeprom(void __iomem * ioaddr,int location)796 static int read_eeprom(void __iomem *ioaddr, int location)
797 {
798 int bogus_cnt = 1000;
799
800 /* We should check busy first - per docs -KDU */
801 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
802 writew(location, ioaddr + EEAddr);
803 writeb(0x02, ioaddr + EECmdStatus);
804 bogus_cnt = 1000;
805 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
806 if (hamachi_debug > 5)
807 printk(" EEPROM status is %2.2x after %d ticks.\n",
808 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
809 return readb(ioaddr + EEData);
810 }
811
812 /* MII Managemen Data I/O accesses.
813 These routines assume the MDIO controller is idle, and do not exit until
814 the command is finished. */
815
mdio_read(struct net_device * dev,int phy_id,int location)816 static int mdio_read(struct net_device *dev, int phy_id, int location)
817 {
818 struct hamachi_private *hmp = netdev_priv(dev);
819 void __iomem *ioaddr = hmp->base;
820 int i;
821
822 /* We should check busy first - per docs -KDU */
823 for (i = 10000; i >= 0; i--)
824 if ((readw(ioaddr + MII_Status) & 1) == 0)
825 break;
826 writew((phy_id<<8) + location, ioaddr + MII_Addr);
827 writew(0x0001, ioaddr + MII_Cmd);
828 for (i = 10000; i >= 0; i--)
829 if ((readw(ioaddr + MII_Status) & 1) == 0)
830 break;
831 return readw(ioaddr + MII_Rd_Data);
832 }
833
mdio_write(struct net_device * dev,int phy_id,int location,int value)834 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
835 {
836 struct hamachi_private *hmp = netdev_priv(dev);
837 void __iomem *ioaddr = hmp->base;
838 int i;
839
840 /* We should check busy first - per docs -KDU */
841 for (i = 10000; i >= 0; i--)
842 if ((readw(ioaddr + MII_Status) & 1) == 0)
843 break;
844 writew((phy_id<<8) + location, ioaddr + MII_Addr);
845 writew(value, ioaddr + MII_Wr_Data);
846
847 /* Wait for the command to finish. */
848 for (i = 10000; i >= 0; i--)
849 if ((readw(ioaddr + MII_Status) & 1) == 0)
850 break;
851 }
852
853
hamachi_open(struct net_device * dev)854 static int hamachi_open(struct net_device *dev)
855 {
856 struct hamachi_private *hmp = netdev_priv(dev);
857 void __iomem *ioaddr = hmp->base;
858 int i;
859 u32 rx_int_var, tx_int_var;
860 u16 fifo_info;
861
862 i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
863 dev->name, dev);
864 if (i)
865 return i;
866
867 hamachi_init_ring(dev);
868
869 #if ADDRLEN == 64
870 /* writellll anyone ? */
871 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
872 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
873 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
874 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
875 #else
876 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
877 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
878 #endif
879
880 /* TODO: It would make sense to organize this as words since the card
881 * documentation does. -KDU
882 */
883 for (i = 0; i < 6; i++)
884 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
885
886 /* Initialize other registers: with so many this eventually this will
887 converted to an offset/value list. */
888
889 /* Configure the FIFO */
890 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
891 switch (fifo_info){
892 case 0 :
893 /* No FIFO */
894 writew(0x0000, ioaddr + FIFOcfg);
895 break;
896 case 1 :
897 /* Configure the FIFO for 512K external, 16K used for Tx. */
898 writew(0x0028, ioaddr + FIFOcfg);
899 break;
900 case 2 :
901 /* Configure the FIFO for 1024 external, 32K used for Tx. */
902 writew(0x004C, ioaddr + FIFOcfg);
903 break;
904 case 3 :
905 /* Configure the FIFO for 2048 external, 32K used for Tx. */
906 writew(0x006C, ioaddr + FIFOcfg);
907 break;
908 default :
909 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
910 dev->name);
911 /* Default to no FIFO */
912 writew(0x0000, ioaddr + FIFOcfg);
913 break;
914 }
915
916 if (dev->if_port == 0)
917 dev->if_port = hmp->default_port;
918
919
920 /* Setting the Rx mode will start the Rx process. */
921 /* If someone didn't choose a duplex, default to full-duplex */
922 if (hmp->duplex_lock != 1)
923 hmp->mii_if.full_duplex = 1;
924
925 /* always 1, takes no more time to do it */
926 writew(0x0001, ioaddr + RxChecksum);
927 writew(0x0000, ioaddr + TxChecksum);
928 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
929 writew(0x215F, ioaddr + MACCnfg);
930 writew(0x000C, ioaddr + FrameGap0);
931 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
932 writew(0x1018, ioaddr + FrameGap1);
933 /* Why do we enable receives/transmits here? -KDU */
934 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
935 /* Enable automatic generation of flow control frames, period 0xffff. */
936 writel(0x0030FFFF, ioaddr + FlowCtrl);
937 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
938
939 /* Enable legacy links. */
940 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
941 /* Initial Link LED to blinking red. */
942 writeb(0x03, ioaddr + LEDCtrl);
943
944 /* Configure interrupt mitigation. This has a great effect on
945 performance, so systems tuning should start here!. */
946
947 rx_int_var = hmp->rx_int_var;
948 tx_int_var = hmp->tx_int_var;
949
950 if (hamachi_debug > 1) {
951 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
952 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
953 (tx_int_var & 0x00ff0000) >> 16);
954 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
955 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
956 (rx_int_var & 0x00ff0000) >> 16);
957 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
958 }
959
960 writel(tx_int_var, ioaddr + TxIntrCtrl);
961 writel(rx_int_var, ioaddr + RxIntrCtrl);
962
963 set_rx_mode(dev);
964
965 netif_start_queue(dev);
966
967 /* Enable interrupts by setting the interrupt mask. */
968 writel(0x80878787, ioaddr + InterruptEnable);
969 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
970
971 /* Configure and start the DMA channels. */
972 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
973 #if ADDRLEN == 64
974 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
975 writew(0x005D, ioaddr + TxDMACtrl);
976 #else
977 writew(0x001D, ioaddr + RxDMACtrl);
978 writew(0x001D, ioaddr + TxDMACtrl);
979 #endif
980 writew(0x0001, ioaddr + RxCmd);
981
982 if (hamachi_debug > 2) {
983 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
984 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
985 }
986 /* Set the timer to check for link beat. */
987 timer_setup(&hmp->timer, hamachi_timer, 0);
988 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
989 add_timer(&hmp->timer);
990
991 return 0;
992 }
993
hamachi_tx(struct net_device * dev)994 static inline int hamachi_tx(struct net_device *dev)
995 {
996 struct hamachi_private *hmp = netdev_priv(dev);
997
998 /* Update the dirty pointer until we find an entry that is
999 still owned by the card */
1000 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1001 int entry = hmp->dirty_tx % TX_RING_SIZE;
1002 struct sk_buff *skb;
1003
1004 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1005 break;
1006 /* Free the original skb. */
1007 skb = hmp->tx_skbuff[entry];
1008 if (skb) {
1009 dma_unmap_single(&hmp->pci_dev->dev,
1010 leXX_to_cpu(hmp->tx_ring[entry].addr),
1011 skb->len, DMA_TO_DEVICE);
1012 dev_kfree_skb(skb);
1013 hmp->tx_skbuff[entry] = NULL;
1014 }
1015 hmp->tx_ring[entry].status_n_length = 0;
1016 if (entry >= TX_RING_SIZE-1)
1017 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1018 cpu_to_le32(DescEndRing);
1019 dev->stats.tx_packets++;
1020 }
1021
1022 return 0;
1023 }
1024
hamachi_timer(struct timer_list * t)1025 static void hamachi_timer(struct timer_list *t)
1026 {
1027 struct hamachi_private *hmp = from_timer(hmp, t, timer);
1028 struct net_device *dev = hmp->mii_if.dev;
1029 void __iomem *ioaddr = hmp->base;
1030 int next_tick = 10*HZ;
1031
1032 if (hamachi_debug > 2) {
1033 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1034 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1035 readw(ioaddr + ANLinkPartnerAbility));
1036 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1037 "%4.4x %4.4x %4.4x.\n", dev->name,
1038 readw(ioaddr + 0x0e0),
1039 readw(ioaddr + 0x0e2),
1040 readw(ioaddr + 0x0e4),
1041 readw(ioaddr + 0x0e6),
1042 readw(ioaddr + 0x0e8),
1043 readw(ioaddr + 0x0eA));
1044 }
1045 /* We could do something here... nah. */
1046 hmp->timer.expires = RUN_AT(next_tick);
1047 add_timer(&hmp->timer);
1048 }
1049
hamachi_tx_timeout(struct net_device * dev,unsigned int txqueue)1050 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue)
1051 {
1052 int i;
1053 struct hamachi_private *hmp = netdev_priv(dev);
1054 void __iomem *ioaddr = hmp->base;
1055
1056 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1057 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1058
1059 {
1060 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1061 for (i = 0; i < RX_RING_SIZE; i++)
1062 printk(KERN_CONT " %8.8x",
1063 le32_to_cpu(hmp->rx_ring[i].status_n_length));
1064 printk(KERN_CONT "\n");
1065 printk(KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1066 for (i = 0; i < TX_RING_SIZE; i++)
1067 printk(KERN_CONT " %4.4x",
1068 le32_to_cpu(hmp->tx_ring[i].status_n_length));
1069 printk(KERN_CONT "\n");
1070 }
1071
1072 /* Reinit the hardware and make sure the Rx and Tx processes
1073 are up and running.
1074 */
1075 dev->if_port = 0;
1076 /* The right way to do Reset. -KDU
1077 * -Clear OWN bit in all Rx/Tx descriptors
1078 * -Wait 50 uS for channels to go idle
1079 * -Turn off MAC receiver
1080 * -Issue Reset
1081 */
1082
1083 for (i = 0; i < RX_RING_SIZE; i++)
1084 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1085
1086 /* Presume that all packets in the Tx queue are gone if we have to
1087 * re-init the hardware.
1088 */
1089 for (i = 0; i < TX_RING_SIZE; i++){
1090 struct sk_buff *skb;
1091
1092 if (i >= TX_RING_SIZE - 1)
1093 hmp->tx_ring[i].status_n_length =
1094 cpu_to_le32(DescEndRing) |
1095 (hmp->tx_ring[i].status_n_length &
1096 cpu_to_le32(0x0000ffff));
1097 else
1098 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1099 skb = hmp->tx_skbuff[i];
1100 if (skb){
1101 dma_unmap_single(&hmp->pci_dev->dev,
1102 leXX_to_cpu(hmp->tx_ring[i].addr),
1103 skb->len, DMA_TO_DEVICE);
1104 dev_kfree_skb(skb);
1105 hmp->tx_skbuff[i] = NULL;
1106 }
1107 }
1108
1109 udelay(60); /* Sleep 60 us just for safety sake */
1110 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1111
1112 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1113
1114 hmp->tx_full = 0;
1115 hmp->cur_rx = hmp->cur_tx = 0;
1116 hmp->dirty_rx = hmp->dirty_tx = 0;
1117 /* Rx packets are also presumed lost; however, we need to make sure a
1118 * ring of buffers is in tact. -KDU
1119 */
1120 for (i = 0; i < RX_RING_SIZE; i++){
1121 struct sk_buff *skb = hmp->rx_skbuff[i];
1122
1123 if (skb){
1124 dma_unmap_single(&hmp->pci_dev->dev,
1125 leXX_to_cpu(hmp->rx_ring[i].addr),
1126 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1127 dev_kfree_skb(skb);
1128 hmp->rx_skbuff[i] = NULL;
1129 }
1130 }
1131 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1132 for (i = 0; i < RX_RING_SIZE; i++) {
1133 struct sk_buff *skb;
1134
1135 skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1136 hmp->rx_skbuff[i] = skb;
1137 if (skb == NULL)
1138 break;
1139
1140 hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1141 skb->data,
1142 hmp->rx_buf_sz,
1143 DMA_FROM_DEVICE));
1144 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1145 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1146 }
1147 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1148 /* Mark the last entry as wrapping the ring. */
1149 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1150
1151 /* Trigger an immediate transmit demand. */
1152 netif_trans_update(dev); /* prevent tx timeout */
1153 dev->stats.tx_errors++;
1154
1155 /* Restart the chip's Tx/Rx processes . */
1156 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1157 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1158 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1159
1160 netif_wake_queue(dev);
1161 }
1162
1163
1164 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
hamachi_init_ring(struct net_device * dev)1165 static void hamachi_init_ring(struct net_device *dev)
1166 {
1167 struct hamachi_private *hmp = netdev_priv(dev);
1168 int i;
1169
1170 hmp->tx_full = 0;
1171 hmp->cur_rx = hmp->cur_tx = 0;
1172 hmp->dirty_rx = hmp->dirty_tx = 0;
1173
1174 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1175 * card needs room to do 8 byte alignment, +2 so we can reserve
1176 * the first 2 bytes, and +16 gets room for the status word from the
1177 * card. -KDU
1178 */
1179 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1180 (((dev->mtu+26+7) & ~7) + 16));
1181
1182 /* Initialize all Rx descriptors. */
1183 for (i = 0; i < RX_RING_SIZE; i++) {
1184 hmp->rx_ring[i].status_n_length = 0;
1185 hmp->rx_skbuff[i] = NULL;
1186 }
1187 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1188 for (i = 0; i < RX_RING_SIZE; i++) {
1189 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1190 hmp->rx_skbuff[i] = skb;
1191 if (skb == NULL)
1192 break;
1193 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1194 hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1195 skb->data,
1196 hmp->rx_buf_sz,
1197 DMA_FROM_DEVICE));
1198 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1199 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1200 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1201 }
1202 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1203 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1204
1205 for (i = 0; i < TX_RING_SIZE; i++) {
1206 hmp->tx_skbuff[i] = NULL;
1207 hmp->tx_ring[i].status_n_length = 0;
1208 }
1209 /* Mark the last entry of the ring */
1210 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1211 }
1212
1213
hamachi_start_xmit(struct sk_buff * skb,struct net_device * dev)1214 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1215 struct net_device *dev)
1216 {
1217 struct hamachi_private *hmp = netdev_priv(dev);
1218 unsigned entry;
1219 u16 status;
1220
1221 /* Ok, now make sure that the queue has space before trying to
1222 add another skbuff. if we return non-zero the scheduler
1223 should interpret this as a queue full and requeue the buffer
1224 for later.
1225 */
1226 if (hmp->tx_full) {
1227 /* We should NEVER reach this point -KDU */
1228 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1229
1230 /* Wake the potentially-idle transmit channel. */
1231 /* If we don't need to read status, DON'T -KDU */
1232 status=readw(hmp->base + TxStatus);
1233 if( !(status & 0x0001) || (status & 0x0002))
1234 writew(0x0001, hmp->base + TxCmd);
1235 return NETDEV_TX_BUSY;
1236 }
1237
1238 /* Caution: the write order is important here, set the field
1239 with the "ownership" bits last. */
1240
1241 /* Calculate the next Tx descriptor entry. */
1242 entry = hmp->cur_tx % TX_RING_SIZE;
1243
1244 hmp->tx_skbuff[entry] = skb;
1245
1246 hmp->tx_ring[entry].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1247 skb->data,
1248 skb->len,
1249 DMA_TO_DEVICE));
1250
1251 /* Hmmmm, could probably put a DescIntr on these, but the way
1252 the driver is currently coded makes Tx interrupts unnecessary
1253 since the clearing of the Tx ring is handled by the start_xmit
1254 routine. This organization helps mitigate the interrupts a
1255 bit and probably renders the max_tx_latency param useless.
1256
1257 Update: Putting a DescIntr bit on all of the descriptors and
1258 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1259 */
1260 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1261 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1262 DescEndPacket | DescEndRing | DescIntr | skb->len);
1263 else
1264 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1265 DescEndPacket | DescIntr | skb->len);
1266 hmp->cur_tx++;
1267
1268 /* Non-x86 Todo: explicitly flush cache lines here. */
1269
1270 /* Wake the potentially-idle transmit channel. */
1271 /* If we don't need to read status, DON'T -KDU */
1272 status=readw(hmp->base + TxStatus);
1273 if( !(status & 0x0001) || (status & 0x0002))
1274 writew(0x0001, hmp->base + TxCmd);
1275
1276 /* Immediately before returning, let's clear as many entries as we can. */
1277 hamachi_tx(dev);
1278
1279 /* We should kick the bottom half here, since we are not accepting
1280 * interrupts with every packet. i.e. realize that Gigabit ethernet
1281 * can transmit faster than ordinary machines can load packets;
1282 * hence, any packet that got put off because we were in the transmit
1283 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1284 */
1285 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1286 netif_wake_queue(dev); /* Typical path */
1287 else {
1288 hmp->tx_full = 1;
1289 netif_stop_queue(dev);
1290 }
1291
1292 if (hamachi_debug > 4) {
1293 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1294 dev->name, hmp->cur_tx, entry);
1295 }
1296 return NETDEV_TX_OK;
1297 }
1298
1299 /* The interrupt handler does all of the Rx thread work and cleans up
1300 after the Tx thread. */
hamachi_interrupt(int irq,void * dev_instance)1301 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1302 {
1303 struct net_device *dev = dev_instance;
1304 struct hamachi_private *hmp = netdev_priv(dev);
1305 void __iomem *ioaddr = hmp->base;
1306 long boguscnt = max_interrupt_work;
1307 int handled = 0;
1308
1309 #ifndef final_version /* Can never occur. */
1310 if (dev == NULL) {
1311 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1312 return IRQ_NONE;
1313 }
1314 #endif
1315
1316 spin_lock(&hmp->lock);
1317
1318 do {
1319 u32 intr_status = readl(ioaddr + InterruptClear);
1320
1321 if (hamachi_debug > 4)
1322 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1323 dev->name, intr_status);
1324
1325 if (intr_status == 0)
1326 break;
1327
1328 handled = 1;
1329
1330 if (intr_status & IntrRxDone)
1331 hamachi_rx(dev);
1332
1333 if (intr_status & IntrTxDone){
1334 /* This code should RARELY need to execute. After all, this is
1335 * a gigabit link, it should consume packets as fast as we put
1336 * them in AND we clear the Tx ring in hamachi_start_xmit().
1337 */
1338 if (hmp->tx_full){
1339 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1340 int entry = hmp->dirty_tx % TX_RING_SIZE;
1341 struct sk_buff *skb;
1342
1343 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1344 break;
1345 skb = hmp->tx_skbuff[entry];
1346 /* Free the original skb. */
1347 if (skb){
1348 dma_unmap_single(&hmp->pci_dev->dev,
1349 leXX_to_cpu(hmp->tx_ring[entry].addr),
1350 skb->len,
1351 DMA_TO_DEVICE);
1352 dev_consume_skb_irq(skb);
1353 hmp->tx_skbuff[entry] = NULL;
1354 }
1355 hmp->tx_ring[entry].status_n_length = 0;
1356 if (entry >= TX_RING_SIZE-1)
1357 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1358 cpu_to_le32(DescEndRing);
1359 dev->stats.tx_packets++;
1360 }
1361 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1362 /* The ring is no longer full */
1363 hmp->tx_full = 0;
1364 netif_wake_queue(dev);
1365 }
1366 } else {
1367 netif_wake_queue(dev);
1368 }
1369 }
1370
1371
1372 /* Abnormal error summary/uncommon events handlers. */
1373 if (intr_status &
1374 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1375 LinkChange | NegotiationChange | StatsMax))
1376 hamachi_error(dev, intr_status);
1377
1378 if (--boguscnt < 0) {
1379 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1380 dev->name, intr_status);
1381 break;
1382 }
1383 } while (1);
1384
1385 if (hamachi_debug > 3)
1386 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1387 dev->name, readl(ioaddr + IntrStatus));
1388
1389 #ifndef final_version
1390 /* Code that should never be run! Perhaps remove after testing.. */
1391 {
1392 static int stopit = 10;
1393 if (dev->start == 0 && --stopit < 0) {
1394 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1395 dev->name);
1396 free_irq(irq, dev);
1397 }
1398 }
1399 #endif
1400
1401 spin_unlock(&hmp->lock);
1402 return IRQ_RETVAL(handled);
1403 }
1404
1405 /* This routine is logically part of the interrupt handler, but separated
1406 for clarity and better register allocation. */
hamachi_rx(struct net_device * dev)1407 static int hamachi_rx(struct net_device *dev)
1408 {
1409 struct hamachi_private *hmp = netdev_priv(dev);
1410 int entry = hmp->cur_rx % RX_RING_SIZE;
1411 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1412
1413 if (hamachi_debug > 4) {
1414 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1415 entry, hmp->rx_ring[entry].status_n_length);
1416 }
1417
1418 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1419 while (1) {
1420 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1421 u32 desc_status = le32_to_cpu(desc->status_n_length);
1422 u16 data_size = desc_status; /* Implicit truncate */
1423 u8 *buf_addr;
1424 s32 frame_status;
1425
1426 if (desc_status & DescOwn)
1427 break;
1428 dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1429 leXX_to_cpu(desc->addr),
1430 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1431 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1432 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1433 if (hamachi_debug > 4)
1434 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1435 frame_status);
1436 if (--boguscnt < 0)
1437 break;
1438 if ( ! (desc_status & DescEndPacket)) {
1439 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1440 "multiple buffers, entry %#x length %d status %4.4x!\n",
1441 dev->name, hmp->cur_rx, data_size, desc_status);
1442 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1443 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1444 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1445 dev->name,
1446 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1447 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1448 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1449 dev->stats.rx_length_errors++;
1450 } /* else Omit for prototype errata??? */
1451 if (frame_status & 0x00380000) {
1452 /* There was an error. */
1453 if (hamachi_debug > 2)
1454 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1455 frame_status);
1456 dev->stats.rx_errors++;
1457 if (frame_status & 0x00600000)
1458 dev->stats.rx_length_errors++;
1459 if (frame_status & 0x00080000)
1460 dev->stats.rx_frame_errors++;
1461 if (frame_status & 0x00100000)
1462 dev->stats.rx_crc_errors++;
1463 if (frame_status < 0)
1464 dev->stats.rx_dropped++;
1465 } else {
1466 struct sk_buff *skb;
1467 /* Omit CRC */
1468 u16 pkt_len = (frame_status & 0x07ff) - 4;
1469 #ifdef RX_CHECKSUM
1470 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1471 #endif
1472
1473
1474 #ifndef final_version
1475 if (hamachi_debug > 4)
1476 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1477 " of %d, bogus_cnt %d.\n",
1478 pkt_len, data_size, boguscnt);
1479 if (hamachi_debug > 5)
1480 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1481 dev->name,
1482 *(s32*)&(buf_addr[data_size - 20]),
1483 *(s32*)&(buf_addr[data_size - 16]),
1484 *(s32*)&(buf_addr[data_size - 12]),
1485 *(s32*)&(buf_addr[data_size - 8]),
1486 *(s32*)&(buf_addr[data_size - 4]));
1487 #endif
1488 /* Check if the packet is long enough to accept without copying
1489 to a minimally-sized skbuff. */
1490 if (pkt_len < rx_copybreak &&
1491 (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
1492 #ifdef RX_CHECKSUM
1493 printk(KERN_ERR "%s: rx_copybreak non-zero "
1494 "not good with RX_CHECKSUM\n", dev->name);
1495 #endif
1496 skb_reserve(skb, 2); /* 16 byte align the IP header */
1497 dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1498 leXX_to_cpu(hmp->rx_ring[entry].addr),
1499 hmp->rx_buf_sz,
1500 DMA_FROM_DEVICE);
1501 /* Call copy + cksum if available. */
1502 #if 1 || USE_IP_COPYSUM
1503 skb_copy_to_linear_data(skb,
1504 hmp->rx_skbuff[entry]->data, pkt_len);
1505 skb_put(skb, pkt_len);
1506 #else
1507 skb_put_data(skb, hmp->rx_ring_dma
1508 + entry*sizeof(*desc), pkt_len);
1509 #endif
1510 dma_sync_single_for_device(&hmp->pci_dev->dev,
1511 leXX_to_cpu(hmp->rx_ring[entry].addr),
1512 hmp->rx_buf_sz,
1513 DMA_FROM_DEVICE);
1514 } else {
1515 dma_unmap_single(&hmp->pci_dev->dev,
1516 leXX_to_cpu(hmp->rx_ring[entry].addr),
1517 hmp->rx_buf_sz,
1518 DMA_FROM_DEVICE);
1519 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1520 hmp->rx_skbuff[entry] = NULL;
1521 }
1522 skb->protocol = eth_type_trans(skb, dev);
1523
1524
1525 #ifdef RX_CHECKSUM
1526 /* TCP or UDP on ipv4, DIX encoding */
1527 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1528 struct iphdr *ih = (struct iphdr *) skb->data;
1529 /* Check that IP packet is at least 46 bytes, otherwise,
1530 * there may be pad bytes included in the hardware checksum.
1531 * This wouldn't happen if everyone padded with 0.
1532 */
1533 if (ntohs(ih->tot_len) >= 46){
1534 /* don't worry about frags */
1535 if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1536 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1537 u32 *p = (u32 *) &buf_addr[data_size - 20];
1538 register u32 crc, p_r, p_r1;
1539
1540 if (inv & 4) {
1541 inv &= ~4;
1542 --p;
1543 }
1544 p_r = *p;
1545 p_r1 = *(p-1);
1546 switch (inv) {
1547 case 0:
1548 crc = (p_r & 0xffff) + (p_r >> 16);
1549 break;
1550 case 1:
1551 crc = (p_r >> 16) + (p_r & 0xffff)
1552 + (p_r1 >> 16 & 0xff00);
1553 break;
1554 case 2:
1555 crc = p_r + (p_r1 >> 16);
1556 break;
1557 case 3:
1558 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1559 break;
1560 default: /*NOTREACHED*/ crc = 0;
1561 }
1562 if (crc & 0xffff0000) {
1563 crc &= 0xffff;
1564 ++crc;
1565 }
1566 /* tcp/udp will add in pseudo */
1567 skb->csum = ntohs(pfck & 0xffff);
1568 if (skb->csum > crc)
1569 skb->csum -= crc;
1570 else
1571 skb->csum += (~crc & 0xffff);
1572 /*
1573 * could do the pseudo myself and return
1574 * CHECKSUM_UNNECESSARY
1575 */
1576 skb->ip_summed = CHECKSUM_COMPLETE;
1577 }
1578 }
1579 }
1580 #endif /* RX_CHECKSUM */
1581
1582 netif_rx(skb);
1583 dev->stats.rx_packets++;
1584 }
1585 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1586 }
1587
1588 /* Refill the Rx ring buffers. */
1589 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1590 struct hamachi_desc *desc;
1591
1592 entry = hmp->dirty_rx % RX_RING_SIZE;
1593 desc = &(hmp->rx_ring[entry]);
1594 if (hmp->rx_skbuff[entry] == NULL) {
1595 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1596
1597 hmp->rx_skbuff[entry] = skb;
1598 if (skb == NULL)
1599 break; /* Better luck next round. */
1600 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1601 desc->addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1602 skb->data,
1603 hmp->rx_buf_sz,
1604 DMA_FROM_DEVICE));
1605 }
1606 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1607 if (entry >= RX_RING_SIZE-1)
1608 desc->status_n_length |= cpu_to_le32(DescOwn |
1609 DescEndPacket | DescEndRing | DescIntr);
1610 else
1611 desc->status_n_length |= cpu_to_le32(DescOwn |
1612 DescEndPacket | DescIntr);
1613 }
1614
1615 /* Restart Rx engine if stopped. */
1616 /* If we don't need to check status, don't. -KDU */
1617 if (readw(hmp->base + RxStatus) & 0x0002)
1618 writew(0x0001, hmp->base + RxCmd);
1619
1620 return 0;
1621 }
1622
1623 /* This is more properly named "uncommon interrupt events", as it covers more
1624 than just errors. */
hamachi_error(struct net_device * dev,int intr_status)1625 static void hamachi_error(struct net_device *dev, int intr_status)
1626 {
1627 struct hamachi_private *hmp = netdev_priv(dev);
1628 void __iomem *ioaddr = hmp->base;
1629
1630 if (intr_status & (LinkChange|NegotiationChange)) {
1631 if (hamachi_debug > 1)
1632 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1633 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1634 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1635 readw(ioaddr + ANLinkPartnerAbility),
1636 readl(ioaddr + IntrStatus));
1637 if (readw(ioaddr + ANStatus) & 0x20)
1638 writeb(0x01, ioaddr + LEDCtrl);
1639 else
1640 writeb(0x03, ioaddr + LEDCtrl);
1641 }
1642 if (intr_status & StatsMax) {
1643 hamachi_get_stats(dev);
1644 /* Read the overflow bits to clear. */
1645 readl(ioaddr + 0x370);
1646 readl(ioaddr + 0x3F0);
1647 }
1648 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1649 hamachi_debug)
1650 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1651 dev->name, intr_status);
1652 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1653 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1654 dev->stats.tx_fifo_errors++;
1655 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1656 dev->stats.rx_fifo_errors++;
1657 }
1658
hamachi_close(struct net_device * dev)1659 static int hamachi_close(struct net_device *dev)
1660 {
1661 struct hamachi_private *hmp = netdev_priv(dev);
1662 void __iomem *ioaddr = hmp->base;
1663 struct sk_buff *skb;
1664 int i;
1665
1666 netif_stop_queue(dev);
1667
1668 if (hamachi_debug > 1) {
1669 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1670 dev->name, readw(ioaddr + TxStatus),
1671 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1672 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1673 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1674 }
1675
1676 /* Disable interrupts by clearing the interrupt mask. */
1677 writel(0x0000, ioaddr + InterruptEnable);
1678
1679 /* Stop the chip's Tx and Rx processes. */
1680 writel(2, ioaddr + RxCmd);
1681 writew(2, ioaddr + TxCmd);
1682
1683 #ifdef __i386__
1684 if (hamachi_debug > 2) {
1685 printk(KERN_DEBUG " Tx ring at %8.8x:\n",
1686 (int)hmp->tx_ring_dma);
1687 for (i = 0; i < TX_RING_SIZE; i++)
1688 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1689 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1690 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1691 printk(KERN_DEBUG " Rx ring %8.8x:\n",
1692 (int)hmp->rx_ring_dma);
1693 for (i = 0; i < RX_RING_SIZE; i++) {
1694 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1695 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1696 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1697 if (hamachi_debug > 6) {
1698 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1699 u16 *addr = (u16 *)
1700 hmp->rx_skbuff[i]->data;
1701 int j;
1702 printk(KERN_DEBUG "Addr: ");
1703 for (j = 0; j < 0x50; j++)
1704 printk(" %4.4x", addr[j]);
1705 printk("\n");
1706 }
1707 }
1708 }
1709 }
1710 #endif /* __i386__ debugging only */
1711
1712 free_irq(hmp->pci_dev->irq, dev);
1713
1714 del_timer_sync(&hmp->timer);
1715
1716 /* Free all the skbuffs in the Rx queue. */
1717 for (i = 0; i < RX_RING_SIZE; i++) {
1718 skb = hmp->rx_skbuff[i];
1719 hmp->rx_ring[i].status_n_length = 0;
1720 if (skb) {
1721 dma_unmap_single(&hmp->pci_dev->dev,
1722 leXX_to_cpu(hmp->rx_ring[i].addr),
1723 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1724 dev_kfree_skb(skb);
1725 hmp->rx_skbuff[i] = NULL;
1726 }
1727 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1728 }
1729 for (i = 0; i < TX_RING_SIZE; i++) {
1730 skb = hmp->tx_skbuff[i];
1731 if (skb) {
1732 dma_unmap_single(&hmp->pci_dev->dev,
1733 leXX_to_cpu(hmp->tx_ring[i].addr),
1734 skb->len, DMA_TO_DEVICE);
1735 dev_kfree_skb(skb);
1736 hmp->tx_skbuff[i] = NULL;
1737 }
1738 }
1739
1740 writeb(0x00, ioaddr + LEDCtrl);
1741
1742 return 0;
1743 }
1744
hamachi_get_stats(struct net_device * dev)1745 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1746 {
1747 struct hamachi_private *hmp = netdev_priv(dev);
1748 void __iomem *ioaddr = hmp->base;
1749
1750 /* We should lock this segment of code for SMP eventually, although
1751 the vulnerability window is very small and statistics are
1752 non-critical. */
1753 /* Ok, what goes here? This appears to be stuck at 21 packets
1754 according to ifconfig. It does get incremented in hamachi_tx(),
1755 so I think I'll comment it out here and see if better things
1756 happen.
1757 */
1758 /* dev->stats.tx_packets = readl(ioaddr + 0x000); */
1759
1760 /* Total Uni+Brd+Multi */
1761 dev->stats.rx_bytes = readl(ioaddr + 0x330);
1762 /* Total Uni+Brd+Multi */
1763 dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
1764 /* Multicast Rx */
1765 dev->stats.multicast = readl(ioaddr + 0x320);
1766
1767 /* Over+Undersized */
1768 dev->stats.rx_length_errors = readl(ioaddr + 0x368);
1769 /* Jabber */
1770 dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
1771 /* Jabber */
1772 dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
1773 /* Symbol Errs */
1774 dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
1775 /* Dropped */
1776 dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1777
1778 return &dev->stats;
1779 }
1780
set_rx_mode(struct net_device * dev)1781 static void set_rx_mode(struct net_device *dev)
1782 {
1783 struct hamachi_private *hmp = netdev_priv(dev);
1784 void __iomem *ioaddr = hmp->base;
1785
1786 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1787 writew(0x000F, ioaddr + AddrMode);
1788 } else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) {
1789 /* Too many to match, or accept all multicasts. */
1790 writew(0x000B, ioaddr + AddrMode);
1791 } else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */
1792 struct netdev_hw_addr *ha;
1793 int i = 0;
1794
1795 netdev_for_each_mc_addr(ha, dev) {
1796 writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
1797 writel(0x20000 | (*(u16 *)&ha->addr[4]),
1798 ioaddr + 0x104 + i*8);
1799 i++;
1800 }
1801 /* Clear remaining entries. */
1802 for (; i < 64; i++)
1803 writel(0, ioaddr + 0x104 + i*8);
1804 writew(0x0003, ioaddr + AddrMode);
1805 } else { /* Normal, unicast/broadcast-only mode. */
1806 writew(0x0001, ioaddr + AddrMode);
1807 }
1808 }
1809
check_if_running(struct net_device * dev)1810 static int check_if_running(struct net_device *dev)
1811 {
1812 if (!netif_running(dev))
1813 return -EINVAL;
1814 return 0;
1815 }
1816
hamachi_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1817 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1818 {
1819 struct hamachi_private *np = netdev_priv(dev);
1820
1821 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1822 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1823 strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info));
1824 }
1825
hamachi_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)1826 static int hamachi_get_link_ksettings(struct net_device *dev,
1827 struct ethtool_link_ksettings *cmd)
1828 {
1829 struct hamachi_private *np = netdev_priv(dev);
1830 spin_lock_irq(&np->lock);
1831 mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1832 spin_unlock_irq(&np->lock);
1833 return 0;
1834 }
1835
hamachi_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)1836 static int hamachi_set_link_ksettings(struct net_device *dev,
1837 const struct ethtool_link_ksettings *cmd)
1838 {
1839 struct hamachi_private *np = netdev_priv(dev);
1840 int res;
1841 spin_lock_irq(&np->lock);
1842 res = mii_ethtool_set_link_ksettings(&np->mii_if, cmd);
1843 spin_unlock_irq(&np->lock);
1844 return res;
1845 }
1846
hamachi_nway_reset(struct net_device * dev)1847 static int hamachi_nway_reset(struct net_device *dev)
1848 {
1849 struct hamachi_private *np = netdev_priv(dev);
1850 return mii_nway_restart(&np->mii_if);
1851 }
1852
hamachi_get_link(struct net_device * dev)1853 static u32 hamachi_get_link(struct net_device *dev)
1854 {
1855 struct hamachi_private *np = netdev_priv(dev);
1856 return mii_link_ok(&np->mii_if);
1857 }
1858
1859 static const struct ethtool_ops ethtool_ops = {
1860 .begin = check_if_running,
1861 .get_drvinfo = hamachi_get_drvinfo,
1862 .nway_reset = hamachi_nway_reset,
1863 .get_link = hamachi_get_link,
1864 .get_link_ksettings = hamachi_get_link_ksettings,
1865 .set_link_ksettings = hamachi_set_link_ksettings,
1866 };
1867
1868 static const struct ethtool_ops ethtool_ops_no_mii = {
1869 .begin = check_if_running,
1870 .get_drvinfo = hamachi_get_drvinfo,
1871 };
1872
1873 /* private ioctl: set rx,tx intr params */
hamachi_siocdevprivate(struct net_device * dev,struct ifreq * rq,void __user * data,int cmd)1874 static int hamachi_siocdevprivate(struct net_device *dev, struct ifreq *rq,
1875 void __user *data, int cmd)
1876 {
1877 struct hamachi_private *np = netdev_priv(dev);
1878 u32 *d = (u32 *)&rq->ifr_ifru;
1879
1880 if (!netif_running(dev))
1881 return -EINVAL;
1882
1883 if (cmd != SIOCDEVPRIVATE + 3)
1884 return -EOPNOTSUPP;
1885
1886 /* Should add this check here or an ordinary user can do nasty
1887 * things. -KDU
1888 *
1889 * TODO: Shut down the Rx and Tx engines while doing this.
1890 */
1891 if (!capable(CAP_NET_ADMIN))
1892 return -EPERM;
1893 writel(d[0], np->base + TxIntrCtrl);
1894 writel(d[1], np->base + RxIntrCtrl);
1895 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1896 (u32)readl(np->base + TxIntrCtrl),
1897 (u32)readl(np->base + RxIntrCtrl));
1898
1899 return 0;
1900 }
1901
hamachi_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1902 static int hamachi_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1903 {
1904 struct hamachi_private *np = netdev_priv(dev);
1905 struct mii_ioctl_data *data = if_mii(rq);
1906 int rc;
1907
1908 if (!netif_running(dev))
1909 return -EINVAL;
1910
1911 spin_lock_irq(&np->lock);
1912 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1913 spin_unlock_irq(&np->lock);
1914
1915 return rc;
1916 }
1917
1918
hamachi_remove_one(struct pci_dev * pdev)1919 static void hamachi_remove_one(struct pci_dev *pdev)
1920 {
1921 struct net_device *dev = pci_get_drvdata(pdev);
1922
1923 if (dev) {
1924 struct hamachi_private *hmp = netdev_priv(dev);
1925
1926 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
1927 hmp->rx_ring_dma);
1928 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
1929 hmp->tx_ring_dma);
1930 unregister_netdev(dev);
1931 iounmap(hmp->base);
1932 free_netdev(dev);
1933 pci_release_regions(pdev);
1934 }
1935 }
1936
1937 static const struct pci_device_id hamachi_pci_tbl[] = {
1938 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1939 { 0, }
1940 };
1941 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1942
1943 static struct pci_driver hamachi_driver = {
1944 .name = DRV_NAME,
1945 .id_table = hamachi_pci_tbl,
1946 .probe = hamachi_init_one,
1947 .remove = hamachi_remove_one,
1948 };
1949
hamachi_init(void)1950 static int __init hamachi_init (void)
1951 {
1952 /* when a module, this is printed whether or not devices are found in probe */
1953 #ifdef MODULE
1954 printk(version);
1955 #endif
1956 return pci_register_driver(&hamachi_driver);
1957 }
1958
hamachi_exit(void)1959 static void __exit hamachi_exit (void)
1960 {
1961 pci_unregister_driver(&hamachi_driver);
1962 }
1963
1964
1965 module_init(hamachi_init);
1966 module_exit(hamachi_exit);
1967