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1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
31 #include <linux/mmu_notifier.h>
32 
33 #include <drm/drm_aperture.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_gem_ttm_helper.h>
36 #include <drm/drm_ioctl.h>
37 #include <drm/drm_vblank.h>
38 
39 #include <core/gpuobj.h>
40 #include <core/option.h>
41 #include <core/pci.h>
42 #include <core/tegra.h>
43 
44 #include <nvif/driver.h>
45 #include <nvif/fifo.h>
46 #include <nvif/push006c.h>
47 #include <nvif/user.h>
48 
49 #include <nvif/class.h>
50 #include <nvif/cl0002.h>
51 #include <nvif/cla06f.h>
52 
53 #include "nouveau_drv.h"
54 #include "nouveau_dma.h"
55 #include "nouveau_ttm.h"
56 #include "nouveau_gem.h"
57 #include "nouveau_vga.h"
58 #include "nouveau_led.h"
59 #include "nouveau_hwmon.h"
60 #include "nouveau_acpi.h"
61 #include "nouveau_bios.h"
62 #include "nouveau_ioctl.h"
63 #include "nouveau_abi16.h"
64 #include "nouveau_fbcon.h"
65 #include "nouveau_fence.h"
66 #include "nouveau_debugfs.h"
67 #include "nouveau_usif.h"
68 #include "nouveau_connector.h"
69 #include "nouveau_platform.h"
70 #include "nouveau_svm.h"
71 #include "nouveau_dmem.h"
72 
73 MODULE_PARM_DESC(config, "option string to pass to driver core");
74 static char *nouveau_config;
75 module_param_named(config, nouveau_config, charp, 0400);
76 
77 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
78 static char *nouveau_debug;
79 module_param_named(debug, nouveau_debug, charp, 0400);
80 
81 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
82 static int nouveau_noaccel = 0;
83 module_param_named(noaccel, nouveau_noaccel, int, 0400);
84 
85 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
86 		          "0 = disabled, 1 = enabled, 2 = headless)");
87 int nouveau_modeset = -1;
88 module_param_named(modeset, nouveau_modeset, int, 0400);
89 
90 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
91 static int nouveau_atomic = 0;
92 module_param_named(atomic, nouveau_atomic, int, 0400);
93 
94 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
95 static int nouveau_runtime_pm = -1;
96 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
97 
98 static struct drm_driver driver_stub;
99 static struct drm_driver driver_pci;
100 static struct drm_driver driver_platform;
101 
102 static u64
nouveau_pci_name(struct pci_dev * pdev)103 nouveau_pci_name(struct pci_dev *pdev)
104 {
105 	u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
106 	name |= pdev->bus->number << 16;
107 	name |= PCI_SLOT(pdev->devfn) << 8;
108 	return name | PCI_FUNC(pdev->devfn);
109 }
110 
111 static u64
nouveau_platform_name(struct platform_device * platformdev)112 nouveau_platform_name(struct platform_device *platformdev)
113 {
114 	return platformdev->id;
115 }
116 
117 static u64
nouveau_name(struct drm_device * dev)118 nouveau_name(struct drm_device *dev)
119 {
120 	if (dev_is_pci(dev->dev))
121 		return nouveau_pci_name(to_pci_dev(dev->dev));
122 	else
123 		return nouveau_platform_name(to_platform_device(dev->dev));
124 }
125 
126 static inline bool
nouveau_cli_work_ready(struct dma_fence * fence)127 nouveau_cli_work_ready(struct dma_fence *fence)
128 {
129 	bool ret = true;
130 
131 	spin_lock_irq(fence->lock);
132 	if (!dma_fence_is_signaled_locked(fence))
133 		ret = false;
134 	spin_unlock_irq(fence->lock);
135 
136 	if (ret == true)
137 		dma_fence_put(fence);
138 	return ret;
139 }
140 
141 static void
nouveau_cli_work(struct work_struct * w)142 nouveau_cli_work(struct work_struct *w)
143 {
144 	struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
145 	struct nouveau_cli_work *work, *wtmp;
146 	mutex_lock(&cli->lock);
147 	list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
148 		if (!work->fence || nouveau_cli_work_ready(work->fence)) {
149 			list_del(&work->head);
150 			work->func(work);
151 		}
152 	}
153 	mutex_unlock(&cli->lock);
154 }
155 
156 static void
nouveau_cli_work_fence(struct dma_fence * fence,struct dma_fence_cb * cb)157 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
158 {
159 	struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
160 	schedule_work(&work->cli->work);
161 }
162 
163 void
nouveau_cli_work_queue(struct nouveau_cli * cli,struct dma_fence * fence,struct nouveau_cli_work * work)164 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
165 		       struct nouveau_cli_work *work)
166 {
167 	work->fence = dma_fence_get(fence);
168 	work->cli = cli;
169 	mutex_lock(&cli->lock);
170 	list_add_tail(&work->head, &cli->worker);
171 	if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
172 		nouveau_cli_work_fence(fence, &work->cb);
173 	mutex_unlock(&cli->lock);
174 }
175 
176 static void
nouveau_cli_fini(struct nouveau_cli * cli)177 nouveau_cli_fini(struct nouveau_cli *cli)
178 {
179 	/* All our channels are dead now, which means all the fences they
180 	 * own are signalled, and all callback functions have been called.
181 	 *
182 	 * So, after flushing the workqueue, there should be nothing left.
183 	 */
184 	flush_work(&cli->work);
185 	WARN_ON(!list_empty(&cli->worker));
186 
187 	usif_client_fini(cli);
188 	nouveau_vmm_fini(&cli->svm);
189 	nouveau_vmm_fini(&cli->vmm);
190 	nvif_mmu_dtor(&cli->mmu);
191 	nvif_device_dtor(&cli->device);
192 	mutex_lock(&cli->drm->master.lock);
193 	nvif_client_dtor(&cli->base);
194 	mutex_unlock(&cli->drm->master.lock);
195 }
196 
197 static int
nouveau_cli_init(struct nouveau_drm * drm,const char * sname,struct nouveau_cli * cli)198 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
199 		 struct nouveau_cli *cli)
200 {
201 	static const struct nvif_mclass
202 	mems[] = {
203 		{ NVIF_CLASS_MEM_GF100, -1 },
204 		{ NVIF_CLASS_MEM_NV50 , -1 },
205 		{ NVIF_CLASS_MEM_NV04 , -1 },
206 		{}
207 	};
208 	static const struct nvif_mclass
209 	mmus[] = {
210 		{ NVIF_CLASS_MMU_GF100, -1 },
211 		{ NVIF_CLASS_MMU_NV50 , -1 },
212 		{ NVIF_CLASS_MMU_NV04 , -1 },
213 		{}
214 	};
215 	static const struct nvif_mclass
216 	vmms[] = {
217 		{ NVIF_CLASS_VMM_GP100, -1 },
218 		{ NVIF_CLASS_VMM_GM200, -1 },
219 		{ NVIF_CLASS_VMM_GF100, -1 },
220 		{ NVIF_CLASS_VMM_NV50 , -1 },
221 		{ NVIF_CLASS_VMM_NV04 , -1 },
222 		{}
223 	};
224 	u64 device = nouveau_name(drm->dev);
225 	int ret;
226 
227 	snprintf(cli->name, sizeof(cli->name), "%s", sname);
228 	cli->drm = drm;
229 	mutex_init(&cli->mutex);
230 	usif_client_init(cli);
231 
232 	INIT_WORK(&cli->work, nouveau_cli_work);
233 	INIT_LIST_HEAD(&cli->worker);
234 	mutex_init(&cli->lock);
235 
236 	if (cli == &drm->master) {
237 		ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
238 				       cli->name, device, &cli->base);
239 	} else {
240 		mutex_lock(&drm->master.lock);
241 		ret = nvif_client_ctor(&drm->master.base, cli->name, device,
242 				       &cli->base);
243 		mutex_unlock(&drm->master.lock);
244 	}
245 	if (ret) {
246 		NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
247 		goto done;
248 	}
249 
250 	ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
251 			       &(struct nv_device_v0) {
252 					.device = ~0,
253 					.priv = true,
254 			       }, sizeof(struct nv_device_v0),
255 			       &cli->device);
256 	if (ret) {
257 		NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
258 		goto done;
259 	}
260 
261 	ret = nvif_mclass(&cli->device.object, mmus);
262 	if (ret < 0) {
263 		NV_PRINTK(err, cli, "No supported MMU class\n");
264 		goto done;
265 	}
266 
267 	ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
268 			    &cli->mmu);
269 	if (ret) {
270 		NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
271 		goto done;
272 	}
273 
274 	ret = nvif_mclass(&cli->mmu.object, vmms);
275 	if (ret < 0) {
276 		NV_PRINTK(err, cli, "No supported VMM class\n");
277 		goto done;
278 	}
279 
280 	ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
281 	if (ret) {
282 		NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
283 		goto done;
284 	}
285 
286 	ret = nvif_mclass(&cli->mmu.object, mems);
287 	if (ret < 0) {
288 		NV_PRINTK(err, cli, "No supported MEM class\n");
289 		goto done;
290 	}
291 
292 	cli->mem = &mems[ret];
293 	return 0;
294 done:
295 	if (ret)
296 		nouveau_cli_fini(cli);
297 	return ret;
298 }
299 
300 static void
nouveau_accel_ce_fini(struct nouveau_drm * drm)301 nouveau_accel_ce_fini(struct nouveau_drm *drm)
302 {
303 	nouveau_channel_idle(drm->cechan);
304 	nvif_object_dtor(&drm->ttm.copy);
305 	nouveau_channel_del(&drm->cechan);
306 }
307 
308 static void
nouveau_accel_ce_init(struct nouveau_drm * drm)309 nouveau_accel_ce_init(struct nouveau_drm *drm)
310 {
311 	struct nvif_device *device = &drm->client.device;
312 	int ret = 0;
313 
314 	/* Allocate channel that has access to a (preferably async) copy
315 	 * engine, to use for TTM buffer moves.
316 	 */
317 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
318 		ret = nouveau_channel_new(drm, device,
319 					  nvif_fifo_runlist_ce(device), 0,
320 					  true, &drm->cechan);
321 	} else
322 	if (device->info.chipset >= 0xa3 &&
323 	    device->info.chipset != 0xaa &&
324 	    device->info.chipset != 0xac) {
325 		/* Prior to Kepler, there's only a single runlist, so all
326 		 * engines can be accessed from any channel.
327 		 *
328 		 * We still want to use a separate channel though.
329 		 */
330 		ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
331 					  &drm->cechan);
332 	}
333 
334 	if (ret)
335 		NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
336 }
337 
338 static void
nouveau_accel_gr_fini(struct nouveau_drm * drm)339 nouveau_accel_gr_fini(struct nouveau_drm *drm)
340 {
341 	nouveau_channel_idle(drm->channel);
342 	nvif_object_dtor(&drm->ntfy);
343 	nvkm_gpuobj_del(&drm->notify);
344 	nouveau_channel_del(&drm->channel);
345 }
346 
347 static void
nouveau_accel_gr_init(struct nouveau_drm * drm)348 nouveau_accel_gr_init(struct nouveau_drm *drm)
349 {
350 	struct nvif_device *device = &drm->client.device;
351 	u32 arg0, arg1;
352 	int ret;
353 
354 	if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)
355 		return;
356 
357 	/* Allocate channel that has access to the graphics engine. */
358 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
359 		arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
360 		arg1 = 1;
361 	} else {
362 		arg0 = NvDmaFB;
363 		arg1 = NvDmaTT;
364 	}
365 
366 	ret = nouveau_channel_new(drm, device, arg0, arg1, false,
367 				  &drm->channel);
368 	if (ret) {
369 		NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
370 		nouveau_accel_gr_fini(drm);
371 		return;
372 	}
373 
374 	/* A SW class is used on pre-NV50 HW to assist with handling the
375 	 * synchronisation of page flips, as well as to implement fences
376 	 * on TNT/TNT2 HW that lacks any kind of support in host.
377 	 */
378 	if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
379 		ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
380 				       NVDRM_NVSW, nouveau_abi16_swclass(drm),
381 				       NULL, 0, &drm->channel->nvsw);
382 		if (ret == 0) {
383 			struct nvif_push *push = drm->channel->chan.push;
384 			ret = PUSH_WAIT(push, 2);
385 			if (ret == 0)
386 				PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
387 		}
388 
389 		if (ret) {
390 			NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
391 			nouveau_accel_gr_fini(drm);
392 			return;
393 		}
394 	}
395 
396 	/* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
397 	 * even if notification is never requested, so, allocate a ctxdma on
398 	 * any GPU where it's possible we'll end up using M2MF for BO moves.
399 	 */
400 	if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
401 		ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
402 				      &drm->notify);
403 		if (ret) {
404 			NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
405 			nouveau_accel_gr_fini(drm);
406 			return;
407 		}
408 
409 		ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
410 				       NvNotify0, NV_DMA_IN_MEMORY,
411 				       &(struct nv_dma_v0) {
412 						.target = NV_DMA_V0_TARGET_VRAM,
413 						.access = NV_DMA_V0_ACCESS_RDWR,
414 						.start = drm->notify->addr,
415 						.limit = drm->notify->addr + 31
416 				       }, sizeof(struct nv_dma_v0),
417 				       &drm->ntfy);
418 		if (ret) {
419 			nouveau_accel_gr_fini(drm);
420 			return;
421 		}
422 	}
423 }
424 
425 static void
nouveau_accel_fini(struct nouveau_drm * drm)426 nouveau_accel_fini(struct nouveau_drm *drm)
427 {
428 	nouveau_accel_ce_fini(drm);
429 	nouveau_accel_gr_fini(drm);
430 	if (drm->fence)
431 		nouveau_fence(drm)->dtor(drm);
432 }
433 
434 static void
nouveau_accel_init(struct nouveau_drm * drm)435 nouveau_accel_init(struct nouveau_drm *drm)
436 {
437 	struct nvif_device *device = &drm->client.device;
438 	struct nvif_sclass *sclass;
439 	int ret, i, n;
440 
441 	if (nouveau_noaccel)
442 		return;
443 
444 	/* Initialise global support for channels, and synchronisation. */
445 	ret = nouveau_channels_init(drm);
446 	if (ret)
447 		return;
448 
449 	/*XXX: this is crap, but the fence/channel stuff is a little
450 	 *     backwards in some places.  this will be fixed.
451 	 */
452 	ret = n = nvif_object_sclass_get(&device->object, &sclass);
453 	if (ret < 0)
454 		return;
455 
456 	for (ret = -ENOSYS, i = 0; i < n; i++) {
457 		switch (sclass[i].oclass) {
458 		case NV03_CHANNEL_DMA:
459 			ret = nv04_fence_create(drm);
460 			break;
461 		case NV10_CHANNEL_DMA:
462 			ret = nv10_fence_create(drm);
463 			break;
464 		case NV17_CHANNEL_DMA:
465 		case NV40_CHANNEL_DMA:
466 			ret = nv17_fence_create(drm);
467 			break;
468 		case NV50_CHANNEL_GPFIFO:
469 			ret = nv50_fence_create(drm);
470 			break;
471 		case G82_CHANNEL_GPFIFO:
472 			ret = nv84_fence_create(drm);
473 			break;
474 		case FERMI_CHANNEL_GPFIFO:
475 		case KEPLER_CHANNEL_GPFIFO_A:
476 		case KEPLER_CHANNEL_GPFIFO_B:
477 		case MAXWELL_CHANNEL_GPFIFO_A:
478 		case PASCAL_CHANNEL_GPFIFO_A:
479 		case VOLTA_CHANNEL_GPFIFO_A:
480 		case TURING_CHANNEL_GPFIFO_A:
481 		case AMPERE_CHANNEL_GPFIFO_B:
482 			ret = nvc0_fence_create(drm);
483 			break;
484 		default:
485 			break;
486 		}
487 	}
488 
489 	nvif_object_sclass_put(&sclass);
490 	if (ret) {
491 		NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
492 		nouveau_accel_fini(drm);
493 		return;
494 	}
495 
496 	/* Volta requires access to a doorbell register for kickoff. */
497 	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
498 		ret = nvif_user_ctor(device, "drmUsermode");
499 		if (ret)
500 			return;
501 	}
502 
503 	/* Allocate channels we need to support various functions. */
504 	nouveau_accel_gr_init(drm);
505 	nouveau_accel_ce_init(drm);
506 
507 	/* Initialise accelerated TTM buffer moves. */
508 	nouveau_bo_move_init(drm);
509 }
510 
511 static void __printf(2, 3)
nouveau_drm_errorf(struct nvif_object * object,const char * fmt,...)512 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
513 {
514 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
515 	struct va_format vaf;
516 	va_list va;
517 
518 	va_start(va, fmt);
519 	vaf.fmt = fmt;
520 	vaf.va = &va;
521 	NV_ERROR(drm, "%pV", &vaf);
522 	va_end(va);
523 }
524 
525 static void __printf(2, 3)
nouveau_drm_debugf(struct nvif_object * object,const char * fmt,...)526 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
527 {
528 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
529 	struct va_format vaf;
530 	va_list va;
531 
532 	va_start(va, fmt);
533 	vaf.fmt = fmt;
534 	vaf.va = &va;
535 	NV_DEBUG(drm, "%pV", &vaf);
536 	va_end(va);
537 }
538 
539 static const struct nvif_parent_func
540 nouveau_parent = {
541 	.debugf = nouveau_drm_debugf,
542 	.errorf = nouveau_drm_errorf,
543 };
544 
545 static int
nouveau_drm_device_init(struct drm_device * dev)546 nouveau_drm_device_init(struct drm_device *dev)
547 {
548 	struct nouveau_drm *drm;
549 	int ret;
550 
551 	if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
552 		return -ENOMEM;
553 	dev->dev_private = drm;
554 	drm->dev = dev;
555 
556 	nvif_parent_ctor(&nouveau_parent, &drm->parent);
557 	drm->master.base.object.parent = &drm->parent;
558 
559 	ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
560 	if (ret)
561 		goto fail_alloc;
562 
563 	ret = nouveau_cli_init(drm, "DRM", &drm->client);
564 	if (ret)
565 		goto fail_master;
566 
567 	nvxx_client(&drm->client.base)->debug =
568 		nvkm_dbgopt(nouveau_debug, "DRM");
569 
570 	INIT_LIST_HEAD(&drm->clients);
571 	mutex_init(&drm->clients_lock);
572 	spin_lock_init(&drm->tile.lock);
573 
574 	/* workaround an odd issue on nvc1 by disabling the device's
575 	 * nosnoop capability.  hopefully won't cause issues until a
576 	 * better fix is found - assuming there is one...
577 	 */
578 	if (drm->client.device.info.chipset == 0xc1)
579 		nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
580 
581 	nouveau_vga_init(drm);
582 
583 	ret = nouveau_ttm_init(drm);
584 	if (ret)
585 		goto fail_ttm;
586 
587 	ret = nouveau_bios_init(dev);
588 	if (ret)
589 		goto fail_bios;
590 
591 	nouveau_accel_init(drm);
592 
593 	ret = nouveau_display_create(dev);
594 	if (ret)
595 		goto fail_dispctor;
596 
597 	if (dev->mode_config.num_crtc) {
598 		ret = nouveau_display_init(dev, false, false);
599 		if (ret)
600 			goto fail_dispinit;
601 	}
602 
603 	nouveau_debugfs_init(drm);
604 	nouveau_hwmon_init(dev);
605 	nouveau_svm_init(drm);
606 	nouveau_dmem_init(drm);
607 	nouveau_fbcon_init(dev);
608 	nouveau_led_init(dev);
609 
610 	if (nouveau_pmops_runtime()) {
611 		pm_runtime_use_autosuspend(dev->dev);
612 		pm_runtime_set_autosuspend_delay(dev->dev, 5000);
613 		pm_runtime_set_active(dev->dev);
614 		pm_runtime_allow(dev->dev);
615 		pm_runtime_mark_last_busy(dev->dev);
616 		pm_runtime_put(dev->dev);
617 	}
618 
619 	return 0;
620 
621 fail_dispinit:
622 	nouveau_display_destroy(dev);
623 fail_dispctor:
624 	nouveau_accel_fini(drm);
625 	nouveau_bios_takedown(dev);
626 fail_bios:
627 	nouveau_ttm_fini(drm);
628 fail_ttm:
629 	nouveau_vga_fini(drm);
630 	nouveau_cli_fini(&drm->client);
631 fail_master:
632 	nouveau_cli_fini(&drm->master);
633 fail_alloc:
634 	nvif_parent_dtor(&drm->parent);
635 	kfree(drm);
636 	return ret;
637 }
638 
639 static void
nouveau_drm_device_fini(struct drm_device * dev)640 nouveau_drm_device_fini(struct drm_device *dev)
641 {
642 	struct nouveau_cli *cli, *temp_cli;
643 	struct nouveau_drm *drm = nouveau_drm(dev);
644 
645 	if (nouveau_pmops_runtime()) {
646 		pm_runtime_get_sync(dev->dev);
647 		pm_runtime_forbid(dev->dev);
648 	}
649 
650 	nouveau_led_fini(dev);
651 	nouveau_fbcon_fini(dev);
652 	nouveau_dmem_fini(drm);
653 	nouveau_svm_fini(drm);
654 	nouveau_hwmon_fini(dev);
655 	nouveau_debugfs_fini(drm);
656 
657 	if (dev->mode_config.num_crtc)
658 		nouveau_display_fini(dev, false, false);
659 	nouveau_display_destroy(dev);
660 
661 	nouveau_accel_fini(drm);
662 	nouveau_bios_takedown(dev);
663 
664 	nouveau_ttm_fini(drm);
665 	nouveau_vga_fini(drm);
666 
667 	/*
668 	 * There may be existing clients from as-yet unclosed files. For now,
669 	 * clean them up here rather than deferring until the file is closed,
670 	 * but this likely not correct if we want to support hot-unplugging
671 	 * properly.
672 	 */
673 	mutex_lock(&drm->clients_lock);
674 	list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
675 		list_del(&cli->head);
676 		mutex_lock(&cli->mutex);
677 		if (cli->abi16)
678 			nouveau_abi16_fini(cli->abi16);
679 		mutex_unlock(&cli->mutex);
680 		nouveau_cli_fini(cli);
681 		kfree(cli);
682 	}
683 	mutex_unlock(&drm->clients_lock);
684 
685 	nouveau_cli_fini(&drm->client);
686 	nouveau_cli_fini(&drm->master);
687 	nvif_parent_dtor(&drm->parent);
688 	mutex_destroy(&drm->clients_lock);
689 	kfree(drm);
690 }
691 
692 /*
693  * On some Intel PCIe bridge controllers doing a
694  * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
695  * Skipping the intermediate D3hot step seems to make it work again. This is
696  * probably caused by not meeting the expectation the involved AML code has
697  * when the GPU is put into D3hot state before invoking it.
698  *
699  * This leads to various manifestations of this issue:
700  *  - AML code execution to power on the GPU hits an infinite loop (as the
701  *    code waits on device memory to change).
702  *  - kernel crashes, as all PCI reads return -1, which most code isn't able
703  *    to handle well enough.
704  *
705  * In all cases dmesg will contain at least one line like this:
706  * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
707  * followed by a lot of nouveau timeouts.
708  *
709  * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
710  * documented PCI config space register 0x248 of the Intel PCIe bridge
711  * controller (0x1901) in order to change the state of the PCIe link between
712  * the PCIe port and the GPU. There are alternative code paths using other
713  * registers, which seem to work fine (executed pre Windows 8):
714  *  - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
715  *  - 0xb0 bit 0x10 (link disable)
716  * Changing the conditions inside the firmware by poking into the relevant
717  * addresses does resolve the issue, but it seemed to be ACPI private memory
718  * and not any device accessible memory at all, so there is no portable way of
719  * changing the conditions.
720  * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
721  *
722  * The only systems where this behavior can be seen are hybrid graphics laptops
723  * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
724  * this issue only occurs in combination with listed Intel PCIe bridge
725  * controllers and the mentioned GPUs or other devices as well.
726  *
727  * documentation on the PCIe bridge controller can be found in the
728  * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
729  * Section "12 PCI Express* Controller (x16) Registers"
730  */
731 
quirk_broken_nv_runpm(struct pci_dev * pdev)732 static void quirk_broken_nv_runpm(struct pci_dev *pdev)
733 {
734 	struct drm_device *dev = pci_get_drvdata(pdev);
735 	struct nouveau_drm *drm = nouveau_drm(dev);
736 	struct pci_dev *bridge = pci_upstream_bridge(pdev);
737 
738 	if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
739 		return;
740 
741 	switch (bridge->device) {
742 	case 0x1901:
743 		drm->old_pm_cap = pdev->pm_cap;
744 		pdev->pm_cap = 0;
745 		NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
746 		break;
747 	}
748 }
749 
nouveau_drm_probe(struct pci_dev * pdev,const struct pci_device_id * pent)750 static int nouveau_drm_probe(struct pci_dev *pdev,
751 			     const struct pci_device_id *pent)
752 {
753 	struct nvkm_device *device;
754 	struct drm_device *drm_dev;
755 	int ret;
756 
757 	if (vga_switcheroo_client_probe_defer(pdev))
758 		return -EPROBE_DEFER;
759 
760 	/* We need to check that the chipset is supported before booting
761 	 * fbdev off the hardware, as there's no way to put it back.
762 	 */
763 	ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
764 				  true, false, 0, &device);
765 	if (ret)
766 		return ret;
767 
768 	nvkm_device_del(&device);
769 
770 	/* Remove conflicting drivers (vesafb, efifb etc). */
771 	ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci);
772 	if (ret)
773 		return ret;
774 
775 	ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
776 				  true, true, ~0ULL, &device);
777 	if (ret)
778 		return ret;
779 
780 	pci_set_master(pdev);
781 
782 	if (nouveau_atomic)
783 		driver_pci.driver_features |= DRIVER_ATOMIC;
784 
785 	drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
786 	if (IS_ERR(drm_dev)) {
787 		ret = PTR_ERR(drm_dev);
788 		goto fail_nvkm;
789 	}
790 
791 	ret = pci_enable_device(pdev);
792 	if (ret)
793 		goto fail_drm;
794 
795 	pci_set_drvdata(pdev, drm_dev);
796 
797 	ret = nouveau_drm_device_init(drm_dev);
798 	if (ret)
799 		goto fail_pci;
800 
801 	ret = drm_dev_register(drm_dev, pent->driver_data);
802 	if (ret)
803 		goto fail_drm_dev_init;
804 
805 	quirk_broken_nv_runpm(pdev);
806 	return 0;
807 
808 fail_drm_dev_init:
809 	nouveau_drm_device_fini(drm_dev);
810 fail_pci:
811 	pci_disable_device(pdev);
812 fail_drm:
813 	drm_dev_put(drm_dev);
814 fail_nvkm:
815 	nvkm_device_del(&device);
816 	return ret;
817 }
818 
819 void
nouveau_drm_device_remove(struct drm_device * dev)820 nouveau_drm_device_remove(struct drm_device *dev)
821 {
822 	struct nouveau_drm *drm = nouveau_drm(dev);
823 	struct nvkm_client *client;
824 	struct nvkm_device *device;
825 
826 	drm_dev_unplug(dev);
827 
828 	client = nvxx_client(&drm->client.base);
829 	device = nvkm_device_find(client->device);
830 
831 	nouveau_drm_device_fini(dev);
832 	drm_dev_put(dev);
833 	nvkm_device_del(&device);
834 }
835 
836 static void
nouveau_drm_remove(struct pci_dev * pdev)837 nouveau_drm_remove(struct pci_dev *pdev)
838 {
839 	struct drm_device *dev = pci_get_drvdata(pdev);
840 	struct nouveau_drm *drm = nouveau_drm(dev);
841 
842 	/* revert our workaround */
843 	if (drm->old_pm_cap)
844 		pdev->pm_cap = drm->old_pm_cap;
845 	nouveau_drm_device_remove(dev);
846 	pci_disable_device(pdev);
847 }
848 
849 static int
nouveau_do_suspend(struct drm_device * dev,bool runtime)850 nouveau_do_suspend(struct drm_device *dev, bool runtime)
851 {
852 	struct nouveau_drm *drm = nouveau_drm(dev);
853 	struct ttm_resource_manager *man;
854 	int ret;
855 
856 	nouveau_svm_suspend(drm);
857 	nouveau_dmem_suspend(drm);
858 	nouveau_led_suspend(dev);
859 
860 	if (dev->mode_config.num_crtc) {
861 		NV_DEBUG(drm, "suspending console...\n");
862 		nouveau_fbcon_set_suspend(dev, 1);
863 		NV_DEBUG(drm, "suspending display...\n");
864 		ret = nouveau_display_suspend(dev, runtime);
865 		if (ret)
866 			return ret;
867 	}
868 
869 	NV_DEBUG(drm, "evicting buffers...\n");
870 
871 	man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
872 	ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
873 
874 	NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
875 	if (drm->cechan) {
876 		ret = nouveau_channel_idle(drm->cechan);
877 		if (ret)
878 			goto fail_display;
879 	}
880 
881 	if (drm->channel) {
882 		ret = nouveau_channel_idle(drm->channel);
883 		if (ret)
884 			goto fail_display;
885 	}
886 
887 	NV_DEBUG(drm, "suspending fence...\n");
888 	if (drm->fence && nouveau_fence(drm)->suspend) {
889 		if (!nouveau_fence(drm)->suspend(drm)) {
890 			ret = -ENOMEM;
891 			goto fail_display;
892 		}
893 	}
894 
895 	NV_DEBUG(drm, "suspending object tree...\n");
896 	ret = nvif_client_suspend(&drm->master.base);
897 	if (ret)
898 		goto fail_client;
899 
900 	return 0;
901 
902 fail_client:
903 	if (drm->fence && nouveau_fence(drm)->resume)
904 		nouveau_fence(drm)->resume(drm);
905 
906 fail_display:
907 	if (dev->mode_config.num_crtc) {
908 		NV_DEBUG(drm, "resuming display...\n");
909 		nouveau_display_resume(dev, runtime);
910 	}
911 	return ret;
912 }
913 
914 static int
nouveau_do_resume(struct drm_device * dev,bool runtime)915 nouveau_do_resume(struct drm_device *dev, bool runtime)
916 {
917 	int ret = 0;
918 	struct nouveau_drm *drm = nouveau_drm(dev);
919 
920 	NV_DEBUG(drm, "resuming object tree...\n");
921 	ret = nvif_client_resume(&drm->master.base);
922 	if (ret) {
923 		NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
924 		return ret;
925 	}
926 
927 	NV_DEBUG(drm, "resuming fence...\n");
928 	if (drm->fence && nouveau_fence(drm)->resume)
929 		nouveau_fence(drm)->resume(drm);
930 
931 	nouveau_run_vbios_init(dev);
932 
933 	if (dev->mode_config.num_crtc) {
934 		NV_DEBUG(drm, "resuming display...\n");
935 		nouveau_display_resume(dev, runtime);
936 		NV_DEBUG(drm, "resuming console...\n");
937 		nouveau_fbcon_set_suspend(dev, 0);
938 	}
939 
940 	nouveau_led_resume(dev);
941 	nouveau_dmem_resume(drm);
942 	nouveau_svm_resume(drm);
943 	return 0;
944 }
945 
946 int
nouveau_pmops_suspend(struct device * dev)947 nouveau_pmops_suspend(struct device *dev)
948 {
949 	struct pci_dev *pdev = to_pci_dev(dev);
950 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
951 	int ret;
952 
953 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
954 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
955 		return 0;
956 
957 	ret = nouveau_do_suspend(drm_dev, false);
958 	if (ret)
959 		return ret;
960 
961 	pci_save_state(pdev);
962 	pci_disable_device(pdev);
963 	pci_set_power_state(pdev, PCI_D3hot);
964 	udelay(200);
965 	return 0;
966 }
967 
968 int
nouveau_pmops_resume(struct device * dev)969 nouveau_pmops_resume(struct device *dev)
970 {
971 	struct pci_dev *pdev = to_pci_dev(dev);
972 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
973 	int ret;
974 
975 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
976 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
977 		return 0;
978 
979 	pci_set_power_state(pdev, PCI_D0);
980 	pci_restore_state(pdev);
981 	ret = pci_enable_device(pdev);
982 	if (ret)
983 		return ret;
984 	pci_set_master(pdev);
985 
986 	ret = nouveau_do_resume(drm_dev, false);
987 
988 	/* Monitors may have been connected / disconnected during suspend */
989 	nouveau_display_hpd_resume(drm_dev);
990 
991 	return ret;
992 }
993 
994 static int
nouveau_pmops_freeze(struct device * dev)995 nouveau_pmops_freeze(struct device *dev)
996 {
997 	struct pci_dev *pdev = to_pci_dev(dev);
998 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
999 	return nouveau_do_suspend(drm_dev, false);
1000 }
1001 
1002 static int
nouveau_pmops_thaw(struct device * dev)1003 nouveau_pmops_thaw(struct device *dev)
1004 {
1005 	struct pci_dev *pdev = to_pci_dev(dev);
1006 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1007 	return nouveau_do_resume(drm_dev, false);
1008 }
1009 
1010 bool
nouveau_pmops_runtime(void)1011 nouveau_pmops_runtime(void)
1012 {
1013 	if (nouveau_runtime_pm == -1)
1014 		return nouveau_is_optimus() || nouveau_is_v1_dsm();
1015 	return nouveau_runtime_pm == 1;
1016 }
1017 
1018 static int
nouveau_pmops_runtime_suspend(struct device * dev)1019 nouveau_pmops_runtime_suspend(struct device *dev)
1020 {
1021 	struct pci_dev *pdev = to_pci_dev(dev);
1022 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1023 	int ret;
1024 
1025 	if (!nouveau_pmops_runtime()) {
1026 		pm_runtime_forbid(dev);
1027 		return -EBUSY;
1028 	}
1029 
1030 	nouveau_switcheroo_optimus_dsm();
1031 	ret = nouveau_do_suspend(drm_dev, true);
1032 	pci_save_state(pdev);
1033 	pci_disable_device(pdev);
1034 	pci_ignore_hotplug(pdev);
1035 	pci_set_power_state(pdev, PCI_D3cold);
1036 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1037 	return ret;
1038 }
1039 
1040 static int
nouveau_pmops_runtime_resume(struct device * dev)1041 nouveau_pmops_runtime_resume(struct device *dev)
1042 {
1043 	struct pci_dev *pdev = to_pci_dev(dev);
1044 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1045 	struct nouveau_drm *drm = nouveau_drm(drm_dev);
1046 	struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1047 	int ret;
1048 
1049 	if (!nouveau_pmops_runtime()) {
1050 		pm_runtime_forbid(dev);
1051 		return -EBUSY;
1052 	}
1053 
1054 	pci_set_power_state(pdev, PCI_D0);
1055 	pci_restore_state(pdev);
1056 	ret = pci_enable_device(pdev);
1057 	if (ret)
1058 		return ret;
1059 	pci_set_master(pdev);
1060 
1061 	ret = nouveau_do_resume(drm_dev, true);
1062 	if (ret) {
1063 		NV_ERROR(drm, "resume failed with: %d\n", ret);
1064 		return ret;
1065 	}
1066 
1067 	/* do magic */
1068 	nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1069 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1070 
1071 	/* Monitors may have been connected / disconnected during suspend */
1072 	nouveau_display_hpd_resume(drm_dev);
1073 
1074 	return ret;
1075 }
1076 
1077 static int
nouveau_pmops_runtime_idle(struct device * dev)1078 nouveau_pmops_runtime_idle(struct device *dev)
1079 {
1080 	if (!nouveau_pmops_runtime()) {
1081 		pm_runtime_forbid(dev);
1082 		return -EBUSY;
1083 	}
1084 
1085 	pm_runtime_mark_last_busy(dev);
1086 	pm_runtime_autosuspend(dev);
1087 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1088 	return 1;
1089 }
1090 
1091 static int
nouveau_drm_open(struct drm_device * dev,struct drm_file * fpriv)1092 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1093 {
1094 	struct nouveau_drm *drm = nouveau_drm(dev);
1095 	struct nouveau_cli *cli;
1096 	char name[32], tmpname[TASK_COMM_LEN];
1097 	int ret;
1098 
1099 	/* need to bring up power immediately if opening device */
1100 	ret = pm_runtime_get_sync(dev->dev);
1101 	if (ret < 0 && ret != -EACCES) {
1102 		pm_runtime_put_autosuspend(dev->dev);
1103 		return ret;
1104 	}
1105 
1106 	get_task_comm(tmpname, current);
1107 	snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1108 
1109 	if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1110 		ret = -ENOMEM;
1111 		goto done;
1112 	}
1113 
1114 	ret = nouveau_cli_init(drm, name, cli);
1115 	if (ret)
1116 		goto done;
1117 
1118 	fpriv->driver_priv = cli;
1119 
1120 	mutex_lock(&drm->clients_lock);
1121 	list_add(&cli->head, &drm->clients);
1122 	mutex_unlock(&drm->clients_lock);
1123 
1124 done:
1125 	if (ret && cli) {
1126 		nouveau_cli_fini(cli);
1127 		kfree(cli);
1128 	}
1129 
1130 	pm_runtime_mark_last_busy(dev->dev);
1131 	pm_runtime_put_autosuspend(dev->dev);
1132 	return ret;
1133 }
1134 
1135 static void
nouveau_drm_postclose(struct drm_device * dev,struct drm_file * fpriv)1136 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1137 {
1138 	struct nouveau_cli *cli = nouveau_cli(fpriv);
1139 	struct nouveau_drm *drm = nouveau_drm(dev);
1140 	int dev_index;
1141 
1142 	/*
1143 	 * The device is gone, and as it currently stands all clients are
1144 	 * cleaned up in the removal codepath. In the future this may change
1145 	 * so that we can support hot-unplugging, but for now we immediately
1146 	 * return to avoid a double-free situation.
1147 	 */
1148 	if (!drm_dev_enter(dev, &dev_index))
1149 		return;
1150 
1151 	pm_runtime_get_sync(dev->dev);
1152 
1153 	mutex_lock(&cli->mutex);
1154 	if (cli->abi16)
1155 		nouveau_abi16_fini(cli->abi16);
1156 	mutex_unlock(&cli->mutex);
1157 
1158 	mutex_lock(&drm->clients_lock);
1159 	list_del(&cli->head);
1160 	mutex_unlock(&drm->clients_lock);
1161 
1162 	nouveau_cli_fini(cli);
1163 	kfree(cli);
1164 	pm_runtime_mark_last_busy(dev->dev);
1165 	pm_runtime_put_autosuspend(dev->dev);
1166 	drm_dev_exit(dev_index);
1167 }
1168 
1169 static const struct drm_ioctl_desc
1170 nouveau_ioctls[] = {
1171 	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1172 	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1173 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1174 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1175 	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1176 	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1177 	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1178 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1179 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1180 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1181 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1182 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1183 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1184 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1185 };
1186 
1187 long
nouveau_drm_ioctl(struct file * file,unsigned int cmd,unsigned long arg)1188 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1189 {
1190 	struct drm_file *filp = file->private_data;
1191 	struct drm_device *dev = filp->minor->dev;
1192 	long ret;
1193 
1194 	ret = pm_runtime_get_sync(dev->dev);
1195 	if (ret < 0 && ret != -EACCES) {
1196 		pm_runtime_put_autosuspend(dev->dev);
1197 		return ret;
1198 	}
1199 
1200 	switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1201 	case DRM_NOUVEAU_NVIF:
1202 		ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1203 		break;
1204 	default:
1205 		ret = drm_ioctl(file, cmd, arg);
1206 		break;
1207 	}
1208 
1209 	pm_runtime_mark_last_busy(dev->dev);
1210 	pm_runtime_put_autosuspend(dev->dev);
1211 	return ret;
1212 }
1213 
1214 static const struct file_operations
1215 nouveau_driver_fops = {
1216 	.owner = THIS_MODULE,
1217 	.open = drm_open,
1218 	.release = drm_release,
1219 	.unlocked_ioctl = nouveau_drm_ioctl,
1220 	.mmap = drm_gem_mmap,
1221 	.poll = drm_poll,
1222 	.read = drm_read,
1223 #if defined(CONFIG_COMPAT)
1224 	.compat_ioctl = nouveau_compat_ioctl,
1225 #endif
1226 	.llseek = noop_llseek,
1227 };
1228 
1229 static struct drm_driver
1230 driver_stub = {
1231 	.driver_features =
1232 		DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1233 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1234 		| DRIVER_KMS_LEGACY_CONTEXT
1235 #endif
1236 		,
1237 
1238 	.open = nouveau_drm_open,
1239 	.postclose = nouveau_drm_postclose,
1240 	.lastclose = nouveau_vga_lastclose,
1241 
1242 #if defined(CONFIG_DEBUG_FS)
1243 	.debugfs_init = nouveau_drm_debugfs_init,
1244 #endif
1245 
1246 	.ioctls = nouveau_ioctls,
1247 	.num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1248 	.fops = &nouveau_driver_fops,
1249 
1250 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1251 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1252 	.gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1253 	.gem_prime_mmap = drm_gem_prime_mmap,
1254 
1255 	.dumb_create = nouveau_display_dumb_create,
1256 	.dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1257 
1258 	.name = DRIVER_NAME,
1259 	.desc = DRIVER_DESC,
1260 #ifdef GIT_REVISION
1261 	.date = GIT_REVISION,
1262 #else
1263 	.date = DRIVER_DATE,
1264 #endif
1265 	.major = DRIVER_MAJOR,
1266 	.minor = DRIVER_MINOR,
1267 	.patchlevel = DRIVER_PATCHLEVEL,
1268 };
1269 
1270 static struct pci_device_id
1271 nouveau_drm_pci_table[] = {
1272 	{
1273 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1274 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1275 		.class_mask  = 0xff << 16,
1276 	},
1277 	{
1278 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1279 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1280 		.class_mask  = 0xff << 16,
1281 	},
1282 	{}
1283 };
1284 
nouveau_display_options(void)1285 static void nouveau_display_options(void)
1286 {
1287 	DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1288 
1289 	DRM_DEBUG_DRIVER("... tv_disable   : %d\n", nouveau_tv_disable);
1290 	DRM_DEBUG_DRIVER("... ignorelid    : %d\n", nouveau_ignorelid);
1291 	DRM_DEBUG_DRIVER("... duallink     : %d\n", nouveau_duallink);
1292 	DRM_DEBUG_DRIVER("... nofbaccel    : %d\n", nouveau_nofbaccel);
1293 	DRM_DEBUG_DRIVER("... config       : %s\n", nouveau_config);
1294 	DRM_DEBUG_DRIVER("... debug        : %s\n", nouveau_debug);
1295 	DRM_DEBUG_DRIVER("... noaccel      : %d\n", nouveau_noaccel);
1296 	DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
1297 	DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
1298 	DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1299 	DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
1300 }
1301 
1302 static const struct dev_pm_ops nouveau_pm_ops = {
1303 	.suspend = nouveau_pmops_suspend,
1304 	.resume = nouveau_pmops_resume,
1305 	.freeze = nouveau_pmops_freeze,
1306 	.thaw = nouveau_pmops_thaw,
1307 	.poweroff = nouveau_pmops_freeze,
1308 	.restore = nouveau_pmops_resume,
1309 	.runtime_suspend = nouveau_pmops_runtime_suspend,
1310 	.runtime_resume = nouveau_pmops_runtime_resume,
1311 	.runtime_idle = nouveau_pmops_runtime_idle,
1312 };
1313 
1314 static struct pci_driver
1315 nouveau_drm_pci_driver = {
1316 	.name = "nouveau",
1317 	.id_table = nouveau_drm_pci_table,
1318 	.probe = nouveau_drm_probe,
1319 	.remove = nouveau_drm_remove,
1320 	.driver.pm = &nouveau_pm_ops,
1321 };
1322 
1323 struct drm_device *
nouveau_platform_device_create(const struct nvkm_device_tegra_func * func,struct platform_device * pdev,struct nvkm_device ** pdevice)1324 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1325 			       struct platform_device *pdev,
1326 			       struct nvkm_device **pdevice)
1327 {
1328 	struct drm_device *drm;
1329 	int err;
1330 
1331 	err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1332 				    true, true, ~0ULL, pdevice);
1333 	if (err)
1334 		goto err_free;
1335 
1336 	drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1337 	if (IS_ERR(drm)) {
1338 		err = PTR_ERR(drm);
1339 		goto err_free;
1340 	}
1341 
1342 	err = nouveau_drm_device_init(drm);
1343 	if (err)
1344 		goto err_put;
1345 
1346 	platform_set_drvdata(pdev, drm);
1347 
1348 	return drm;
1349 
1350 err_put:
1351 	drm_dev_put(drm);
1352 err_free:
1353 	nvkm_device_del(pdevice);
1354 
1355 	return ERR_PTR(err);
1356 }
1357 
1358 static int __init
nouveau_drm_init(void)1359 nouveau_drm_init(void)
1360 {
1361 	driver_pci = driver_stub;
1362 	driver_platform = driver_stub;
1363 
1364 	nouveau_display_options();
1365 
1366 	if (nouveau_modeset == -1) {
1367 		if (vgacon_text_force())
1368 			nouveau_modeset = 0;
1369 	}
1370 
1371 	if (!nouveau_modeset)
1372 		return 0;
1373 
1374 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1375 	platform_driver_register(&nouveau_platform_driver);
1376 #endif
1377 
1378 	nouveau_register_dsm_handler();
1379 	nouveau_backlight_ctor();
1380 
1381 #ifdef CONFIG_PCI
1382 	return pci_register_driver(&nouveau_drm_pci_driver);
1383 #else
1384 	return 0;
1385 #endif
1386 }
1387 
1388 static void __exit
nouveau_drm_exit(void)1389 nouveau_drm_exit(void)
1390 {
1391 	if (!nouveau_modeset)
1392 		return;
1393 
1394 #ifdef CONFIG_PCI
1395 	pci_unregister_driver(&nouveau_drm_pci_driver);
1396 #endif
1397 	nouveau_backlight_dtor();
1398 	nouveau_unregister_dsm_handler();
1399 
1400 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1401 	platform_driver_unregister(&nouveau_platform_driver);
1402 #endif
1403 	if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1404 		mmu_notifier_synchronize();
1405 }
1406 
1407 module_init(nouveau_drm_init);
1408 module_exit(nouveau_drm_exit);
1409 
1410 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1411 MODULE_AUTHOR(DRIVER_AUTHOR);
1412 MODULE_DESCRIPTION(DRIVER_DESC);
1413 MODULE_LICENSE("GPL and additional rights");
1414