1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Common code for the NVMe target.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5 */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/random.h>
9 #include <linux/rculist.h>
10 #include <linux/pci-p2pdma.h>
11 #include <linux/scatterlist.h>
12
13 #define CREATE_TRACE_POINTS
14 #include "trace.h"
15
16 #include "nvmet.h"
17
18 struct kmem_cache *nvmet_bvec_cache;
19 struct workqueue_struct *buffered_io_wq;
20 struct workqueue_struct *zbd_wq;
21 static const struct nvmet_fabrics_ops *nvmet_transports[NVMF_TRTYPE_MAX];
22 static DEFINE_IDA(cntlid_ida);
23
24 struct workqueue_struct *nvmet_wq;
25 EXPORT_SYMBOL_GPL(nvmet_wq);
26
27 /*
28 * This read/write semaphore is used to synchronize access to configuration
29 * information on a target system that will result in discovery log page
30 * information change for at least one host.
31 * The full list of resources to protected by this semaphore is:
32 *
33 * - subsystems list
34 * - per-subsystem allowed hosts list
35 * - allow_any_host subsystem attribute
36 * - nvmet_genctr
37 * - the nvmet_transports array
38 *
39 * When updating any of those lists/structures write lock should be obtained,
40 * while when reading (popolating discovery log page or checking host-subsystem
41 * link) read lock is obtained to allow concurrent reads.
42 */
43 DECLARE_RWSEM(nvmet_config_sem);
44
45 u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1];
46 u64 nvmet_ana_chgcnt;
47 DECLARE_RWSEM(nvmet_ana_sem);
48
errno_to_nvme_status(struct nvmet_req * req,int errno)49 inline u16 errno_to_nvme_status(struct nvmet_req *req, int errno)
50 {
51 switch (errno) {
52 case 0:
53 return NVME_SC_SUCCESS;
54 case -ENOSPC:
55 req->error_loc = offsetof(struct nvme_rw_command, length);
56 return NVME_SC_CAP_EXCEEDED | NVME_SC_DNR;
57 case -EREMOTEIO:
58 req->error_loc = offsetof(struct nvme_rw_command, slba);
59 return NVME_SC_LBA_RANGE | NVME_SC_DNR;
60 case -EOPNOTSUPP:
61 req->error_loc = offsetof(struct nvme_common_command, opcode);
62 switch (req->cmd->common.opcode) {
63 case nvme_cmd_dsm:
64 case nvme_cmd_write_zeroes:
65 return NVME_SC_ONCS_NOT_SUPPORTED | NVME_SC_DNR;
66 default:
67 return NVME_SC_INVALID_OPCODE | NVME_SC_DNR;
68 }
69 break;
70 case -ENODATA:
71 req->error_loc = offsetof(struct nvme_rw_command, nsid);
72 return NVME_SC_ACCESS_DENIED;
73 case -EIO:
74 fallthrough;
75 default:
76 req->error_loc = offsetof(struct nvme_common_command, opcode);
77 return NVME_SC_INTERNAL | NVME_SC_DNR;
78 }
79 }
80
nvmet_report_invalid_opcode(struct nvmet_req * req)81 u16 nvmet_report_invalid_opcode(struct nvmet_req *req)
82 {
83 pr_debug("unhandled cmd %d on qid %d\n", req->cmd->common.opcode,
84 req->sq->qid);
85
86 req->error_loc = offsetof(struct nvme_common_command, opcode);
87 return NVME_SC_INVALID_OPCODE | NVME_SC_DNR;
88 }
89
90 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port,
91 const char *subsysnqn);
92
nvmet_copy_to_sgl(struct nvmet_req * req,off_t off,const void * buf,size_t len)93 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf,
94 size_t len)
95 {
96 if (sg_pcopy_from_buffer(req->sg, req->sg_cnt, buf, len, off) != len) {
97 req->error_loc = offsetof(struct nvme_common_command, dptr);
98 return NVME_SC_SGL_INVALID_DATA | NVME_SC_DNR;
99 }
100 return 0;
101 }
102
nvmet_copy_from_sgl(struct nvmet_req * req,off_t off,void * buf,size_t len)103 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, size_t len)
104 {
105 if (sg_pcopy_to_buffer(req->sg, req->sg_cnt, buf, len, off) != len) {
106 req->error_loc = offsetof(struct nvme_common_command, dptr);
107 return NVME_SC_SGL_INVALID_DATA | NVME_SC_DNR;
108 }
109 return 0;
110 }
111
nvmet_zero_sgl(struct nvmet_req * req,off_t off,size_t len)112 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len)
113 {
114 if (sg_zero_buffer(req->sg, req->sg_cnt, len, off) != len) {
115 req->error_loc = offsetof(struct nvme_common_command, dptr);
116 return NVME_SC_SGL_INVALID_DATA | NVME_SC_DNR;
117 }
118 return 0;
119 }
120
nvmet_max_nsid(struct nvmet_subsys * subsys)121 static u32 nvmet_max_nsid(struct nvmet_subsys *subsys)
122 {
123 struct nvmet_ns *cur;
124 unsigned long idx;
125 u32 nsid = 0;
126
127 xa_for_each(&subsys->namespaces, idx, cur)
128 nsid = cur->nsid;
129
130 return nsid;
131 }
132
nvmet_async_event_result(struct nvmet_async_event * aen)133 static u32 nvmet_async_event_result(struct nvmet_async_event *aen)
134 {
135 return aen->event_type | (aen->event_info << 8) | (aen->log_page << 16);
136 }
137
nvmet_async_events_failall(struct nvmet_ctrl * ctrl)138 static void nvmet_async_events_failall(struct nvmet_ctrl *ctrl)
139 {
140 struct nvmet_req *req;
141
142 mutex_lock(&ctrl->lock);
143 while (ctrl->nr_async_event_cmds) {
144 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds];
145 mutex_unlock(&ctrl->lock);
146 nvmet_req_complete(req, NVME_SC_INTERNAL | NVME_SC_DNR);
147 mutex_lock(&ctrl->lock);
148 }
149 mutex_unlock(&ctrl->lock);
150 }
151
nvmet_async_events_process(struct nvmet_ctrl * ctrl)152 static void nvmet_async_events_process(struct nvmet_ctrl *ctrl)
153 {
154 struct nvmet_async_event *aen;
155 struct nvmet_req *req;
156
157 mutex_lock(&ctrl->lock);
158 while (ctrl->nr_async_event_cmds && !list_empty(&ctrl->async_events)) {
159 aen = list_first_entry(&ctrl->async_events,
160 struct nvmet_async_event, entry);
161 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds];
162 nvmet_set_result(req, nvmet_async_event_result(aen));
163
164 list_del(&aen->entry);
165 kfree(aen);
166
167 mutex_unlock(&ctrl->lock);
168 trace_nvmet_async_event(ctrl, req->cqe->result.u32);
169 nvmet_req_complete(req, 0);
170 mutex_lock(&ctrl->lock);
171 }
172 mutex_unlock(&ctrl->lock);
173 }
174
nvmet_async_events_free(struct nvmet_ctrl * ctrl)175 static void nvmet_async_events_free(struct nvmet_ctrl *ctrl)
176 {
177 struct nvmet_async_event *aen, *tmp;
178
179 mutex_lock(&ctrl->lock);
180 list_for_each_entry_safe(aen, tmp, &ctrl->async_events, entry) {
181 list_del(&aen->entry);
182 kfree(aen);
183 }
184 mutex_unlock(&ctrl->lock);
185 }
186
nvmet_async_event_work(struct work_struct * work)187 static void nvmet_async_event_work(struct work_struct *work)
188 {
189 struct nvmet_ctrl *ctrl =
190 container_of(work, struct nvmet_ctrl, async_event_work);
191
192 nvmet_async_events_process(ctrl);
193 }
194
nvmet_add_async_event(struct nvmet_ctrl * ctrl,u8 event_type,u8 event_info,u8 log_page)195 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type,
196 u8 event_info, u8 log_page)
197 {
198 struct nvmet_async_event *aen;
199
200 aen = kmalloc(sizeof(*aen), GFP_KERNEL);
201 if (!aen)
202 return;
203
204 aen->event_type = event_type;
205 aen->event_info = event_info;
206 aen->log_page = log_page;
207
208 mutex_lock(&ctrl->lock);
209 list_add_tail(&aen->entry, &ctrl->async_events);
210 mutex_unlock(&ctrl->lock);
211
212 queue_work(nvmet_wq, &ctrl->async_event_work);
213 }
214
nvmet_add_to_changed_ns_log(struct nvmet_ctrl * ctrl,__le32 nsid)215 static void nvmet_add_to_changed_ns_log(struct nvmet_ctrl *ctrl, __le32 nsid)
216 {
217 u32 i;
218
219 mutex_lock(&ctrl->lock);
220 if (ctrl->nr_changed_ns > NVME_MAX_CHANGED_NAMESPACES)
221 goto out_unlock;
222
223 for (i = 0; i < ctrl->nr_changed_ns; i++) {
224 if (ctrl->changed_ns_list[i] == nsid)
225 goto out_unlock;
226 }
227
228 if (ctrl->nr_changed_ns == NVME_MAX_CHANGED_NAMESPACES) {
229 ctrl->changed_ns_list[0] = cpu_to_le32(0xffffffff);
230 ctrl->nr_changed_ns = U32_MAX;
231 goto out_unlock;
232 }
233
234 ctrl->changed_ns_list[ctrl->nr_changed_ns++] = nsid;
235 out_unlock:
236 mutex_unlock(&ctrl->lock);
237 }
238
nvmet_ns_changed(struct nvmet_subsys * subsys,u32 nsid)239 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid)
240 {
241 struct nvmet_ctrl *ctrl;
242
243 lockdep_assert_held(&subsys->lock);
244
245 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
246 nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid));
247 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR))
248 continue;
249 nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
250 NVME_AER_NOTICE_NS_CHANGED,
251 NVME_LOG_CHANGED_NS);
252 }
253 }
254
nvmet_send_ana_event(struct nvmet_subsys * subsys,struct nvmet_port * port)255 void nvmet_send_ana_event(struct nvmet_subsys *subsys,
256 struct nvmet_port *port)
257 {
258 struct nvmet_ctrl *ctrl;
259
260 mutex_lock(&subsys->lock);
261 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
262 if (port && ctrl->port != port)
263 continue;
264 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE))
265 continue;
266 nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
267 NVME_AER_NOTICE_ANA, NVME_LOG_ANA);
268 }
269 mutex_unlock(&subsys->lock);
270 }
271
nvmet_port_send_ana_event(struct nvmet_port * port)272 void nvmet_port_send_ana_event(struct nvmet_port *port)
273 {
274 struct nvmet_subsys_link *p;
275
276 down_read(&nvmet_config_sem);
277 list_for_each_entry(p, &port->subsystems, entry)
278 nvmet_send_ana_event(p->subsys, port);
279 up_read(&nvmet_config_sem);
280 }
281
nvmet_register_transport(const struct nvmet_fabrics_ops * ops)282 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops)
283 {
284 int ret = 0;
285
286 down_write(&nvmet_config_sem);
287 if (nvmet_transports[ops->type])
288 ret = -EINVAL;
289 else
290 nvmet_transports[ops->type] = ops;
291 up_write(&nvmet_config_sem);
292
293 return ret;
294 }
295 EXPORT_SYMBOL_GPL(nvmet_register_transport);
296
nvmet_unregister_transport(const struct nvmet_fabrics_ops * ops)297 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops)
298 {
299 down_write(&nvmet_config_sem);
300 nvmet_transports[ops->type] = NULL;
301 up_write(&nvmet_config_sem);
302 }
303 EXPORT_SYMBOL_GPL(nvmet_unregister_transport);
304
nvmet_port_del_ctrls(struct nvmet_port * port,struct nvmet_subsys * subsys)305 void nvmet_port_del_ctrls(struct nvmet_port *port, struct nvmet_subsys *subsys)
306 {
307 struct nvmet_ctrl *ctrl;
308
309 mutex_lock(&subsys->lock);
310 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
311 if (ctrl->port == port)
312 ctrl->ops->delete_ctrl(ctrl);
313 }
314 mutex_unlock(&subsys->lock);
315 }
316
nvmet_enable_port(struct nvmet_port * port)317 int nvmet_enable_port(struct nvmet_port *port)
318 {
319 const struct nvmet_fabrics_ops *ops;
320 int ret;
321
322 lockdep_assert_held(&nvmet_config_sem);
323
324 ops = nvmet_transports[port->disc_addr.trtype];
325 if (!ops) {
326 up_write(&nvmet_config_sem);
327 request_module("nvmet-transport-%d", port->disc_addr.trtype);
328 down_write(&nvmet_config_sem);
329 ops = nvmet_transports[port->disc_addr.trtype];
330 if (!ops) {
331 pr_err("transport type %d not supported\n",
332 port->disc_addr.trtype);
333 return -EINVAL;
334 }
335 }
336
337 if (!try_module_get(ops->owner))
338 return -EINVAL;
339
340 /*
341 * If the user requested PI support and the transport isn't pi capable,
342 * don't enable the port.
343 */
344 if (port->pi_enable && !(ops->flags & NVMF_METADATA_SUPPORTED)) {
345 pr_err("T10-PI is not supported by transport type %d\n",
346 port->disc_addr.trtype);
347 ret = -EINVAL;
348 goto out_put;
349 }
350
351 ret = ops->add_port(port);
352 if (ret)
353 goto out_put;
354
355 /* If the transport didn't set inline_data_size, then disable it. */
356 if (port->inline_data_size < 0)
357 port->inline_data_size = 0;
358
359 port->enabled = true;
360 port->tr_ops = ops;
361 return 0;
362
363 out_put:
364 module_put(ops->owner);
365 return ret;
366 }
367
nvmet_disable_port(struct nvmet_port * port)368 void nvmet_disable_port(struct nvmet_port *port)
369 {
370 const struct nvmet_fabrics_ops *ops;
371
372 lockdep_assert_held(&nvmet_config_sem);
373
374 port->enabled = false;
375 port->tr_ops = NULL;
376
377 ops = nvmet_transports[port->disc_addr.trtype];
378 ops->remove_port(port);
379 module_put(ops->owner);
380 }
381
nvmet_keep_alive_timer(struct work_struct * work)382 static void nvmet_keep_alive_timer(struct work_struct *work)
383 {
384 struct nvmet_ctrl *ctrl = container_of(to_delayed_work(work),
385 struct nvmet_ctrl, ka_work);
386 bool reset_tbkas = ctrl->reset_tbkas;
387
388 ctrl->reset_tbkas = false;
389 if (reset_tbkas) {
390 pr_debug("ctrl %d reschedule traffic based keep-alive timer\n",
391 ctrl->cntlid);
392 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
393 return;
394 }
395
396 pr_err("ctrl %d keep-alive timer (%d seconds) expired!\n",
397 ctrl->cntlid, ctrl->kato);
398
399 nvmet_ctrl_fatal_error(ctrl);
400 }
401
nvmet_start_keep_alive_timer(struct nvmet_ctrl * ctrl)402 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl)
403 {
404 if (unlikely(ctrl->kato == 0))
405 return;
406
407 pr_debug("ctrl %d start keep-alive timer for %d secs\n",
408 ctrl->cntlid, ctrl->kato);
409
410 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
411 }
412
nvmet_stop_keep_alive_timer(struct nvmet_ctrl * ctrl)413 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl)
414 {
415 if (unlikely(ctrl->kato == 0))
416 return;
417
418 pr_debug("ctrl %d stop keep-alive\n", ctrl->cntlid);
419
420 cancel_delayed_work_sync(&ctrl->ka_work);
421 }
422
nvmet_req_find_ns(struct nvmet_req * req)423 u16 nvmet_req_find_ns(struct nvmet_req *req)
424 {
425 u32 nsid = le32_to_cpu(req->cmd->common.nsid);
426
427 req->ns = xa_load(&nvmet_req_subsys(req)->namespaces, nsid);
428 if (unlikely(!req->ns)) {
429 req->error_loc = offsetof(struct nvme_common_command, nsid);
430 return NVME_SC_INVALID_NS | NVME_SC_DNR;
431 }
432
433 percpu_ref_get(&req->ns->ref);
434 return NVME_SC_SUCCESS;
435 }
436
nvmet_destroy_namespace(struct percpu_ref * ref)437 static void nvmet_destroy_namespace(struct percpu_ref *ref)
438 {
439 struct nvmet_ns *ns = container_of(ref, struct nvmet_ns, ref);
440
441 complete(&ns->disable_done);
442 }
443
nvmet_put_namespace(struct nvmet_ns * ns)444 void nvmet_put_namespace(struct nvmet_ns *ns)
445 {
446 percpu_ref_put(&ns->ref);
447 }
448
nvmet_ns_dev_disable(struct nvmet_ns * ns)449 static void nvmet_ns_dev_disable(struct nvmet_ns *ns)
450 {
451 nvmet_bdev_ns_disable(ns);
452 nvmet_file_ns_disable(ns);
453 }
454
nvmet_p2pmem_ns_enable(struct nvmet_ns * ns)455 static int nvmet_p2pmem_ns_enable(struct nvmet_ns *ns)
456 {
457 int ret;
458 struct pci_dev *p2p_dev;
459
460 if (!ns->use_p2pmem)
461 return 0;
462
463 if (!ns->bdev) {
464 pr_err("peer-to-peer DMA is not supported by non-block device namespaces\n");
465 return -EINVAL;
466 }
467
468 if (!blk_queue_pci_p2pdma(ns->bdev->bd_disk->queue)) {
469 pr_err("peer-to-peer DMA is not supported by the driver of %s\n",
470 ns->device_path);
471 return -EINVAL;
472 }
473
474 if (ns->p2p_dev) {
475 ret = pci_p2pdma_distance(ns->p2p_dev, nvmet_ns_dev(ns), true);
476 if (ret < 0)
477 return -EINVAL;
478 } else {
479 /*
480 * Right now we just check that there is p2pmem available so
481 * we can report an error to the user right away if there
482 * is not. We'll find the actual device to use once we
483 * setup the controller when the port's device is available.
484 */
485
486 p2p_dev = pci_p2pmem_find(nvmet_ns_dev(ns));
487 if (!p2p_dev) {
488 pr_err("no peer-to-peer memory is available for %s\n",
489 ns->device_path);
490 return -EINVAL;
491 }
492
493 pci_dev_put(p2p_dev);
494 }
495
496 return 0;
497 }
498
499 /*
500 * Note: ctrl->subsys->lock should be held when calling this function
501 */
nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl * ctrl,struct nvmet_ns * ns)502 static void nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl *ctrl,
503 struct nvmet_ns *ns)
504 {
505 struct device *clients[2];
506 struct pci_dev *p2p_dev;
507 int ret;
508
509 if (!ctrl->p2p_client || !ns->use_p2pmem)
510 return;
511
512 if (ns->p2p_dev) {
513 ret = pci_p2pdma_distance(ns->p2p_dev, ctrl->p2p_client, true);
514 if (ret < 0)
515 return;
516
517 p2p_dev = pci_dev_get(ns->p2p_dev);
518 } else {
519 clients[0] = ctrl->p2p_client;
520 clients[1] = nvmet_ns_dev(ns);
521
522 p2p_dev = pci_p2pmem_find_many(clients, ARRAY_SIZE(clients));
523 if (!p2p_dev) {
524 pr_err("no peer-to-peer memory is available that's supported by %s and %s\n",
525 dev_name(ctrl->p2p_client), ns->device_path);
526 return;
527 }
528 }
529
530 ret = radix_tree_insert(&ctrl->p2p_ns_map, ns->nsid, p2p_dev);
531 if (ret < 0)
532 pci_dev_put(p2p_dev);
533
534 pr_info("using p2pmem on %s for nsid %d\n", pci_name(p2p_dev),
535 ns->nsid);
536 }
537
nvmet_ns_revalidate(struct nvmet_ns * ns)538 bool nvmet_ns_revalidate(struct nvmet_ns *ns)
539 {
540 loff_t oldsize = ns->size;
541
542 if (ns->bdev)
543 nvmet_bdev_ns_revalidate(ns);
544 else
545 nvmet_file_ns_revalidate(ns);
546
547 return oldsize != ns->size;
548 }
549
nvmet_ns_enable(struct nvmet_ns * ns)550 int nvmet_ns_enable(struct nvmet_ns *ns)
551 {
552 struct nvmet_subsys *subsys = ns->subsys;
553 struct nvmet_ctrl *ctrl;
554 int ret;
555
556 mutex_lock(&subsys->lock);
557 ret = 0;
558
559 if (nvmet_is_passthru_subsys(subsys)) {
560 pr_info("cannot enable both passthru and regular namespaces for a single subsystem");
561 goto out_unlock;
562 }
563
564 if (ns->enabled)
565 goto out_unlock;
566
567 ret = -EMFILE;
568 if (subsys->nr_namespaces == NVMET_MAX_NAMESPACES)
569 goto out_unlock;
570
571 ret = nvmet_bdev_ns_enable(ns);
572 if (ret == -ENOTBLK)
573 ret = nvmet_file_ns_enable(ns);
574 if (ret)
575 goto out_unlock;
576
577 ret = nvmet_p2pmem_ns_enable(ns);
578 if (ret)
579 goto out_dev_disable;
580
581 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
582 nvmet_p2pmem_ns_add_p2p(ctrl, ns);
583
584 ret = percpu_ref_init(&ns->ref, nvmet_destroy_namespace,
585 0, GFP_KERNEL);
586 if (ret)
587 goto out_dev_put;
588
589 if (ns->nsid > subsys->max_nsid)
590 subsys->max_nsid = ns->nsid;
591
592 ret = xa_insert(&subsys->namespaces, ns->nsid, ns, GFP_KERNEL);
593 if (ret)
594 goto out_restore_subsys_maxnsid;
595
596 subsys->nr_namespaces++;
597
598 nvmet_ns_changed(subsys, ns->nsid);
599 ns->enabled = true;
600 ret = 0;
601 out_unlock:
602 mutex_unlock(&subsys->lock);
603 return ret;
604
605 out_restore_subsys_maxnsid:
606 subsys->max_nsid = nvmet_max_nsid(subsys);
607 percpu_ref_exit(&ns->ref);
608 out_dev_put:
609 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
610 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid));
611 out_dev_disable:
612 nvmet_ns_dev_disable(ns);
613 goto out_unlock;
614 }
615
nvmet_ns_disable(struct nvmet_ns * ns)616 void nvmet_ns_disable(struct nvmet_ns *ns)
617 {
618 struct nvmet_subsys *subsys = ns->subsys;
619 struct nvmet_ctrl *ctrl;
620
621 mutex_lock(&subsys->lock);
622 if (!ns->enabled)
623 goto out_unlock;
624
625 ns->enabled = false;
626 xa_erase(&ns->subsys->namespaces, ns->nsid);
627 if (ns->nsid == subsys->max_nsid)
628 subsys->max_nsid = nvmet_max_nsid(subsys);
629
630 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
631 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid));
632
633 mutex_unlock(&subsys->lock);
634
635 /*
636 * Now that we removed the namespaces from the lookup list, we
637 * can kill the per_cpu ref and wait for any remaining references
638 * to be dropped, as well as a RCU grace period for anyone only
639 * using the namepace under rcu_read_lock(). Note that we can't
640 * use call_rcu here as we need to ensure the namespaces have
641 * been fully destroyed before unloading the module.
642 */
643 percpu_ref_kill(&ns->ref);
644 synchronize_rcu();
645 wait_for_completion(&ns->disable_done);
646 percpu_ref_exit(&ns->ref);
647
648 mutex_lock(&subsys->lock);
649
650 subsys->nr_namespaces--;
651 nvmet_ns_changed(subsys, ns->nsid);
652 nvmet_ns_dev_disable(ns);
653 out_unlock:
654 mutex_unlock(&subsys->lock);
655 }
656
nvmet_ns_free(struct nvmet_ns * ns)657 void nvmet_ns_free(struct nvmet_ns *ns)
658 {
659 nvmet_ns_disable(ns);
660
661 down_write(&nvmet_ana_sem);
662 nvmet_ana_group_enabled[ns->anagrpid]--;
663 up_write(&nvmet_ana_sem);
664
665 kfree(ns->device_path);
666 kfree(ns);
667 }
668
nvmet_ns_alloc(struct nvmet_subsys * subsys,u32 nsid)669 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid)
670 {
671 struct nvmet_ns *ns;
672
673 ns = kzalloc(sizeof(*ns), GFP_KERNEL);
674 if (!ns)
675 return NULL;
676
677 init_completion(&ns->disable_done);
678
679 ns->nsid = nsid;
680 ns->subsys = subsys;
681
682 down_write(&nvmet_ana_sem);
683 ns->anagrpid = NVMET_DEFAULT_ANA_GRPID;
684 nvmet_ana_group_enabled[ns->anagrpid]++;
685 up_write(&nvmet_ana_sem);
686
687 uuid_gen(&ns->uuid);
688 ns->buffered_io = false;
689 ns->csi = NVME_CSI_NVM;
690
691 return ns;
692 }
693
nvmet_update_sq_head(struct nvmet_req * req)694 static void nvmet_update_sq_head(struct nvmet_req *req)
695 {
696 if (req->sq->size) {
697 u32 old_sqhd, new_sqhd;
698
699 do {
700 old_sqhd = req->sq->sqhd;
701 new_sqhd = (old_sqhd + 1) % req->sq->size;
702 } while (cmpxchg(&req->sq->sqhd, old_sqhd, new_sqhd) !=
703 old_sqhd);
704 }
705 req->cqe->sq_head = cpu_to_le16(req->sq->sqhd & 0x0000FFFF);
706 }
707
nvmet_set_error(struct nvmet_req * req,u16 status)708 static void nvmet_set_error(struct nvmet_req *req, u16 status)
709 {
710 struct nvmet_ctrl *ctrl = req->sq->ctrl;
711 struct nvme_error_slot *new_error_slot;
712 unsigned long flags;
713
714 req->cqe->status = cpu_to_le16(status << 1);
715
716 if (!ctrl || req->error_loc == NVMET_NO_ERROR_LOC)
717 return;
718
719 spin_lock_irqsave(&ctrl->error_lock, flags);
720 ctrl->err_counter++;
721 new_error_slot =
722 &ctrl->slots[ctrl->err_counter % NVMET_ERROR_LOG_SLOTS];
723
724 new_error_slot->error_count = cpu_to_le64(ctrl->err_counter);
725 new_error_slot->sqid = cpu_to_le16(req->sq->qid);
726 new_error_slot->cmdid = cpu_to_le16(req->cmd->common.command_id);
727 new_error_slot->status_field = cpu_to_le16(status << 1);
728 new_error_slot->param_error_location = cpu_to_le16(req->error_loc);
729 new_error_slot->lba = cpu_to_le64(req->error_slba);
730 new_error_slot->nsid = req->cmd->common.nsid;
731 spin_unlock_irqrestore(&ctrl->error_lock, flags);
732
733 /* set the more bit for this request */
734 req->cqe->status |= cpu_to_le16(1 << 14);
735 }
736
__nvmet_req_complete(struct nvmet_req * req,u16 status)737 static void __nvmet_req_complete(struct nvmet_req *req, u16 status)
738 {
739 struct nvmet_ns *ns = req->ns;
740
741 if (!req->sq->sqhd_disabled)
742 nvmet_update_sq_head(req);
743 req->cqe->sq_id = cpu_to_le16(req->sq->qid);
744 req->cqe->command_id = req->cmd->common.command_id;
745
746 if (unlikely(status))
747 nvmet_set_error(req, status);
748
749 trace_nvmet_req_complete(req);
750
751 req->ops->queue_response(req);
752 if (ns)
753 nvmet_put_namespace(ns);
754 }
755
nvmet_req_complete(struct nvmet_req * req,u16 status)756 void nvmet_req_complete(struct nvmet_req *req, u16 status)
757 {
758 struct nvmet_sq *sq = req->sq;
759
760 __nvmet_req_complete(req, status);
761 percpu_ref_put(&sq->ref);
762 }
763 EXPORT_SYMBOL_GPL(nvmet_req_complete);
764
nvmet_cq_setup(struct nvmet_ctrl * ctrl,struct nvmet_cq * cq,u16 qid,u16 size)765 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq,
766 u16 qid, u16 size)
767 {
768 cq->qid = qid;
769 cq->size = size;
770 }
771
nvmet_sq_setup(struct nvmet_ctrl * ctrl,struct nvmet_sq * sq,u16 qid,u16 size)772 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq,
773 u16 qid, u16 size)
774 {
775 sq->sqhd = 0;
776 sq->qid = qid;
777 sq->size = size;
778
779 ctrl->sqs[qid] = sq;
780 }
781
nvmet_confirm_sq(struct percpu_ref * ref)782 static void nvmet_confirm_sq(struct percpu_ref *ref)
783 {
784 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref);
785
786 complete(&sq->confirm_done);
787 }
788
nvmet_sq_destroy(struct nvmet_sq * sq)789 void nvmet_sq_destroy(struct nvmet_sq *sq)
790 {
791 struct nvmet_ctrl *ctrl = sq->ctrl;
792
793 /*
794 * If this is the admin queue, complete all AERs so that our
795 * queue doesn't have outstanding requests on it.
796 */
797 if (ctrl && ctrl->sqs && ctrl->sqs[0] == sq)
798 nvmet_async_events_failall(ctrl);
799 percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq);
800 wait_for_completion(&sq->confirm_done);
801 wait_for_completion(&sq->free_done);
802 percpu_ref_exit(&sq->ref);
803
804 if (ctrl) {
805 /*
806 * The teardown flow may take some time, and the host may not
807 * send us keep-alive during this period, hence reset the
808 * traffic based keep-alive timer so we don't trigger a
809 * controller teardown as a result of a keep-alive expiration.
810 */
811 ctrl->reset_tbkas = true;
812 sq->ctrl->sqs[sq->qid] = NULL;
813 nvmet_ctrl_put(ctrl);
814 sq->ctrl = NULL; /* allows reusing the queue later */
815 }
816 }
817 EXPORT_SYMBOL_GPL(nvmet_sq_destroy);
818
nvmet_sq_free(struct percpu_ref * ref)819 static void nvmet_sq_free(struct percpu_ref *ref)
820 {
821 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref);
822
823 complete(&sq->free_done);
824 }
825
nvmet_sq_init(struct nvmet_sq * sq)826 int nvmet_sq_init(struct nvmet_sq *sq)
827 {
828 int ret;
829
830 ret = percpu_ref_init(&sq->ref, nvmet_sq_free, 0, GFP_KERNEL);
831 if (ret) {
832 pr_err("percpu_ref init failed!\n");
833 return ret;
834 }
835 init_completion(&sq->free_done);
836 init_completion(&sq->confirm_done);
837
838 return 0;
839 }
840 EXPORT_SYMBOL_GPL(nvmet_sq_init);
841
nvmet_check_ana_state(struct nvmet_port * port,struct nvmet_ns * ns)842 static inline u16 nvmet_check_ana_state(struct nvmet_port *port,
843 struct nvmet_ns *ns)
844 {
845 enum nvme_ana_state state = port->ana_state[ns->anagrpid];
846
847 if (unlikely(state == NVME_ANA_INACCESSIBLE))
848 return NVME_SC_ANA_INACCESSIBLE;
849 if (unlikely(state == NVME_ANA_PERSISTENT_LOSS))
850 return NVME_SC_ANA_PERSISTENT_LOSS;
851 if (unlikely(state == NVME_ANA_CHANGE))
852 return NVME_SC_ANA_TRANSITION;
853 return 0;
854 }
855
nvmet_io_cmd_check_access(struct nvmet_req * req)856 static inline u16 nvmet_io_cmd_check_access(struct nvmet_req *req)
857 {
858 if (unlikely(req->ns->readonly)) {
859 switch (req->cmd->common.opcode) {
860 case nvme_cmd_read:
861 case nvme_cmd_flush:
862 break;
863 default:
864 return NVME_SC_NS_WRITE_PROTECTED;
865 }
866 }
867
868 return 0;
869 }
870
nvmet_parse_io_cmd(struct nvmet_req * req)871 static u16 nvmet_parse_io_cmd(struct nvmet_req *req)
872 {
873 u16 ret;
874
875 ret = nvmet_check_ctrl_status(req);
876 if (unlikely(ret))
877 return ret;
878
879 if (nvmet_is_passthru_req(req))
880 return nvmet_parse_passthru_io_cmd(req);
881
882 ret = nvmet_req_find_ns(req);
883 if (unlikely(ret))
884 return ret;
885
886 ret = nvmet_check_ana_state(req->port, req->ns);
887 if (unlikely(ret)) {
888 req->error_loc = offsetof(struct nvme_common_command, nsid);
889 return ret;
890 }
891 ret = nvmet_io_cmd_check_access(req);
892 if (unlikely(ret)) {
893 req->error_loc = offsetof(struct nvme_common_command, nsid);
894 return ret;
895 }
896
897 switch (req->ns->csi) {
898 case NVME_CSI_NVM:
899 if (req->ns->file)
900 return nvmet_file_parse_io_cmd(req);
901 return nvmet_bdev_parse_io_cmd(req);
902 case NVME_CSI_ZNS:
903 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED))
904 return nvmet_bdev_zns_parse_io_cmd(req);
905 return NVME_SC_INVALID_IO_CMD_SET;
906 default:
907 return NVME_SC_INVALID_IO_CMD_SET;
908 }
909 }
910
nvmet_req_init(struct nvmet_req * req,struct nvmet_cq * cq,struct nvmet_sq * sq,const struct nvmet_fabrics_ops * ops)911 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq,
912 struct nvmet_sq *sq, const struct nvmet_fabrics_ops *ops)
913 {
914 u8 flags = req->cmd->common.flags;
915 u16 status;
916
917 req->cq = cq;
918 req->sq = sq;
919 req->ops = ops;
920 req->sg = NULL;
921 req->metadata_sg = NULL;
922 req->sg_cnt = 0;
923 req->metadata_sg_cnt = 0;
924 req->transfer_len = 0;
925 req->metadata_len = 0;
926 req->cqe->status = 0;
927 req->cqe->sq_head = 0;
928 req->ns = NULL;
929 req->error_loc = NVMET_NO_ERROR_LOC;
930 req->error_slba = 0;
931
932 /* no support for fused commands yet */
933 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) {
934 req->error_loc = offsetof(struct nvme_common_command, flags);
935 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
936 goto fail;
937 }
938
939 /*
940 * For fabrics, PSDT field shall describe metadata pointer (MPTR) that
941 * contains an address of a single contiguous physical buffer that is
942 * byte aligned.
943 */
944 if (unlikely((flags & NVME_CMD_SGL_ALL) != NVME_CMD_SGL_METABUF)) {
945 req->error_loc = offsetof(struct nvme_common_command, flags);
946 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
947 goto fail;
948 }
949
950 if (unlikely(!req->sq->ctrl))
951 /* will return an error for any non-connect command: */
952 status = nvmet_parse_connect_cmd(req);
953 else if (likely(req->sq->qid != 0))
954 status = nvmet_parse_io_cmd(req);
955 else
956 status = nvmet_parse_admin_cmd(req);
957
958 if (status)
959 goto fail;
960
961 trace_nvmet_req_init(req, req->cmd);
962
963 if (unlikely(!percpu_ref_tryget_live(&sq->ref))) {
964 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
965 goto fail;
966 }
967
968 if (sq->ctrl)
969 sq->ctrl->reset_tbkas = true;
970
971 return true;
972
973 fail:
974 __nvmet_req_complete(req, status);
975 return false;
976 }
977 EXPORT_SYMBOL_GPL(nvmet_req_init);
978
nvmet_req_uninit(struct nvmet_req * req)979 void nvmet_req_uninit(struct nvmet_req *req)
980 {
981 percpu_ref_put(&req->sq->ref);
982 if (req->ns)
983 nvmet_put_namespace(req->ns);
984 }
985 EXPORT_SYMBOL_GPL(nvmet_req_uninit);
986
nvmet_check_transfer_len(struct nvmet_req * req,size_t len)987 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len)
988 {
989 if (unlikely(len != req->transfer_len)) {
990 req->error_loc = offsetof(struct nvme_common_command, dptr);
991 nvmet_req_complete(req, NVME_SC_SGL_INVALID_DATA | NVME_SC_DNR);
992 return false;
993 }
994
995 return true;
996 }
997 EXPORT_SYMBOL_GPL(nvmet_check_transfer_len);
998
nvmet_check_data_len_lte(struct nvmet_req * req,size_t data_len)999 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len)
1000 {
1001 if (unlikely(data_len > req->transfer_len)) {
1002 req->error_loc = offsetof(struct nvme_common_command, dptr);
1003 nvmet_req_complete(req, NVME_SC_SGL_INVALID_DATA | NVME_SC_DNR);
1004 return false;
1005 }
1006
1007 return true;
1008 }
1009
nvmet_data_transfer_len(struct nvmet_req * req)1010 static unsigned int nvmet_data_transfer_len(struct nvmet_req *req)
1011 {
1012 return req->transfer_len - req->metadata_len;
1013 }
1014
nvmet_req_alloc_p2pmem_sgls(struct pci_dev * p2p_dev,struct nvmet_req * req)1015 static int nvmet_req_alloc_p2pmem_sgls(struct pci_dev *p2p_dev,
1016 struct nvmet_req *req)
1017 {
1018 req->sg = pci_p2pmem_alloc_sgl(p2p_dev, &req->sg_cnt,
1019 nvmet_data_transfer_len(req));
1020 if (!req->sg)
1021 goto out_err;
1022
1023 if (req->metadata_len) {
1024 req->metadata_sg = pci_p2pmem_alloc_sgl(p2p_dev,
1025 &req->metadata_sg_cnt, req->metadata_len);
1026 if (!req->metadata_sg)
1027 goto out_free_sg;
1028 }
1029
1030 req->p2p_dev = p2p_dev;
1031
1032 return 0;
1033 out_free_sg:
1034 pci_p2pmem_free_sgl(req->p2p_dev, req->sg);
1035 out_err:
1036 return -ENOMEM;
1037 }
1038
nvmet_req_find_p2p_dev(struct nvmet_req * req)1039 static struct pci_dev *nvmet_req_find_p2p_dev(struct nvmet_req *req)
1040 {
1041 if (!IS_ENABLED(CONFIG_PCI_P2PDMA) ||
1042 !req->sq->ctrl || !req->sq->qid || !req->ns)
1043 return NULL;
1044 return radix_tree_lookup(&req->sq->ctrl->p2p_ns_map, req->ns->nsid);
1045 }
1046
nvmet_req_alloc_sgls(struct nvmet_req * req)1047 int nvmet_req_alloc_sgls(struct nvmet_req *req)
1048 {
1049 struct pci_dev *p2p_dev = nvmet_req_find_p2p_dev(req);
1050
1051 if (p2p_dev && !nvmet_req_alloc_p2pmem_sgls(p2p_dev, req))
1052 return 0;
1053
1054 req->sg = sgl_alloc(nvmet_data_transfer_len(req), GFP_KERNEL,
1055 &req->sg_cnt);
1056 if (unlikely(!req->sg))
1057 goto out;
1058
1059 if (req->metadata_len) {
1060 req->metadata_sg = sgl_alloc(req->metadata_len, GFP_KERNEL,
1061 &req->metadata_sg_cnt);
1062 if (unlikely(!req->metadata_sg))
1063 goto out_free;
1064 }
1065
1066 return 0;
1067 out_free:
1068 sgl_free(req->sg);
1069 out:
1070 return -ENOMEM;
1071 }
1072 EXPORT_SYMBOL_GPL(nvmet_req_alloc_sgls);
1073
nvmet_req_free_sgls(struct nvmet_req * req)1074 void nvmet_req_free_sgls(struct nvmet_req *req)
1075 {
1076 if (req->p2p_dev) {
1077 pci_p2pmem_free_sgl(req->p2p_dev, req->sg);
1078 if (req->metadata_sg)
1079 pci_p2pmem_free_sgl(req->p2p_dev, req->metadata_sg);
1080 req->p2p_dev = NULL;
1081 } else {
1082 sgl_free(req->sg);
1083 if (req->metadata_sg)
1084 sgl_free(req->metadata_sg);
1085 }
1086
1087 req->sg = NULL;
1088 req->metadata_sg = NULL;
1089 req->sg_cnt = 0;
1090 req->metadata_sg_cnt = 0;
1091 }
1092 EXPORT_SYMBOL_GPL(nvmet_req_free_sgls);
1093
nvmet_cc_en(u32 cc)1094 static inline bool nvmet_cc_en(u32 cc)
1095 {
1096 return (cc >> NVME_CC_EN_SHIFT) & 0x1;
1097 }
1098
nvmet_cc_css(u32 cc)1099 static inline u8 nvmet_cc_css(u32 cc)
1100 {
1101 return (cc >> NVME_CC_CSS_SHIFT) & 0x7;
1102 }
1103
nvmet_cc_mps(u32 cc)1104 static inline u8 nvmet_cc_mps(u32 cc)
1105 {
1106 return (cc >> NVME_CC_MPS_SHIFT) & 0xf;
1107 }
1108
nvmet_cc_ams(u32 cc)1109 static inline u8 nvmet_cc_ams(u32 cc)
1110 {
1111 return (cc >> NVME_CC_AMS_SHIFT) & 0x7;
1112 }
1113
nvmet_cc_shn(u32 cc)1114 static inline u8 nvmet_cc_shn(u32 cc)
1115 {
1116 return (cc >> NVME_CC_SHN_SHIFT) & 0x3;
1117 }
1118
nvmet_cc_iosqes(u32 cc)1119 static inline u8 nvmet_cc_iosqes(u32 cc)
1120 {
1121 return (cc >> NVME_CC_IOSQES_SHIFT) & 0xf;
1122 }
1123
nvmet_cc_iocqes(u32 cc)1124 static inline u8 nvmet_cc_iocqes(u32 cc)
1125 {
1126 return (cc >> NVME_CC_IOCQES_SHIFT) & 0xf;
1127 }
1128
nvmet_css_supported(u8 cc_css)1129 static inline bool nvmet_css_supported(u8 cc_css)
1130 {
1131 switch (cc_css <<= NVME_CC_CSS_SHIFT) {
1132 case NVME_CC_CSS_NVM:
1133 case NVME_CC_CSS_CSI:
1134 return true;
1135 default:
1136 return false;
1137 }
1138 }
1139
nvmet_start_ctrl(struct nvmet_ctrl * ctrl)1140 static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl)
1141 {
1142 lockdep_assert_held(&ctrl->lock);
1143
1144 /*
1145 * Only I/O controllers should verify iosqes,iocqes.
1146 * Strictly speaking, the spec says a discovery controller
1147 * should verify iosqes,iocqes are zeroed, however that
1148 * would break backwards compatibility, so don't enforce it.
1149 */
1150 if (ctrl->subsys->type != NVME_NQN_DISC &&
1151 (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES ||
1152 nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) {
1153 ctrl->csts = NVME_CSTS_CFS;
1154 return;
1155 }
1156
1157 if (nvmet_cc_mps(ctrl->cc) != 0 ||
1158 nvmet_cc_ams(ctrl->cc) != 0 ||
1159 !nvmet_css_supported(nvmet_cc_css(ctrl->cc))) {
1160 ctrl->csts = NVME_CSTS_CFS;
1161 return;
1162 }
1163
1164 ctrl->csts = NVME_CSTS_RDY;
1165
1166 /*
1167 * Controllers that are not yet enabled should not really enforce the
1168 * keep alive timeout, but we still want to track a timeout and cleanup
1169 * in case a host died before it enabled the controller. Hence, simply
1170 * reset the keep alive timer when the controller is enabled.
1171 */
1172 if (ctrl->kato)
1173 mod_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ);
1174 }
1175
nvmet_clear_ctrl(struct nvmet_ctrl * ctrl)1176 static void nvmet_clear_ctrl(struct nvmet_ctrl *ctrl)
1177 {
1178 lockdep_assert_held(&ctrl->lock);
1179
1180 /* XXX: tear down queues? */
1181 ctrl->csts &= ~NVME_CSTS_RDY;
1182 ctrl->cc = 0;
1183 }
1184
nvmet_update_cc(struct nvmet_ctrl * ctrl,u32 new)1185 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new)
1186 {
1187 u32 old;
1188
1189 mutex_lock(&ctrl->lock);
1190 old = ctrl->cc;
1191 ctrl->cc = new;
1192
1193 if (nvmet_cc_en(new) && !nvmet_cc_en(old))
1194 nvmet_start_ctrl(ctrl);
1195 if (!nvmet_cc_en(new) && nvmet_cc_en(old))
1196 nvmet_clear_ctrl(ctrl);
1197 if (nvmet_cc_shn(new) && !nvmet_cc_shn(old)) {
1198 nvmet_clear_ctrl(ctrl);
1199 ctrl->csts |= NVME_CSTS_SHST_CMPLT;
1200 }
1201 if (!nvmet_cc_shn(new) && nvmet_cc_shn(old))
1202 ctrl->csts &= ~NVME_CSTS_SHST_CMPLT;
1203 mutex_unlock(&ctrl->lock);
1204 }
1205
nvmet_init_cap(struct nvmet_ctrl * ctrl)1206 static void nvmet_init_cap(struct nvmet_ctrl *ctrl)
1207 {
1208 /* command sets supported: NVMe command set: */
1209 ctrl->cap = (1ULL << 37);
1210 /* Controller supports one or more I/O Command Sets */
1211 ctrl->cap |= (1ULL << 43);
1212 /* CC.EN timeout in 500msec units: */
1213 ctrl->cap |= (15ULL << 24);
1214 /* maximum queue entries supported: */
1215 ctrl->cap |= NVMET_QUEUE_SIZE - 1;
1216
1217 if (nvmet_is_passthru_subsys(ctrl->subsys))
1218 nvmet_passthrough_override_cap(ctrl);
1219 }
1220
nvmet_ctrl_find_get(const char * subsysnqn,const char * hostnqn,u16 cntlid,struct nvmet_req * req)1221 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn,
1222 const char *hostnqn, u16 cntlid,
1223 struct nvmet_req *req)
1224 {
1225 struct nvmet_ctrl *ctrl = NULL;
1226 struct nvmet_subsys *subsys;
1227
1228 subsys = nvmet_find_get_subsys(req->port, subsysnqn);
1229 if (!subsys) {
1230 pr_warn("connect request for invalid subsystem %s!\n",
1231 subsysnqn);
1232 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn);
1233 goto out;
1234 }
1235
1236 mutex_lock(&subsys->lock);
1237 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) {
1238 if (ctrl->cntlid == cntlid) {
1239 if (strncmp(hostnqn, ctrl->hostnqn, NVMF_NQN_SIZE)) {
1240 pr_warn("hostnqn mismatch.\n");
1241 continue;
1242 }
1243 if (!kref_get_unless_zero(&ctrl->ref))
1244 continue;
1245
1246 /* ctrl found */
1247 goto found;
1248 }
1249 }
1250
1251 ctrl = NULL; /* ctrl not found */
1252 pr_warn("could not find controller %d for subsys %s / host %s\n",
1253 cntlid, subsysnqn, hostnqn);
1254 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(cntlid);
1255
1256 found:
1257 mutex_unlock(&subsys->lock);
1258 nvmet_subsys_put(subsys);
1259 out:
1260 return ctrl;
1261 }
1262
nvmet_check_ctrl_status(struct nvmet_req * req)1263 u16 nvmet_check_ctrl_status(struct nvmet_req *req)
1264 {
1265 if (unlikely(!(req->sq->ctrl->cc & NVME_CC_ENABLE))) {
1266 pr_err("got cmd %d while CC.EN == 0 on qid = %d\n",
1267 req->cmd->common.opcode, req->sq->qid);
1268 return NVME_SC_CMD_SEQ_ERROR | NVME_SC_DNR;
1269 }
1270
1271 if (unlikely(!(req->sq->ctrl->csts & NVME_CSTS_RDY))) {
1272 pr_err("got cmd %d while CSTS.RDY == 0 on qid = %d\n",
1273 req->cmd->common.opcode, req->sq->qid);
1274 return NVME_SC_CMD_SEQ_ERROR | NVME_SC_DNR;
1275 }
1276 return 0;
1277 }
1278
nvmet_host_allowed(struct nvmet_subsys * subsys,const char * hostnqn)1279 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn)
1280 {
1281 struct nvmet_host_link *p;
1282
1283 lockdep_assert_held(&nvmet_config_sem);
1284
1285 if (subsys->allow_any_host)
1286 return true;
1287
1288 if (subsys->type == NVME_NQN_DISC) /* allow all access to disc subsys */
1289 return true;
1290
1291 list_for_each_entry(p, &subsys->hosts, entry) {
1292 if (!strcmp(nvmet_host_name(p->host), hostnqn))
1293 return true;
1294 }
1295
1296 return false;
1297 }
1298
1299 /*
1300 * Note: ctrl->subsys->lock should be held when calling this function
1301 */
nvmet_setup_p2p_ns_map(struct nvmet_ctrl * ctrl,struct nvmet_req * req)1302 static void nvmet_setup_p2p_ns_map(struct nvmet_ctrl *ctrl,
1303 struct nvmet_req *req)
1304 {
1305 struct nvmet_ns *ns;
1306 unsigned long idx;
1307
1308 if (!req->p2p_client)
1309 return;
1310
1311 ctrl->p2p_client = get_device(req->p2p_client);
1312
1313 xa_for_each(&ctrl->subsys->namespaces, idx, ns)
1314 nvmet_p2pmem_ns_add_p2p(ctrl, ns);
1315 }
1316
1317 /*
1318 * Note: ctrl->subsys->lock should be held when calling this function
1319 */
nvmet_release_p2p_ns_map(struct nvmet_ctrl * ctrl)1320 static void nvmet_release_p2p_ns_map(struct nvmet_ctrl *ctrl)
1321 {
1322 struct radix_tree_iter iter;
1323 void __rcu **slot;
1324
1325 radix_tree_for_each_slot(slot, &ctrl->p2p_ns_map, &iter, 0)
1326 pci_dev_put(radix_tree_deref_slot(slot));
1327
1328 put_device(ctrl->p2p_client);
1329 }
1330
nvmet_fatal_error_handler(struct work_struct * work)1331 static void nvmet_fatal_error_handler(struct work_struct *work)
1332 {
1333 struct nvmet_ctrl *ctrl =
1334 container_of(work, struct nvmet_ctrl, fatal_err_work);
1335
1336 pr_err("ctrl %d fatal error occurred!\n", ctrl->cntlid);
1337 ctrl->ops->delete_ctrl(ctrl);
1338 }
1339
nvmet_alloc_ctrl(const char * subsysnqn,const char * hostnqn,struct nvmet_req * req,u32 kato,struct nvmet_ctrl ** ctrlp)1340 u16 nvmet_alloc_ctrl(const char *subsysnqn, const char *hostnqn,
1341 struct nvmet_req *req, u32 kato, struct nvmet_ctrl **ctrlp)
1342 {
1343 struct nvmet_subsys *subsys;
1344 struct nvmet_ctrl *ctrl;
1345 int ret;
1346 u16 status;
1347
1348 status = NVME_SC_CONNECT_INVALID_PARAM | NVME_SC_DNR;
1349 subsys = nvmet_find_get_subsys(req->port, subsysnqn);
1350 if (!subsys) {
1351 pr_warn("connect request for invalid subsystem %s!\n",
1352 subsysnqn);
1353 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn);
1354 req->error_loc = offsetof(struct nvme_common_command, dptr);
1355 goto out;
1356 }
1357
1358 down_read(&nvmet_config_sem);
1359 if (!nvmet_host_allowed(subsys, hostnqn)) {
1360 pr_info("connect by host %s for subsystem %s not allowed\n",
1361 hostnqn, subsysnqn);
1362 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(hostnqn);
1363 up_read(&nvmet_config_sem);
1364 status = NVME_SC_CONNECT_INVALID_HOST | NVME_SC_DNR;
1365 req->error_loc = offsetof(struct nvme_common_command, dptr);
1366 goto out_put_subsystem;
1367 }
1368 up_read(&nvmet_config_sem);
1369
1370 status = NVME_SC_INTERNAL;
1371 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1372 if (!ctrl)
1373 goto out_put_subsystem;
1374 mutex_init(&ctrl->lock);
1375
1376 ctrl->port = req->port;
1377
1378 INIT_WORK(&ctrl->async_event_work, nvmet_async_event_work);
1379 INIT_LIST_HEAD(&ctrl->async_events);
1380 INIT_RADIX_TREE(&ctrl->p2p_ns_map, GFP_KERNEL);
1381 INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler);
1382 INIT_DELAYED_WORK(&ctrl->ka_work, nvmet_keep_alive_timer);
1383
1384 memcpy(ctrl->subsysnqn, subsysnqn, NVMF_NQN_SIZE);
1385 memcpy(ctrl->hostnqn, hostnqn, NVMF_NQN_SIZE);
1386
1387 kref_init(&ctrl->ref);
1388 ctrl->subsys = subsys;
1389 nvmet_init_cap(ctrl);
1390 WRITE_ONCE(ctrl->aen_enabled, NVMET_AEN_CFG_OPTIONAL);
1391
1392 ctrl->changed_ns_list = kmalloc_array(NVME_MAX_CHANGED_NAMESPACES,
1393 sizeof(__le32), GFP_KERNEL);
1394 if (!ctrl->changed_ns_list)
1395 goto out_free_ctrl;
1396
1397 ctrl->sqs = kcalloc(subsys->max_qid + 1,
1398 sizeof(struct nvmet_sq *),
1399 GFP_KERNEL);
1400 if (!ctrl->sqs)
1401 goto out_free_changed_ns_list;
1402
1403 if (subsys->cntlid_min > subsys->cntlid_max)
1404 goto out_free_sqs;
1405
1406 ret = ida_simple_get(&cntlid_ida,
1407 subsys->cntlid_min, subsys->cntlid_max,
1408 GFP_KERNEL);
1409 if (ret < 0) {
1410 status = NVME_SC_CONNECT_CTRL_BUSY | NVME_SC_DNR;
1411 goto out_free_sqs;
1412 }
1413 ctrl->cntlid = ret;
1414
1415 ctrl->ops = req->ops;
1416
1417 /*
1418 * Discovery controllers may use some arbitrary high value
1419 * in order to cleanup stale discovery sessions
1420 */
1421 if ((ctrl->subsys->type == NVME_NQN_DISC) && !kato)
1422 kato = NVMET_DISC_KATO_MS;
1423
1424 /* keep-alive timeout in seconds */
1425 ctrl->kato = DIV_ROUND_UP(kato, 1000);
1426
1427 ctrl->err_counter = 0;
1428 spin_lock_init(&ctrl->error_lock);
1429
1430 nvmet_start_keep_alive_timer(ctrl);
1431
1432 mutex_lock(&subsys->lock);
1433 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
1434 nvmet_setup_p2p_ns_map(ctrl, req);
1435 mutex_unlock(&subsys->lock);
1436
1437 *ctrlp = ctrl;
1438 return 0;
1439
1440 out_free_sqs:
1441 kfree(ctrl->sqs);
1442 out_free_changed_ns_list:
1443 kfree(ctrl->changed_ns_list);
1444 out_free_ctrl:
1445 kfree(ctrl);
1446 out_put_subsystem:
1447 nvmet_subsys_put(subsys);
1448 out:
1449 return status;
1450 }
1451
nvmet_ctrl_free(struct kref * ref)1452 static void nvmet_ctrl_free(struct kref *ref)
1453 {
1454 struct nvmet_ctrl *ctrl = container_of(ref, struct nvmet_ctrl, ref);
1455 struct nvmet_subsys *subsys = ctrl->subsys;
1456
1457 mutex_lock(&subsys->lock);
1458 nvmet_release_p2p_ns_map(ctrl);
1459 list_del(&ctrl->subsys_entry);
1460 mutex_unlock(&subsys->lock);
1461
1462 nvmet_stop_keep_alive_timer(ctrl);
1463
1464 flush_work(&ctrl->async_event_work);
1465 cancel_work_sync(&ctrl->fatal_err_work);
1466
1467 ida_simple_remove(&cntlid_ida, ctrl->cntlid);
1468
1469 nvmet_async_events_free(ctrl);
1470 kfree(ctrl->sqs);
1471 kfree(ctrl->changed_ns_list);
1472 kfree(ctrl);
1473
1474 nvmet_subsys_put(subsys);
1475 }
1476
nvmet_ctrl_put(struct nvmet_ctrl * ctrl)1477 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl)
1478 {
1479 kref_put(&ctrl->ref, nvmet_ctrl_free);
1480 }
1481
nvmet_ctrl_fatal_error(struct nvmet_ctrl * ctrl)1482 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl)
1483 {
1484 mutex_lock(&ctrl->lock);
1485 if (!(ctrl->csts & NVME_CSTS_CFS)) {
1486 ctrl->csts |= NVME_CSTS_CFS;
1487 queue_work(nvmet_wq, &ctrl->fatal_err_work);
1488 }
1489 mutex_unlock(&ctrl->lock);
1490 }
1491 EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error);
1492
nvmet_find_get_subsys(struct nvmet_port * port,const char * subsysnqn)1493 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port,
1494 const char *subsysnqn)
1495 {
1496 struct nvmet_subsys_link *p;
1497
1498 if (!port)
1499 return NULL;
1500
1501 if (!strcmp(NVME_DISC_SUBSYS_NAME, subsysnqn)) {
1502 if (!kref_get_unless_zero(&nvmet_disc_subsys->ref))
1503 return NULL;
1504 return nvmet_disc_subsys;
1505 }
1506
1507 down_read(&nvmet_config_sem);
1508 list_for_each_entry(p, &port->subsystems, entry) {
1509 if (!strncmp(p->subsys->subsysnqn, subsysnqn,
1510 NVMF_NQN_SIZE)) {
1511 if (!kref_get_unless_zero(&p->subsys->ref))
1512 break;
1513 up_read(&nvmet_config_sem);
1514 return p->subsys;
1515 }
1516 }
1517 up_read(&nvmet_config_sem);
1518 return NULL;
1519 }
1520
nvmet_subsys_alloc(const char * subsysnqn,enum nvme_subsys_type type)1521 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn,
1522 enum nvme_subsys_type type)
1523 {
1524 struct nvmet_subsys *subsys;
1525 char serial[NVMET_SN_MAX_SIZE / 2];
1526 int ret;
1527
1528 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
1529 if (!subsys)
1530 return ERR_PTR(-ENOMEM);
1531
1532 subsys->ver = NVMET_DEFAULT_VS;
1533 /* generate a random serial number as our controllers are ephemeral: */
1534 get_random_bytes(&serial, sizeof(serial));
1535 bin2hex(subsys->serial, &serial, sizeof(serial));
1536
1537 subsys->model_number = kstrdup(NVMET_DEFAULT_CTRL_MODEL, GFP_KERNEL);
1538 if (!subsys->model_number) {
1539 ret = -ENOMEM;
1540 goto free_subsys;
1541 }
1542
1543 switch (type) {
1544 case NVME_NQN_NVME:
1545 subsys->max_qid = NVMET_NR_QUEUES;
1546 break;
1547 case NVME_NQN_DISC:
1548 subsys->max_qid = 0;
1549 break;
1550 default:
1551 pr_err("%s: Unknown Subsystem type - %d\n", __func__, type);
1552 ret = -EINVAL;
1553 goto free_mn;
1554 }
1555 subsys->type = type;
1556 subsys->subsysnqn = kstrndup(subsysnqn, NVMF_NQN_SIZE,
1557 GFP_KERNEL);
1558 if (!subsys->subsysnqn) {
1559 ret = -ENOMEM;
1560 goto free_mn;
1561 }
1562 subsys->cntlid_min = NVME_CNTLID_MIN;
1563 subsys->cntlid_max = NVME_CNTLID_MAX;
1564 kref_init(&subsys->ref);
1565
1566 mutex_init(&subsys->lock);
1567 xa_init(&subsys->namespaces);
1568 INIT_LIST_HEAD(&subsys->ctrls);
1569 INIT_LIST_HEAD(&subsys->hosts);
1570
1571 return subsys;
1572
1573 free_mn:
1574 kfree(subsys->model_number);
1575 free_subsys:
1576 kfree(subsys);
1577 return ERR_PTR(ret);
1578 }
1579
nvmet_subsys_free(struct kref * ref)1580 static void nvmet_subsys_free(struct kref *ref)
1581 {
1582 struct nvmet_subsys *subsys =
1583 container_of(ref, struct nvmet_subsys, ref);
1584
1585 WARN_ON_ONCE(!xa_empty(&subsys->namespaces));
1586
1587 xa_destroy(&subsys->namespaces);
1588 nvmet_passthru_subsys_free(subsys);
1589
1590 kfree(subsys->subsysnqn);
1591 kfree(subsys->model_number);
1592 kfree(subsys);
1593 }
1594
nvmet_subsys_del_ctrls(struct nvmet_subsys * subsys)1595 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys)
1596 {
1597 struct nvmet_ctrl *ctrl;
1598
1599 mutex_lock(&subsys->lock);
1600 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry)
1601 ctrl->ops->delete_ctrl(ctrl);
1602 mutex_unlock(&subsys->lock);
1603 }
1604
nvmet_subsys_put(struct nvmet_subsys * subsys)1605 void nvmet_subsys_put(struct nvmet_subsys *subsys)
1606 {
1607 kref_put(&subsys->ref, nvmet_subsys_free);
1608 }
1609
nvmet_init(void)1610 static int __init nvmet_init(void)
1611 {
1612 int error = -ENOMEM;
1613
1614 nvmet_ana_group_enabled[NVMET_DEFAULT_ANA_GRPID] = 1;
1615
1616 nvmet_bvec_cache = kmem_cache_create("nvmet-bvec",
1617 NVMET_MAX_MPOOL_BVEC * sizeof(struct bio_vec), 0,
1618 SLAB_HWCACHE_ALIGN, NULL);
1619 if (!nvmet_bvec_cache)
1620 return -ENOMEM;
1621
1622 zbd_wq = alloc_workqueue("nvmet-zbd-wq", WQ_MEM_RECLAIM, 0);
1623 if (!zbd_wq)
1624 goto out_destroy_bvec_cache;
1625
1626 buffered_io_wq = alloc_workqueue("nvmet-buffered-io-wq",
1627 WQ_MEM_RECLAIM, 0);
1628 if (!buffered_io_wq)
1629 goto out_free_zbd_work_queue;
1630
1631 nvmet_wq = alloc_workqueue("nvmet-wq", WQ_MEM_RECLAIM, 0);
1632 if (!nvmet_wq)
1633 goto out_free_buffered_work_queue;
1634
1635 error = nvmet_init_discovery();
1636 if (error)
1637 goto out_free_nvmet_work_queue;
1638
1639 error = nvmet_init_configfs();
1640 if (error)
1641 goto out_exit_discovery;
1642 return 0;
1643
1644 out_exit_discovery:
1645 nvmet_exit_discovery();
1646 out_free_nvmet_work_queue:
1647 destroy_workqueue(nvmet_wq);
1648 out_free_buffered_work_queue:
1649 destroy_workqueue(buffered_io_wq);
1650 out_free_zbd_work_queue:
1651 destroy_workqueue(zbd_wq);
1652 out_destroy_bvec_cache:
1653 kmem_cache_destroy(nvmet_bvec_cache);
1654 return error;
1655 }
1656
nvmet_exit(void)1657 static void __exit nvmet_exit(void)
1658 {
1659 nvmet_exit_configfs();
1660 nvmet_exit_discovery();
1661 ida_destroy(&cntlid_ida);
1662 destroy_workqueue(nvmet_wq);
1663 destroy_workqueue(buffered_io_wq);
1664 destroy_workqueue(zbd_wq);
1665 kmem_cache_destroy(nvmet_bvec_cache);
1666
1667 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_entry) != 1024);
1668 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_hdr) != 1024);
1669 }
1670
1671 module_init(nvmet_init);
1672 module_exit(nvmet_exit);
1673
1674 MODULE_LICENSE("GPL v2");
1675 MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
1676