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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2016 Maxime Ripard
4  *
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
6  */
7 
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
10 #include <linux/device.h>
11 #include <linux/iopoll.h>
12 #include <linux/slab.h>
13 
14 #include "ccu_common.h"
15 #include "ccu_gate.h"
16 #include "ccu_reset.h"
17 
18 struct sunxi_ccu {
19 	const struct sunxi_ccu_desc	*desc;
20 	struct ccu_reset		reset;
21 };
22 
23 static DEFINE_SPINLOCK(ccu_lock);
24 
ccu_helper_wait_for_lock(struct ccu_common * common,u32 lock)25 void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
26 {
27 	void __iomem *addr;
28 	u32 reg;
29 
30 	if (!lock)
31 		return;
32 
33 	if (common->features & CCU_FEATURE_LOCK_REG)
34 		addr = common->base + common->lock_reg;
35 	else
36 		addr = common->base + common->reg;
37 
38 	WARN_ON(readl_relaxed_poll_timeout(addr, reg, reg & lock, 100, 70000));
39 }
40 
41 /*
42  * This clock notifier is called when the frequency of a PLL clock is
43  * changed. In common PLL designs, changes to the dividers take effect
44  * almost immediately, while changes to the multipliers (implemented
45  * as dividers in the feedback loop) take a few cycles to work into
46  * the feedback loop for the PLL to stablize.
47  *
48  * Sometimes when the PLL clock rate is changed, the decrease in the
49  * divider is too much for the decrease in the multiplier to catch up.
50  * The PLL clock rate will spike, and in some cases, might lock up
51  * completely.
52  *
53  * This notifier callback will gate and then ungate the clock,
54  * effectively resetting it, so it proceeds to work. Care must be
55  * taken to reparent consumers to other temporary clocks during the
56  * rate change, and that this notifier callback must be the first
57  * to be registered.
58  */
ccu_pll_notifier_cb(struct notifier_block * nb,unsigned long event,void * data)59 static int ccu_pll_notifier_cb(struct notifier_block *nb,
60 			       unsigned long event, void *data)
61 {
62 	struct ccu_pll_nb *pll = to_ccu_pll_nb(nb);
63 	int ret = 0;
64 
65 	if (event != POST_RATE_CHANGE)
66 		goto out;
67 
68 	ccu_gate_helper_disable(pll->common, pll->enable);
69 
70 	ret = ccu_gate_helper_enable(pll->common, pll->enable);
71 	if (ret)
72 		goto out;
73 
74 	ccu_helper_wait_for_lock(pll->common, pll->lock);
75 
76 out:
77 	return notifier_from_errno(ret);
78 }
79 
ccu_pll_notifier_register(struct ccu_pll_nb * pll_nb)80 int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb)
81 {
82 	pll_nb->clk_nb.notifier_call = ccu_pll_notifier_cb;
83 
84 	return clk_notifier_register(pll_nb->common->hw.clk,
85 				     &pll_nb->clk_nb);
86 }
87 
sunxi_ccu_probe(struct sunxi_ccu * ccu,struct device * dev,struct device_node * node,void __iomem * reg,const struct sunxi_ccu_desc * desc)88 static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev,
89 			   struct device_node *node, void __iomem *reg,
90 			   const struct sunxi_ccu_desc *desc)
91 {
92 	struct ccu_reset *reset;
93 	int i, ret;
94 
95 	ccu->desc = desc;
96 
97 	for (i = 0; i < desc->num_ccu_clks; i++) {
98 		struct ccu_common *cclk = desc->ccu_clks[i];
99 
100 		if (!cclk)
101 			continue;
102 
103 		cclk->base = reg;
104 		cclk->lock = &ccu_lock;
105 	}
106 
107 	for (i = 0; i < desc->hw_clks->num ; i++) {
108 		struct clk_hw *hw = desc->hw_clks->hws[i];
109 		const char *name;
110 
111 		if (!hw)
112 			continue;
113 
114 		name = hw->init->name;
115 		if (dev)
116 			ret = clk_hw_register(dev, hw);
117 		else
118 			ret = of_clk_hw_register(node, hw);
119 		if (ret) {
120 			pr_err("Couldn't register clock %d - %s\n", i, name);
121 			goto err_clk_unreg;
122 		}
123 	}
124 
125 	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
126 				     desc->hw_clks);
127 	if (ret)
128 		goto err_clk_unreg;
129 
130 	reset = &ccu->reset;
131 	reset->rcdev.of_node = node;
132 	reset->rcdev.ops = &ccu_reset_ops;
133 	reset->rcdev.owner = dev ? dev->driver->owner : THIS_MODULE;
134 	reset->rcdev.nr_resets = desc->num_resets;
135 	reset->base = reg;
136 	reset->lock = &ccu_lock;
137 	reset->reset_map = desc->resets;
138 
139 	ret = reset_controller_register(&reset->rcdev);
140 	if (ret)
141 		goto err_del_provider;
142 
143 	return 0;
144 
145 err_del_provider:
146 	of_clk_del_provider(node);
147 err_clk_unreg:
148 	while (--i >= 0) {
149 		struct clk_hw *hw = desc->hw_clks->hws[i];
150 
151 		if (!hw)
152 			continue;
153 		clk_hw_unregister(hw);
154 	}
155 	return ret;
156 }
157 
devm_sunxi_ccu_release(struct device * dev,void * res)158 static void devm_sunxi_ccu_release(struct device *dev, void *res)
159 {
160 	struct sunxi_ccu *ccu = res;
161 	const struct sunxi_ccu_desc *desc = ccu->desc;
162 	int i;
163 
164 	reset_controller_unregister(&ccu->reset.rcdev);
165 	of_clk_del_provider(dev->of_node);
166 
167 	for (i = 0; i < desc->hw_clks->num; i++) {
168 		struct clk_hw *hw = desc->hw_clks->hws[i];
169 
170 		if (!hw)
171 			continue;
172 		clk_hw_unregister(hw);
173 	}
174 }
175 
devm_sunxi_ccu_probe(struct device * dev,void __iomem * reg,const struct sunxi_ccu_desc * desc)176 int devm_sunxi_ccu_probe(struct device *dev, void __iomem *reg,
177 			 const struct sunxi_ccu_desc *desc)
178 {
179 	struct sunxi_ccu *ccu;
180 	int ret;
181 
182 	ccu = devres_alloc(devm_sunxi_ccu_release, sizeof(*ccu), GFP_KERNEL);
183 	if (!ccu)
184 		return -ENOMEM;
185 
186 	ret = sunxi_ccu_probe(ccu, dev, dev->of_node, reg, desc);
187 	if (ret) {
188 		devres_free(ccu);
189 		return ret;
190 	}
191 
192 	devres_add(dev, ccu);
193 
194 	return 0;
195 }
196 
of_sunxi_ccu_probe(struct device_node * node,void __iomem * reg,const struct sunxi_ccu_desc * desc)197 void of_sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
198 			const struct sunxi_ccu_desc *desc)
199 {
200 	struct sunxi_ccu *ccu;
201 	int ret;
202 
203 	ccu = kzalloc(sizeof(*ccu), GFP_KERNEL);
204 	if (!ccu)
205 		return;
206 
207 	ret = sunxi_ccu_probe(ccu, NULL, node, reg, desc);
208 	if (ret) {
209 		pr_err("%pOF: probing clocks failed: %d\n", node, ret);
210 		kfree(ccu);
211 	}
212 }
213