/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_hwseq.c | 96 struct pipe_ctx *pipe_ctx, in dcn20_setup_gsl_group_as_lock() 176 struct pipe_ctx *pipe_ctx, in dcn20_set_flip_control_gsl() 263 struct pipe_ctx *pipe_ctx, in dcn20_program_triple_buffer() 567 void dcn20_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn20_plane_atomic_disable() 602 void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn20_disable_plane() 639 struct pipe_ctx *pipe_ctx, in dcn20_enable_stream_timing() 766 struct pipe_ctx *pipe_ctx, in dcn20_program_output_csc() 793 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dcn20_set_output_transfer_func() 833 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_blend_lut() 855 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_shaper_3dlut() [all …]
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D | dcn20_resource.c | 1592 struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() 1635 static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in build_pipe_hw_param() 1657 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in dcn20_build_mapped_resource() local 1729 struct pipe_ctx *pipe_ctx = &dc_ctx->res_ctx.pipe_ctx[i]; in dcn20_add_dsc_to_stream_resource() local 1755 struct pipe_ctx *pipe_ctx = NULL; in remove_dsc_from_stream_resource() local 2457 struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[i]; in dcn20_validate_dsc() local
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/drivers/gpu/drm/amd/display/dc/dce110/ |
D | dce110_hw_sequencer.c | 282 dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_input_transfer_func() 610 dce110_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_output_transfer_func() 635 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx) in dce110_update_info_frame() 661 void dce110_enable_stream(struct pipe_ctx *pipe_ctx) in dce110_enable_stream() 1083 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx) in dce110_enable_audio_stream() 1120 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx) in dce110_disable_audio_stream() 1158 void dce110_disable_stream(struct pipe_ctx *pipe_ctx) in dce110_disable_stream() 1184 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx, in dce110_unblank_stream() 1204 void dce110_blank_stream(struct pipe_ctx *pipe_ctx) in dce110_blank_stream() 1231 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable) in dce110_set_avmute() [all …]
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D | dce110_resource.c | 883 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() 917 void dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in dce110_resource_build_pipe_hw_param() 929 static bool is_surface_pixel_format_supported(struct pipe_ctx *pipe_ctx, unsigned int underlay_idx) in is_surface_pixel_format_supported() 945 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in build_mapped_resource() local 1130 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx]; in dce110_acquire_underlay() local
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/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hw_sequencer.c | 97 struct pipe_ctx *pipe_ctx; in dcn10_lock_all_pipes() local 472 bool dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn10_did_underflow_occur() 834 struct pipe_ctx *pipe_ctx, in dcn10_enable_stream_timing() 928 struct pipe_ctx *pipe_ctx, in dcn10_reset_back_end_for_pipe() 1006 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local 1031 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local 1044 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local 1054 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local 1066 struct pipe_ctx *pipe_ctx = in dcn10_hw_wa_force_recovery() local 1104 void dcn10_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn10_plane_atomic_disconnect() [all …]
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D | dcn10_resource.c | 1066 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() 1100 static void build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in build_pipe_hw_param() 1122 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in build_mapped_resource() local
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/drivers/gpu/drm/amd/display/dc/dce60/ |
D | dce60_hw_sequencer.c | 55 struct pipe_ctx *pipe_ctx = NULL; in dce60_should_enable_fbc() local 124 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in dce60_enable_fbc() local 143 static void dce60_set_default_colors(struct pipe_ctx *pipe_ctx) in dce60_set_default_colors() 182 struct pipe_ctx *pipe_ctx) in dce60_program_surface_visibility() 197 static void dce60_get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx, in dce60_get_surface_visual_confirm_color() 233 const struct pipe_ctx *pipe_ctx) in dce60_program_scaler() 271 struct dc *dc, struct pipe_ctx *pipe_ctx) in dce60_program_front_end_for_pipe() 396 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dce60_apply_ctx_for_surface() local
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/drivers/gpu/drm/amd/display/dc/inc/ |
D | core_types.h | 346 struct pipe_ctx { struct 359 struct pipe_ctx *top_pipe; argument 360 struct pipe_ctx *bottom_pipe; argument 361 struct pipe_ctx *next_odm_pipe; argument 362 struct pipe_ctx *prev_odm_pipe; argument 379 struct pipe_ctx pipe_ctx[MAX_PIPES]; argument
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/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_link.c | 1684 static void enable_stream_features(struct pipe_ctx *pipe_ctx) in enable_stream_features() 1714 struct pipe_ctx *pipe_ctx) in enable_link_dp() 1796 struct pipe_ctx *pipe_ctx) in enable_link_edp() 1807 struct pipe_ctx *pipe_ctx) in enable_link_dp_mst() 1831 static bool get_ext_hdmi_settings(struct pipe_ctx *pipe_ctx, in get_ext_hdmi_settings() 1928 static bool i2c_write(struct pipe_ctx *pipe_ctx, in i2c_write() 1955 struct pipe_ctx *pipe_ctx, in write_i2c_retimer_setting() 2117 struct pipe_ctx *pipe_ctx, in write_i2c_default_retimer_setting() 2240 struct pipe_ctx *pipe_ctx, in write_i2c_redriver_setting() 2307 static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) in enable_link_hdmi() [all …]
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D | dc_resource.c | 569 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing() 691 static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *split_count, int *split… in calculate_split_count_and_index() 719 static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) in calculate_viewport_size() 734 static void calculate_recout(struct pipe_ctx *pipe_ctx) in calculate_recout() 808 static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx) in calculate_scaling_ratios() 924 static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx) in calculate_inits_and_viewports() 1021 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) in resource_build_scaling_params() 1453 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dc_remove_plane_from_context() local 1702 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in acquire_first_free_pipe() local 1958 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; in acquire_resource_from_hw_enabled_state() local [all …]
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D | dc_link_hwss.c | 415 bool dp_set_dsc_on_rx(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_on_rx() 431 void dp_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_on_stream() 514 bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_enable() 538 bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_pps_sdp() 582 bool dp_update_dsc_config(struct pipe_ctx *pipe_ctx) in dp_update_dsc_config()
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D | dc_hw_sequencer.c | 296 struct pipe_ctx *pipe_ctx, in get_mpctree_visual_confirm_color() 317 const struct pipe_ctx *pipe_ctx, in get_surface_visual_confirm_color() 367 struct pipe_ctx *pipe_ctx, in get_hdr_visual_confirm_color() 408 struct pipe_ctx *pipe_ctx, in get_surface_tile_visual_confirm_color()
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D | dc.c | 584 struct pipe_ctx *pipe_ctx; in dc_stream_set_dyn_expansion() local 951 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in apply_ctx_interdependent_lock() local 1496 struct pipe_ctx *pipe_ctx, in should_update_pipe_for_stream() 1504 struct pipe_ctx *pipe_ctx, in should_update_pipe_for_plane() 1958 const struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in is_surface_in_context() local 2651 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in update_planes_and_stream_state() local 2690 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_do_stream_update() local 2830 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local 2906 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local 2928 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; in commit_planes_for_stream() local [all …]
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D | dc_stream.c | 264 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes() local 364 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_position() local 591 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in dc_stream_send_dp_sdp() local 664 struct pipe_ctx *pipe_ctx = NULL; in dc_stream_set_dynamic_metadata() local
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D | dc_debug.c | 319 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local 331 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
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D | dc_surface.c | 151 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local 163 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
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D | dc_link_dp.c | 1775 struct pipe_ctx *pipe_ctx, in perform_link_training_with_retries() 2985 struct pipe_ctx *pipe_ctx = NULL; in dp_test_send_link_test_pattern() local 3102 struct pipe_ctx *pipe_ctx = &pipes[0]; in dp_test_get_audio_test_data() local 3232 struct pipe_ctx *pipe_ctx; in dc_link_dp_handle_link_loss() local 4188 struct pipe_ctx *pipe_ctx, in set_crtc_test_pattern() 4364 struct pipe_ctx *pipe_ctx = NULL; in dc_link_dp_set_test_pattern() local
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_hwseq.c | 72 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn30_set_blend_lut() 93 struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream) in dcn30_set_mpc_shaper_3dlut() 145 struct pipe_ctx *pipe_ctx, in dcn30_set_input_transfer_func() 188 struct pipe_ctx *pipe_ctx, in dcn30_set_output_transfer_func() 399 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i_pipe]; in dcn30_program_all_writeback_pipes_in_tree() local 671 void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable) in dcn30_set_avmute() 682 void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx) in dcn30_update_info_frame() 708 void dcn30_program_dmdata_engine(struct pipe_ctx *pipe_ctx) in dcn30_program_dmdata_engine() 974 struct pipe_ctx *pipe_ctx, in dcn30_set_disp_pattern_generator()
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/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hwseq.c | 129 void dcn21_PLAT_58856_wa(struct dc_state *context, struct pipe_ctx *pipe_ctx) in dcn21_PLAT_58856_wa() 162 void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx) in dcn21_set_abm_immediate_disable() 182 void dcn21_set_pipe(struct pipe_ctx *pipe_ctx) in dcn21_set_pipe() 198 bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx, in dcn21_set_backlight_level() 238 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn21_is_abm_supported() local
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/drivers/gpu/drm/amd/display/dc/basics/ |
D | dc_common.c | 52 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_lower_pipe_tree_visible() 61 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_upper_pipe_tree_visible() 70 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_pipe_tree_visible()
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/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_hwseq.c | 384 void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) in dcn31_update_info_frame() 503 struct pipe_ctx *pipe_ctx, in dcn31_reset_back_end_for_pipe() 578 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn31_reset_hw_ctx_wrap() local 605 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn31_is_abm_supported() local
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_debugfs.c | 1305 struct pipe_ctx *pipe_ctx; in dp_dsc_clock_en_read() local 1390 struct pipe_ctx *pipe_ctx; in dp_dsc_clock_en_write() local 1496 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_width_read() local 1575 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_width_write() local 1685 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_height_read() local 1768 struct pipe_ctx *pipe_ctx; in dp_dsc_slice_height_write() local 1870 struct pipe_ctx *pipe_ctx; in dp_dsc_bits_per_pixel_read() local 1950 struct pipe_ctx *pipe_ctx; in dp_dsc_bits_per_pixel_write() local 2050 struct pipe_ctx *pipe_ctx; in dp_dsc_pic_width_read() local 2111 struct pipe_ctx *pipe_ctx; in dp_dsc_pic_height_read() local [all …]
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/drivers/gpu/drm/amd/display/dc/ |
D | dc_trace.h | 26 #define TRACE_DC_PIPE_STATE(pipe_ctx, index, max_pipes) \ argument
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 144 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist() local 175 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist() local
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
D | rv1_clk_mgr.c | 167 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in ramp_up_dispclk_with_dpp() local
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