1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* QLogic qed NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #ifndef _QED_DEV_API_H 8 #define _QED_DEV_API_H 9 10 #include <linux/types.h> 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/qed/qed_chain.h> 14 #include <linux/qed/qed_if.h> 15 #include "qed_int.h" 16 17 /** 18 * qed_init_dp(): Initialize the debug level. 19 * 20 * @cdev: Qed dev pointer. 21 * @dp_module: Module debug parameter. 22 * @dp_level: Module debug level. 23 * 24 * Return: Void. 25 */ 26 void qed_init_dp(struct qed_dev *cdev, 27 u32 dp_module, 28 u8 dp_level); 29 30 /** 31 * qed_init_struct(): Initialize the device structure to 32 * its defaults. 33 * 34 * @cdev: Qed dev pointer. 35 * 36 * Return: Void. 37 */ 38 void qed_init_struct(struct qed_dev *cdev); 39 40 /** 41 * qed_resc_free: Free device resources. 42 * 43 * @cdev: Qed dev pointer. 44 * 45 * Return: Void. 46 */ 47 void qed_resc_free(struct qed_dev *cdev); 48 49 /** 50 * qed_resc_alloc(): Alloc device resources. 51 * 52 * @cdev: Qed dev pointer. 53 * 54 * Return: Int. 55 */ 56 int qed_resc_alloc(struct qed_dev *cdev); 57 58 /** 59 * qed_resc_setup(): Setup device resources. 60 * 61 * @cdev: Qed dev pointer. 62 * 63 * Return: Void. 64 */ 65 void qed_resc_setup(struct qed_dev *cdev); 66 67 enum qed_override_force_load { 68 QED_OVERRIDE_FORCE_LOAD_NONE, 69 QED_OVERRIDE_FORCE_LOAD_ALWAYS, 70 QED_OVERRIDE_FORCE_LOAD_NEVER, 71 }; 72 73 struct qed_drv_load_params { 74 /* Indicates whether the driver is running over a crash kernel. 75 * As part of the load request, this will be used for providing the 76 * driver role to the MFW. 77 * In case of a crash kernel over PDA - this should be set to false. 78 */ 79 bool is_crash_kernel; 80 81 /* The timeout value that the MFW should use when locking the engine for 82 * the driver load process. 83 * A value of '0' means the default value, and '255' means no timeout. 84 */ 85 u8 mfw_timeout_val; 86 #define QED_LOAD_REQ_LOCK_TO_DEFAULT 0 87 #define QED_LOAD_REQ_LOCK_TO_NONE 255 88 89 /* Avoid engine reset when first PF loads on it */ 90 bool avoid_eng_reset; 91 92 /* Allow overriding the default force load behavior */ 93 enum qed_override_force_load override_force_load; 94 }; 95 96 struct qed_hw_init_params { 97 /* Tunneling parameters */ 98 struct qed_tunnel_info *p_tunn; 99 100 bool b_hw_start; 101 102 /* Interrupt mode [msix, inta, etc.] to use */ 103 enum qed_int_mode int_mode; 104 105 /* NPAR tx switching to be used for vports for tx-switching */ 106 bool allow_npar_tx_switch; 107 108 /* Binary fw data pointer in binary fw file */ 109 const u8 *bin_fw_data; 110 111 /* Driver load parameters */ 112 struct qed_drv_load_params *p_drv_load_params; 113 }; 114 115 /** 116 * qed_hw_init(): Init Qed hardware. 117 * 118 * @cdev: Qed dev pointer. 119 * @p_params: Pointers to params. 120 * 121 * Return: Int. 122 */ 123 int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params); 124 125 /** 126 * qed_hw_timers_stop_all(): Stop the timers HW block. 127 * 128 * @cdev: Qed dev pointer. 129 * 130 * Return: void. 131 */ 132 void qed_hw_timers_stop_all(struct qed_dev *cdev); 133 134 /** 135 * qed_hw_stop(): Stop Qed hardware. 136 * 137 * @cdev: Qed dev pointer. 138 * 139 * Return: int. 140 */ 141 int qed_hw_stop(struct qed_dev *cdev); 142 143 /** 144 * qed_hw_stop_fastpath(): Should be called incase 145 * slowpath is still required for the device, 146 * but fastpath is not. 147 * 148 * @cdev: Qed dev pointer. 149 * 150 * Return: Int. 151 */ 152 int qed_hw_stop_fastpath(struct qed_dev *cdev); 153 154 /** 155 * qed_hw_start_fastpath(): Restart fastpath traffic, 156 * only if hw_stop_fastpath was called. 157 * 158 * @p_hwfn: HW device data. 159 * 160 * Return: Int. 161 */ 162 int qed_hw_start_fastpath(struct qed_hwfn *p_hwfn); 163 164 165 /** 166 * qed_hw_prepare(): Prepare Qed hardware. 167 * 168 * @cdev: Qed dev pointer. 169 * @personality: Personality to initialize. 170 * 171 * Return: Int. 172 */ 173 int qed_hw_prepare(struct qed_dev *cdev, 174 int personality); 175 176 /** 177 * qed_hw_remove(): Remove Qed hardware. 178 * 179 * @cdev: Qed dev pointer. 180 * 181 * Return: Void. 182 */ 183 void qed_hw_remove(struct qed_dev *cdev); 184 185 /** 186 * qed_ptt_acquire(): Allocate a PTT window. 187 * 188 * @p_hwfn: HW device data. 189 * 190 * Return: struct qed_ptt. 191 * 192 * Should be called at the entry point to the driver (at the beginning of an 193 * exported function). 194 */ 195 struct qed_ptt *qed_ptt_acquire(struct qed_hwfn *p_hwfn); 196 197 /** 198 * qed_ptt_acquire_context(): Allocate a PTT window honoring the context 199 * atomicy. 200 * 201 * @p_hwfn: HW device data. 202 * @is_atomic: Hint from the caller - if the func can sleep or not. 203 * 204 * Context: The function should not sleep in case is_atomic == true. 205 * Return: struct qed_ptt. 206 * 207 * Should be called at the entry point to the driver 208 * (at the beginning of an exported function). 209 */ 210 struct qed_ptt *qed_ptt_acquire_context(struct qed_hwfn *p_hwfn, 211 bool is_atomic); 212 213 /** 214 * qed_ptt_release(): Release PTT Window. 215 * 216 * @p_hwfn: HW device data. 217 * @p_ptt: P_ptt. 218 * 219 * Return: Void. 220 * 221 * Should be called at the end of a flow - at the end of the function that 222 * acquired the PTT. 223 */ 224 void qed_ptt_release(struct qed_hwfn *p_hwfn, 225 struct qed_ptt *p_ptt); 226 void qed_reset_vport_stats(struct qed_dev *cdev); 227 228 enum qed_dmae_address_type_t { 229 QED_DMAE_ADDRESS_HOST_VIRT, 230 QED_DMAE_ADDRESS_HOST_PHYS, 231 QED_DMAE_ADDRESS_GRC 232 }; 233 234 /** 235 * qed_dmae_host2grc(): Copy data from source addr to 236 * dmae registers using the given ptt. 237 * 238 * @p_hwfn: HW device data. 239 * @p_ptt: P_ptt. 240 * @source_addr: Source address. 241 * @grc_addr: GRC address (dmae_data_offset). 242 * @size_in_dwords: Size. 243 * @p_params: (default parameters will be used in case of NULL). 244 * 245 * Return: Int. 246 */ 247 int 248 qed_dmae_host2grc(struct qed_hwfn *p_hwfn, 249 struct qed_ptt *p_ptt, 250 u64 source_addr, 251 u32 grc_addr, 252 u32 size_in_dwords, 253 struct qed_dmae_params *p_params); 254 255 /** 256 * qed_dmae_grc2host(): Read data from dmae data offset 257 * to source address using the given ptt. 258 * 259 * @p_ptt: P_ptt. 260 * @grc_addr: GRC address (dmae_data_offset). 261 * @dest_addr: Destination Address. 262 * @size_in_dwords: Size. 263 * @p_params: (default parameters will be used in case of NULL). 264 * 265 * Return: Int. 266 */ 267 int qed_dmae_grc2host(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, 268 u32 grc_addr, dma_addr_t dest_addr, u32 size_in_dwords, 269 struct qed_dmae_params *p_params); 270 271 /** 272 * qed_dmae_host2host(): Copy data from to source address 273 * to a destination adrress (for SRIOV) using the given 274 * ptt. 275 * 276 * @p_hwfn: HW device data. 277 * @p_ptt: P_ptt. 278 * @source_addr: Source address. 279 * @dest_addr: Destination address. 280 * @size_in_dwords: size. 281 * @p_params: (default parameters will be used in case of NULL). 282 * 283 * Return: Int. 284 */ 285 int qed_dmae_host2host(struct qed_hwfn *p_hwfn, 286 struct qed_ptt *p_ptt, 287 dma_addr_t source_addr, 288 dma_addr_t dest_addr, 289 u32 size_in_dwords, struct qed_dmae_params *p_params); 290 291 int qed_chain_alloc(struct qed_dev *cdev, struct qed_chain *chain, 292 struct qed_chain_init_params *params); 293 void qed_chain_free(struct qed_dev *cdev, struct qed_chain *chain); 294 295 /** 296 * qed_fw_l2_queue(): Get absolute L2 queue ID. 297 * 298 * @p_hwfn: HW device data. 299 * @src_id: Relative to p_hwfn. 300 * @dst_id: Absolute per engine. 301 * 302 * Return: Int. 303 */ 304 int qed_fw_l2_queue(struct qed_hwfn *p_hwfn, 305 u16 src_id, 306 u16 *dst_id); 307 308 /** 309 * qed_fw_vport(): Get absolute vport ID. 310 * 311 * @p_hwfn: HW device data. 312 * @src_id: Relative to p_hwfn. 313 * @dst_id: Absolute per engine. 314 * 315 * Return: Int. 316 */ 317 int qed_fw_vport(struct qed_hwfn *p_hwfn, 318 u8 src_id, 319 u8 *dst_id); 320 321 /** 322 * qed_fw_rss_eng(): Get absolute RSS engine ID. 323 * 324 * @p_hwfn: HW device data. 325 * @src_id: Relative to p_hwfn. 326 * @dst_id: Absolute per engine. 327 * 328 * Return: Int. 329 */ 330 int qed_fw_rss_eng(struct qed_hwfn *p_hwfn, 331 u8 src_id, 332 u8 *dst_id); 333 334 /** 335 * qed_llh_get_num_ppfid(): Return the allocated number of LLH filter 336 * banks that are allocated to the PF. 337 * 338 * @cdev: Qed dev pointer. 339 * 340 * Return: u8 Number of LLH filter banks. 341 */ 342 u8 qed_llh_get_num_ppfid(struct qed_dev *cdev); 343 344 enum qed_eng { 345 QED_ENG0, 346 QED_ENG1, 347 QED_BOTH_ENG, 348 }; 349 350 /** 351 * qed_llh_set_ppfid_affinity(): Set the engine affinity for the given 352 * LLH filter bank. 353 * 354 * @cdev: Qed dev pointer. 355 * @ppfid: Relative within the allocated ppfids ('0' is the default one). 356 * @eng: Engine. 357 * 358 * Return: Int. 359 */ 360 int qed_llh_set_ppfid_affinity(struct qed_dev *cdev, 361 u8 ppfid, enum qed_eng eng); 362 363 /** 364 * qed_llh_set_roce_affinity(): Set the RoCE engine affinity. 365 * 366 * @cdev: Qed dev pointer. 367 * @eng: Engine. 368 * 369 * Return: Int. 370 */ 371 int qed_llh_set_roce_affinity(struct qed_dev *cdev, enum qed_eng eng); 372 373 /** 374 * qed_llh_add_mac_filter(): Add a LLH MAC filter into the given filter 375 * bank. 376 * 377 * @cdev: Qed dev pointer. 378 * @ppfid: Relative within the allocated ppfids ('0' is the default one). 379 * @mac_addr: MAC to add. 380 * 381 * Return: Int. 382 */ 383 int qed_llh_add_mac_filter(struct qed_dev *cdev, 384 u8 ppfid, const u8 mac_addr[ETH_ALEN]); 385 386 /** 387 * qed_llh_remove_mac_filter(): Remove a LLH MAC filter from the given 388 * filter bank. 389 * 390 * @cdev: Qed dev pointer. 391 * @ppfid: Ppfid. 392 * @mac_addr: MAC to remove 393 * 394 * Return: Void. 395 */ 396 void qed_llh_remove_mac_filter(struct qed_dev *cdev, 397 u8 ppfid, u8 mac_addr[ETH_ALEN]); 398 399 enum qed_llh_prot_filter_type_t { 400 QED_LLH_FILTER_ETHERTYPE, 401 QED_LLH_FILTER_TCP_SRC_PORT, 402 QED_LLH_FILTER_TCP_DEST_PORT, 403 QED_LLH_FILTER_TCP_SRC_AND_DEST_PORT, 404 QED_LLH_FILTER_UDP_SRC_PORT, 405 QED_LLH_FILTER_UDP_DEST_PORT, 406 QED_LLH_FILTER_UDP_SRC_AND_DEST_PORT 407 }; 408 409 /** 410 * qed_llh_add_protocol_filter(): Add a LLH protocol filter into the 411 * given filter bank. 412 * 413 * @cdev: Qed dev pointer. 414 * @ppfid: Relative within the allocated ppfids ('0' is the default one). 415 * @type: Type of filters and comparing. 416 * @source_port_or_eth_type: Source port or ethertype to add. 417 * @dest_port: Destination port to add. 418 * 419 * Return: Int. 420 */ 421 int 422 qed_llh_add_protocol_filter(struct qed_dev *cdev, 423 u8 ppfid, 424 enum qed_llh_prot_filter_type_t type, 425 u16 source_port_or_eth_type, u16 dest_port); 426 427 /** 428 * qed_llh_remove_protocol_filter(): Remove a LLH protocol filter from 429 * the given filter bank. 430 * 431 * @cdev: Qed dev pointer. 432 * @ppfid: Relative within the allocated ppfids ('0' is the default one). 433 * @type: Type of filters and comparing. 434 * @source_port_or_eth_type: Source port or ethertype to add. 435 * @dest_port: Destination port to add. 436 */ 437 void 438 qed_llh_remove_protocol_filter(struct qed_dev *cdev, 439 u8 ppfid, 440 enum qed_llh_prot_filter_type_t type, 441 u16 source_port_or_eth_type, u16 dest_port); 442 443 /** 444 * qed_final_cleanup(): Cleanup of previous driver remains prior to load. 445 * 446 * @p_hwfn: HW device data. 447 * @p_ptt: P_ptt. 448 * @id: For PF, engine-relative. For VF, PF-relative. 449 * @is_vf: True iff cleanup is made for a VF. 450 * 451 * Return: Int. 452 */ 453 int qed_final_cleanup(struct qed_hwfn *p_hwfn, 454 struct qed_ptt *p_ptt, u16 id, bool is_vf); 455 456 /** 457 * qed_get_queue_coalesce(): Retrieve coalesce value for a given queue. 458 * 459 * @p_hwfn: HW device data. 460 * @coal: Store coalesce value read from the hardware. 461 * @handle: P_handle. 462 * 463 * Return: Int. 464 **/ 465 int qed_get_queue_coalesce(struct qed_hwfn *p_hwfn, u16 *coal, void *handle); 466 467 /** 468 * qed_set_queue_coalesce(): Configure coalesce parameters for Rx and 469 * Tx queue. The fact that we can configure coalescing to up to 511, but on 470 * varying accuracy [the bigger the value the less accurate] up to a mistake 471 * of 3usec for the highest values. 472 * While the API allows setting coalescing per-qid, all queues sharing a SB 473 * should be in same range [i.e., either 0-0x7f, 0x80-0xff or 0x100-0x1ff] 474 * otherwise configuration would break. 475 * 476 * @rx_coal: Rx Coalesce value in micro seconds. 477 * @tx_coal: TX Coalesce value in micro seconds. 478 * @p_handle: P_handle. 479 * 480 * Return: Int. 481 **/ 482 int 483 qed_set_queue_coalesce(u16 rx_coal, u16 tx_coal, void *p_handle); 484 485 /** 486 * qed_pglueb_set_pfid_enable(): Enable or disable PCI BUS MASTER. 487 * 488 * @p_hwfn: HW device data. 489 * @p_ptt: P_ptt. 490 * @b_enable: True/False. 491 * 492 * Return: Int. 493 */ 494 int qed_pglueb_set_pfid_enable(struct qed_hwfn *p_hwfn, 495 struct qed_ptt *p_ptt, bool b_enable); 496 497 /** 498 * qed_db_recovery_add(): add doorbell information to the doorbell 499 * recovery mechanism. 500 * 501 * @cdev: Qed dev pointer. 502 * @db_addr: Doorbell address. 503 * @db_data: Address of where db_data is stored. 504 * @db_width: Doorbell is 32b pr 64b. 505 * @db_space: Doorbell recovery addresses are user or kernel space. 506 * 507 * Return: Int. 508 */ 509 int qed_db_recovery_add(struct qed_dev *cdev, 510 void __iomem *db_addr, 511 void *db_data, 512 enum qed_db_rec_width db_width, 513 enum qed_db_rec_space db_space); 514 515 /** 516 * qed_db_recovery_del() - remove doorbell information from the doorbell 517 * recovery mechanism. db_data serves as key (db_addr is not unique). 518 * 519 * @cdev: Qed dev pointer. 520 * @db_addr: doorbell address. 521 * @db_data: address where db_data is stored. Serves as key for the 522 * entry to delete. 523 * 524 * Return: Int. 525 */ 526 int qed_db_recovery_del(struct qed_dev *cdev, 527 void __iomem *db_addr, void *db_data); 528 529 530 const char *qed_hw_get_resc_name(enum qed_resources res_id); 531 #endif 532