1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Driver for 8250/16550-type serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2001 Russell King.
8 */
9
10 #include <linux/bits.h>
11 #include <linux/serial_8250.h>
12 #include <linux/serial_reg.h>
13 #include <linux/dmaengine.h>
14
15 #include "../serial_mctrl_gpio.h"
16
17 struct uart_8250_dma {
18 int (*tx_dma)(struct uart_8250_port *p);
19 int (*rx_dma)(struct uart_8250_port *p);
20 void (*prepare_tx_dma)(struct uart_8250_port *p);
21 void (*prepare_rx_dma)(struct uart_8250_port *p);
22
23 /* Filter function */
24 dma_filter_fn fn;
25 /* Parameter to the filter function */
26 void *rx_param;
27 void *tx_param;
28
29 struct dma_slave_config rxconf;
30 struct dma_slave_config txconf;
31
32 struct dma_chan *rxchan;
33 struct dma_chan *txchan;
34
35 /* Device address base for DMA operations */
36 phys_addr_t rx_dma_addr;
37 phys_addr_t tx_dma_addr;
38
39 /* DMA address of the buffer in memory */
40 dma_addr_t rx_addr;
41 dma_addr_t tx_addr;
42
43 dma_cookie_t rx_cookie;
44 dma_cookie_t tx_cookie;
45
46 void *rx_buf;
47
48 size_t rx_size;
49 size_t tx_size;
50
51 unsigned char tx_running;
52 unsigned char tx_err;
53 unsigned char rx_running;
54 };
55
56 struct old_serial_port {
57 unsigned int uart;
58 unsigned int baud_base;
59 unsigned int port;
60 unsigned int irq;
61 upf_t flags;
62 unsigned char io_type;
63 unsigned char __iomem *iomem_base;
64 unsigned short iomem_reg_shift;
65 };
66
67 struct serial8250_config {
68 const char *name;
69 unsigned short fifo_size;
70 unsigned short tx_loadsz;
71 unsigned char fcr;
72 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
73 unsigned int flags;
74 };
75
76 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */
77 #define UART_CAP_EFR BIT(9) /* UART has EFR */
78 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
79 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
80 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
81 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
82 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
83 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
84 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
85 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
86 * STOP PARITY EPAR SPAR WLEN5 WLEN6
87 */
88
89 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
90 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
91 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
92 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
93 #define UART_BUG_PARITY BIT(4) /* UART mishandles parity if FIFO enabled */
94 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
95
96
97 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
98 #define SERIAL8250_SHARE_IRQS 1
99 #else
100 #define SERIAL8250_SHARE_IRQS 0
101 #endif
102
103 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
104 { \
105 .iobase = _base, \
106 .irq = _irq, \
107 .uartclk = 1843200, \
108 .iotype = UPIO_PORT, \
109 .flags = UPF_BOOT_AUTOCONF | (_flags), \
110 }
111
112 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
113
114
serial_in(struct uart_8250_port * up,int offset)115 static inline int serial_in(struct uart_8250_port *up, int offset)
116 {
117 return up->port.serial_in(&up->port, offset);
118 }
119
serial_out(struct uart_8250_port * up,int offset,int value)120 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
121 {
122 up->port.serial_out(&up->port, offset, value);
123 }
124
125 /*
126 * For the 16C950
127 */
serial_icr_write(struct uart_8250_port * up,int offset,int value)128 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
129 {
130 serial_out(up, UART_SCR, offset);
131 serial_out(up, UART_ICR, value);
132 }
133
serial_icr_read(struct uart_8250_port * up,int offset)134 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
135 int offset)
136 {
137 unsigned int value;
138
139 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
140 serial_out(up, UART_SCR, offset);
141 value = serial_in(up, UART_ICR);
142 serial_icr_write(up, UART_ACR, up->acr);
143
144 return value;
145 }
146
147 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
148
serial_dl_read(struct uart_8250_port * up)149 static inline int serial_dl_read(struct uart_8250_port *up)
150 {
151 return up->dl_read(up);
152 }
153
serial_dl_write(struct uart_8250_port * up,int value)154 static inline void serial_dl_write(struct uart_8250_port *up, int value)
155 {
156 up->dl_write(up, value);
157 }
158
serial8250_set_THRI(struct uart_8250_port * up)159 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
160 {
161 if (up->ier & UART_IER_THRI)
162 return false;
163 up->ier |= UART_IER_THRI;
164 serial_out(up, UART_IER, up->ier);
165 return true;
166 }
167
serial8250_clear_THRI(struct uart_8250_port * up)168 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
169 {
170 if (!(up->ier & UART_IER_THRI))
171 return false;
172 up->ier &= ~UART_IER_THRI;
173 serial_out(up, UART_IER, up->ier);
174 return true;
175 }
176
177 struct uart_8250_port *serial8250_get_port(int line);
178
179 void serial8250_rpm_get(struct uart_8250_port *p);
180 void serial8250_rpm_put(struct uart_8250_port *p);
181
182 void serial8250_rpm_get_tx(struct uart_8250_port *p);
183 void serial8250_rpm_put_tx(struct uart_8250_port *p);
184
185 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
186 void serial8250_em485_start_tx(struct uart_8250_port *p);
187 void serial8250_em485_stop_tx(struct uart_8250_port *p);
188 void serial8250_em485_destroy(struct uart_8250_port *p);
189
190 /* MCR <-> TIOCM conversion */
serial8250_TIOCM_to_MCR(int tiocm)191 static inline int serial8250_TIOCM_to_MCR(int tiocm)
192 {
193 int mcr = 0;
194
195 if (tiocm & TIOCM_RTS)
196 mcr |= UART_MCR_RTS;
197 if (tiocm & TIOCM_DTR)
198 mcr |= UART_MCR_DTR;
199 if (tiocm & TIOCM_OUT1)
200 mcr |= UART_MCR_OUT1;
201 if (tiocm & TIOCM_OUT2)
202 mcr |= UART_MCR_OUT2;
203 if (tiocm & TIOCM_LOOP)
204 mcr |= UART_MCR_LOOP;
205
206 return mcr;
207 }
208
serial8250_MCR_to_TIOCM(int mcr)209 static inline int serial8250_MCR_to_TIOCM(int mcr)
210 {
211 int tiocm = 0;
212
213 if (mcr & UART_MCR_RTS)
214 tiocm |= TIOCM_RTS;
215 if (mcr & UART_MCR_DTR)
216 tiocm |= TIOCM_DTR;
217 if (mcr & UART_MCR_OUT1)
218 tiocm |= TIOCM_OUT1;
219 if (mcr & UART_MCR_OUT2)
220 tiocm |= TIOCM_OUT2;
221 if (mcr & UART_MCR_LOOP)
222 tiocm |= TIOCM_LOOP;
223
224 return tiocm;
225 }
226
227 /* MSR <-> TIOCM conversion */
serial8250_MSR_to_TIOCM(int msr)228 static inline int serial8250_MSR_to_TIOCM(int msr)
229 {
230 int tiocm = 0;
231
232 if (msr & UART_MSR_DCD)
233 tiocm |= TIOCM_CAR;
234 if (msr & UART_MSR_RI)
235 tiocm |= TIOCM_RNG;
236 if (msr & UART_MSR_DSR)
237 tiocm |= TIOCM_DSR;
238 if (msr & UART_MSR_CTS)
239 tiocm |= TIOCM_CTS;
240
241 return tiocm;
242 }
243
serial8250_out_MCR(struct uart_8250_port * up,int value)244 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
245 {
246 serial_out(up, UART_MCR, value);
247
248 if (up->gpios)
249 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
250 }
251
serial8250_in_MCR(struct uart_8250_port * up)252 static inline int serial8250_in_MCR(struct uart_8250_port *up)
253 {
254 int mctrl;
255
256 mctrl = serial_in(up, UART_MCR);
257
258 if (up->gpios) {
259 unsigned int mctrl_gpio = 0;
260
261 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
262 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
263 }
264
265 return mctrl;
266 }
267
268 #if defined(__alpha__) && !defined(CONFIG_PCI)
269 /*
270 * Digital did something really horribly wrong with the OUT1 and OUT2
271 * lines on at least some ALPHA's. The failure mode is that if either
272 * is cleared, the machine locks up with endless interrupts.
273 */
274 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
275 #else
276 #define ALPHA_KLUDGE_MCR 0
277 #endif
278
279 #ifdef CONFIG_SERIAL_8250_PNP
280 int serial8250_pnp_init(void);
281 void serial8250_pnp_exit(void);
282 #else
serial8250_pnp_init(void)283 static inline int serial8250_pnp_init(void) { return 0; }
serial8250_pnp_exit(void)284 static inline void serial8250_pnp_exit(void) { }
285 #endif
286
287 #ifdef CONFIG_SERIAL_8250_FINTEK
288 int fintek_8250_probe(struct uart_8250_port *uart);
289 #else
fintek_8250_probe(struct uart_8250_port * uart)290 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
291 #endif
292
293 #ifdef CONFIG_ARCH_OMAP1
is_omap1_8250(struct uart_8250_port * pt)294 static inline int is_omap1_8250(struct uart_8250_port *pt)
295 {
296 int res;
297
298 switch (pt->port.mapbase) {
299 case OMAP1_UART1_BASE:
300 case OMAP1_UART2_BASE:
301 case OMAP1_UART3_BASE:
302 res = 1;
303 break;
304 default:
305 res = 0;
306 break;
307 }
308
309 return res;
310 }
311
is_omap1510_8250(struct uart_8250_port * pt)312 static inline int is_omap1510_8250(struct uart_8250_port *pt)
313 {
314 if (!cpu_is_omap1510())
315 return 0;
316
317 return is_omap1_8250(pt);
318 }
319 #else
is_omap1_8250(struct uart_8250_port * pt)320 static inline int is_omap1_8250(struct uart_8250_port *pt)
321 {
322 return 0;
323 }
is_omap1510_8250(struct uart_8250_port * pt)324 static inline int is_omap1510_8250(struct uart_8250_port *pt)
325 {
326 return 0;
327 }
328 #endif
329
330 #ifdef CONFIG_SERIAL_8250_DMA
331 extern int serial8250_tx_dma(struct uart_8250_port *);
332 extern int serial8250_rx_dma(struct uart_8250_port *);
333 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
334 extern int serial8250_request_dma(struct uart_8250_port *);
335 extern void serial8250_release_dma(struct uart_8250_port *);
336
serial8250_do_prepare_tx_dma(struct uart_8250_port * p)337 static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
338 {
339 struct uart_8250_dma *dma = p->dma;
340
341 if (dma->prepare_tx_dma)
342 dma->prepare_tx_dma(p);
343 }
344
serial8250_do_prepare_rx_dma(struct uart_8250_port * p)345 static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
346 {
347 struct uart_8250_dma *dma = p->dma;
348
349 if (dma->prepare_rx_dma)
350 dma->prepare_rx_dma(p);
351 }
352
serial8250_tx_dma_running(struct uart_8250_port * p)353 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
354 {
355 struct uart_8250_dma *dma = p->dma;
356
357 return dma && dma->tx_running;
358 }
359 #else
serial8250_tx_dma(struct uart_8250_port * p)360 static inline int serial8250_tx_dma(struct uart_8250_port *p)
361 {
362 return -1;
363 }
serial8250_rx_dma(struct uart_8250_port * p)364 static inline int serial8250_rx_dma(struct uart_8250_port *p)
365 {
366 return -1;
367 }
serial8250_rx_dma_flush(struct uart_8250_port * p)368 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
serial8250_request_dma(struct uart_8250_port * p)369 static inline int serial8250_request_dma(struct uart_8250_port *p)
370 {
371 return -1;
372 }
serial8250_release_dma(struct uart_8250_port * p)373 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
374
serial8250_tx_dma_running(struct uart_8250_port * p)375 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
376 {
377 return false;
378 }
379 #endif
380
ns16550a_goto_highspeed(struct uart_8250_port * up)381 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
382 {
383 unsigned char status;
384
385 status = serial_in(up, 0x04); /* EXCR2 */
386 #define PRESL(x) ((x) & 0x30)
387 if (PRESL(status) == 0x10) {
388 /* already in high speed mode */
389 return 0;
390 } else {
391 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
392 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
393 serial_out(up, 0x04, status);
394 }
395 return 1;
396 }
397
serial_index(struct uart_port * port)398 static inline int serial_index(struct uart_port *port)
399 {
400 return port->minor - 64;
401 }
402