1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 */
6 #ifndef __IWL_CONFIG_H__
7 #define __IWL_CONFIG_H__
8
9 #include <linux/types.h>
10 #include <linux/netdevice.h>
11 #include <linux/ieee80211.h>
12 #include <linux/nl80211.h>
13 #include "iwl-csr.h"
14
15 enum iwl_device_family {
16 IWL_DEVICE_FAMILY_UNDEFINED,
17 IWL_DEVICE_FAMILY_1000,
18 IWL_DEVICE_FAMILY_100,
19 IWL_DEVICE_FAMILY_2000,
20 IWL_DEVICE_FAMILY_2030,
21 IWL_DEVICE_FAMILY_105,
22 IWL_DEVICE_FAMILY_135,
23 IWL_DEVICE_FAMILY_5000,
24 IWL_DEVICE_FAMILY_5150,
25 IWL_DEVICE_FAMILY_6000,
26 IWL_DEVICE_FAMILY_6000i,
27 IWL_DEVICE_FAMILY_6005,
28 IWL_DEVICE_FAMILY_6030,
29 IWL_DEVICE_FAMILY_6050,
30 IWL_DEVICE_FAMILY_6150,
31 IWL_DEVICE_FAMILY_7000,
32 IWL_DEVICE_FAMILY_8000,
33 IWL_DEVICE_FAMILY_9000,
34 IWL_DEVICE_FAMILY_22000,
35 IWL_DEVICE_FAMILY_AX210,
36 IWL_DEVICE_FAMILY_BZ,
37 };
38
39 /*
40 * LED mode
41 * IWL_LED_DEFAULT: use device default
42 * IWL_LED_RF_STATE: turn LED on/off based on RF state
43 * LED ON = RF ON
44 * LED OFF = RF OFF
45 * IWL_LED_BLINK: adjust led blink rate based on blink table
46 * IWL_LED_DISABLE: led disabled
47 */
48 enum iwl_led_mode {
49 IWL_LED_DEFAULT,
50 IWL_LED_RF_STATE,
51 IWL_LED_BLINK,
52 IWL_LED_DISABLE,
53 };
54
55 /**
56 * enum iwl_nvm_type - nvm formats
57 * @IWL_NVM: the regular format
58 * @IWL_NVM_EXT: extended NVM format
59 * @IWL_NVM_SDP: NVM format used by 3168 series
60 */
61 enum iwl_nvm_type {
62 IWL_NVM,
63 IWL_NVM_EXT,
64 IWL_NVM_SDP,
65 };
66
67 /*
68 * This is the threshold value of plcp error rate per 100mSecs. It is
69 * used to set and check for the validity of plcp_delta.
70 */
71 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1
72 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50
73 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
74 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
75 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255
76 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0
77
78 /* TX queue watchdog timeouts in mSecs */
79 #define IWL_WATCHDOG_DISABLED 0
80 #define IWL_DEF_WD_TIMEOUT 2500
81 #define IWL_LONG_WD_TIMEOUT 10000
82 #define IWL_MAX_WD_TIMEOUT 120000
83
84 #define IWL_DEFAULT_MAX_TX_POWER 22
85 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
86 NETIF_F_TSO | NETIF_F_TSO6)
87
88 /* Antenna presence definitions */
89 #define ANT_NONE 0x0
90 #define ANT_INVALID 0xff
91 #define ANT_A BIT(0)
92 #define ANT_B BIT(1)
93 #define ANT_C BIT(2)
94 #define ANT_AB (ANT_A | ANT_B)
95 #define ANT_AC (ANT_A | ANT_C)
96 #define ANT_BC (ANT_B | ANT_C)
97 #define ANT_ABC (ANT_A | ANT_B | ANT_C)
98 #define MAX_ANT_NUM 3
99
100
num_of_ant(u8 mask)101 static inline u8 num_of_ant(u8 mask)
102 {
103 return !!((mask) & ANT_A) +
104 !!((mask) & ANT_B) +
105 !!((mask) & ANT_C);
106 }
107
108 /**
109 * struct iwl_base_params - params not likely to change within a device family
110 * @max_ll_items: max number of OTP blocks
111 * @shadow_ram_support: shadow support for OTP memory
112 * @led_compensation: compensate on the led on/off time per HW according
113 * to the deviation to achieve the desired led frequency.
114 * The detail algorithm is described in iwl-led.c
115 * @wd_timeout: TX queues watchdog timeout
116 * @max_event_log_size: size of event log buffer size for ucode event logging
117 * @shadow_reg_enable: HW shadow register support
118 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
119 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.
120 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
121 * @max_tfd_queue_size: max number of entries in tfd queue.
122 */
123 struct iwl_base_params {
124 unsigned int wd_timeout;
125
126 u16 eeprom_size;
127 u16 max_event_log_size;
128
129 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
130 shadow_ram_support:1,
131 shadow_reg_enable:1,
132 pcie_l1_allowed:1,
133 apmg_wake_up_wa:1,
134 scd_chain_ext_wa:1;
135
136 u16 num_of_queues; /* def: HW dependent */
137 u32 max_tfd_queue_size; /* def: HW dependent */
138
139 u8 max_ll_items;
140 u8 led_compensation;
141 };
142
143 /*
144 * @stbc: support Tx STBC and 1*SS Rx STBC
145 * @ldpc: support Tx/Rx with LDPC
146 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
147 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
148 */
149 struct iwl_ht_params {
150 u8 ht_greenfield_support:1,
151 stbc:1,
152 ldpc:1,
153 use_rts_for_aggregation:1;
154 u8 ht40_bands;
155 };
156
157 /*
158 * Tx-backoff threshold
159 * @temperature: The threshold in Celsius
160 * @backoff: The tx-backoff in uSec
161 */
162 struct iwl_tt_tx_backoff {
163 s32 temperature;
164 u32 backoff;
165 };
166
167 #define TT_TX_BACKOFF_SIZE 6
168
169 /**
170 * struct iwl_tt_params - thermal throttling parameters
171 * @ct_kill_entry: CT Kill entry threshold
172 * @ct_kill_exit: CT Kill exit threshold
173 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs
174 * to checks whether to exit CT Kill.
175 * @dynamic_smps_entry: Dynamic SMPS entry threshold
176 * @dynamic_smps_exit: Dynamic SMPS exit threshold
177 * @tx_protection_entry: TX protection entry threshold
178 * @tx_protection_exit: TX protection exit threshold
179 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
180 * @support_ct_kill: Support CT Kill?
181 * @support_dynamic_smps: Support dynamic SMPS?
182 * @support_tx_protection: Support tx protection?
183 * @support_tx_backoff: Support tx-backoff?
184 */
185 struct iwl_tt_params {
186 u32 ct_kill_entry;
187 u32 ct_kill_exit;
188 u32 ct_kill_duration;
189 u32 dynamic_smps_entry;
190 u32 dynamic_smps_exit;
191 u32 tx_protection_entry;
192 u32 tx_protection_exit;
193 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
194 u8 support_ct_kill:1,
195 support_dynamic_smps:1,
196 support_tx_protection:1,
197 support_tx_backoff:1;
198 };
199
200 /*
201 * information on how to parse the EEPROM
202 */
203 #define EEPROM_REG_BAND_1_CHANNELS 0x08
204 #define EEPROM_REG_BAND_2_CHANNELS 0x26
205 #define EEPROM_REG_BAND_3_CHANNELS 0x42
206 #define EEPROM_REG_BAND_4_CHANNELS 0x5C
207 #define EEPROM_REG_BAND_5_CHANNELS 0x74
208 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82
209 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92
210 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80
211 #define EEPROM_REGULATORY_BAND_NO_HT40 0
212
213 /* lower blocks contain EEPROM image and calibration data */
214 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */
215 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */
216 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */
217
218 struct iwl_eeprom_params {
219 const u8 regulatory_bands[7];
220 bool enhanced_txpower;
221 };
222
223 /* Tx-backoff power threshold
224 * @pwr: The power limit in mw
225 * @backoff: The tx-backoff in uSec
226 */
227 struct iwl_pwr_tx_backoff {
228 u32 pwr;
229 u32 backoff;
230 };
231
232 enum iwl_cfg_trans_ltr_delay {
233 IWL_CFG_TRANS_LTR_DELAY_NONE = 0,
234 IWL_CFG_TRANS_LTR_DELAY_200US = 1,
235 IWL_CFG_TRANS_LTR_DELAY_2500US = 2,
236 IWL_CFG_TRANS_LTR_DELAY_1820US = 3,
237 };
238
239 /**
240 * struct iwl_cfg_trans - information needed to start the trans
241 *
242 * These values are specific to the device ID and do not change when
243 * multiple configs are used for a single device ID. They values are
244 * used, among other things, to boot the NIC so that the HW REV or
245 * RFID can be read before deciding the remaining parameters to use.
246 *
247 * @base_params: pointer to basic parameters
248 * @csr: csr flags and addresses that are different across devices
249 * @device_family: the device family
250 * @umac_prph_offset: offset to add to UMAC periphery address
251 * @xtal_latency: power up latency to get the xtal stabilized
252 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
253 * @rf_id: need to read rf_id to determine the firmware image
254 * @use_tfh: use TFH
255 * @gen2: 22000 and on transport operation
256 * @mq_rx_supported: multi-queue rx support
257 * @integrated: discrete or integrated
258 * @low_latency_xtal: use the low latency xtal if supported
259 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
260 */
261 struct iwl_cfg_trans_params {
262 const struct iwl_base_params *base_params;
263 enum iwl_device_family device_family;
264 u32 umac_prph_offset;
265 u32 xtal_latency;
266 u32 extra_phy_cfg_flags;
267 u32 rf_id:1,
268 use_tfh:1,
269 gen2:1,
270 mq_rx_supported:1,
271 integrated:1,
272 low_latency_xtal:1,
273 bisr_workaround:1,
274 ltr_delay:2;
275 };
276
277 /**
278 * struct iwl_fw_mon_reg - FW monitor register info
279 * @addr: register address
280 * @mask: register mask
281 */
282 struct iwl_fw_mon_reg {
283 u32 addr;
284 u32 mask;
285 };
286
287 /**
288 * struct iwl_fw_mon_regs - FW monitor registers
289 * @write_ptr: write pointer register
290 * @cycle_cnt: cycle count register
291 * @cur_frag: current fragment in use
292 */
293 struct iwl_fw_mon_regs {
294 struct iwl_fw_mon_reg write_ptr;
295 struct iwl_fw_mon_reg cycle_cnt;
296 struct iwl_fw_mon_reg cur_frag;
297 };
298
299 /**
300 * struct iwl_cfg
301 * @trans: the trans-specific configuration part
302 * @name: Official name of the device
303 * @fw_name_pre: Firmware filename prefix. The api version and extension
304 * (.ucode) will be added to filename before loading from disk. The
305 * filename is constructed as fw_name_pre<api>.ucode.
306 * @ucode_api_max: Highest version of uCode API supported by driver.
307 * @ucode_api_min: Lowest version of uCode API supported by driver.
308 * @max_inst_size: The maximal length of the fw inst section (only DVM)
309 * @max_data_size: The maximal length of the fw data section (only DVM)
310 * @valid_tx_ant: valid transmit antenna
311 * @valid_rx_ant: valid receive antenna
312 * @non_shared_ant: the antenna that is for WiFi only
313 * @nvm_ver: NVM version
314 * @nvm_calib_ver: NVM calibration version
315 * @lib: pointer to the lib ops
316 * @ht_params: point to ht parameters
317 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
318 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
319 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
320 * @internal_wimax_coex: internal wifi/wimax combo device
321 * @high_temp: Is this NIC is designated to be in high temperature.
322 * @host_interrupt_operation_mode: device needs host interrupt operation
323 * mode set
324 * @nvm_hw_section_num: the ID of the HW NVM section
325 * @mac_addr_from_csr: read HW address from CSR registers at this offset
326 * @features: hw features, any combination of feature_passlist
327 * @pwr_tx_backoffs: translation table between power limits and backoffs
328 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
329 * @dccm_offset: offset from which DCCM begins
330 * @dccm_len: length of DCCM (including runtime stack CCM)
331 * @dccm2_offset: offset from which the second DCCM begins
332 * @dccm2_len: length of the second DCCM
333 * @smem_offset: offset from which the SMEM begins
334 * @smem_len: the length of SMEM
335 * @vht_mu_mimo_supported: VHT MU-MIMO support
336 * @cdb: CDB support
337 * @nvm_type: see &enum iwl_nvm_type
338 * @d3_debug_data_base_addr: base address where D3 debug data is stored
339 * @d3_debug_data_length: length of the D3 debug data
340 * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
341 * @min_txq_size: minimum number of slots required in a TX queue
342 * @uhb_supported: ultra high band channels supported
343 * @min_256_ba_txq_size: minimum number of slots required in a TX queue which
344 * supports 256 BA aggregation
345 * @num_rbds: number of receive buffer descriptors to use
346 * (only used for multi-queue capable devices)
347 * @mac_addr_csr_base: CSR base register for MAC address access, if not set
348 * assume 0x380
349 *
350 * We enable the driver to be backward compatible wrt. hardware features.
351 * API differences in uCode shouldn't be handled here but through TLVs
352 * and/or the uCode API version instead.
353 */
354 struct iwl_cfg {
355 struct iwl_cfg_trans_params trans;
356 /* params specific to an individual device within a device family */
357 const char *name;
358 const char *fw_name_pre;
359 /* params likely to change within a device family */
360 const struct iwl_ht_params *ht_params;
361 const struct iwl_eeprom_params *eeprom_params;
362 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
363 const char *default_nvm_file_C_step;
364 const struct iwl_tt_params *thermal_params;
365 enum iwl_led_mode led_mode;
366 enum iwl_nvm_type nvm_type;
367 u32 max_data_size;
368 u32 max_inst_size;
369 netdev_features_t features;
370 u32 dccm_offset;
371 u32 dccm_len;
372 u32 dccm2_offset;
373 u32 dccm2_len;
374 u32 smem_offset;
375 u32 smem_len;
376 u16 nvm_ver;
377 u16 nvm_calib_ver;
378 u32 rx_with_siso_diversity:1,
379 tx_with_siso_diversity:1,
380 bt_shared_single_ant:1,
381 internal_wimax_coex:1,
382 host_interrupt_operation_mode:1,
383 high_temp:1,
384 mac_addr_from_csr:10,
385 lp_xtal_workaround:1,
386 disable_dummy_notification:1,
387 apmg_not_supported:1,
388 vht_mu_mimo_supported:1,
389 cdb:1,
390 dbgc_supported:1,
391 uhb_supported:1;
392 u8 valid_tx_ant;
393 u8 valid_rx_ant;
394 u8 non_shared_ant;
395 u8 nvm_hw_section_num;
396 u8 max_tx_agg_size;
397 u8 ucode_api_max;
398 u8 ucode_api_min;
399 u16 num_rbds;
400 u32 min_umac_error_event_table;
401 u32 d3_debug_data_base_addr;
402 u32 d3_debug_data_length;
403 u32 min_txq_size;
404 u32 gp2_reg_addr;
405 u32 min_256_ba_txq_size;
406 const struct iwl_fw_mon_regs mon_dram_regs;
407 const struct iwl_fw_mon_regs mon_smem_regs;
408 };
409
410 #define IWL_CFG_ANY (~0)
411
412 #define IWL_CFG_MAC_TYPE_PU 0x31
413 #define IWL_CFG_MAC_TYPE_PNJ 0x32
414 #define IWL_CFG_MAC_TYPE_TH 0x32
415 #define IWL_CFG_MAC_TYPE_QU 0x33
416 #define IWL_CFG_MAC_TYPE_QUZ 0x35
417 #define IWL_CFG_MAC_TYPE_QNJ 0x36
418 #define IWL_CFG_MAC_TYPE_SO 0x37
419 #define IWL_CFG_MAC_TYPE_SNJ 0x42
420 #define IWL_CFG_MAC_TYPE_SOF 0x43
421 #define IWL_CFG_MAC_TYPE_MA 0x44
422 #define IWL_CFG_MAC_TYPE_BZ 0x46
423
424 #define IWL_CFG_RF_TYPE_TH 0x105
425 #define IWL_CFG_RF_TYPE_TH1 0x108
426 #define IWL_CFG_RF_TYPE_JF2 0x105
427 #define IWL_CFG_RF_TYPE_JF1 0x108
428 #define IWL_CFG_RF_TYPE_HR2 0x10A
429 #define IWL_CFG_RF_TYPE_HR1 0x10C
430 #define IWL_CFG_RF_TYPE_GF 0x10D
431 #define IWL_CFG_RF_TYPE_MR 0x110
432 #define IWL_CFG_RF_TYPE_FM 0x112
433
434 #define IWL_CFG_RF_ID_TH 0x1
435 #define IWL_CFG_RF_ID_TH1 0x1
436 #define IWL_CFG_RF_ID_JF 0x3
437 #define IWL_CFG_RF_ID_JF1 0x6
438 #define IWL_CFG_RF_ID_JF1_DIV 0xA
439 #define IWL_CFG_RF_ID_HR 0x7
440 #define IWL_CFG_RF_ID_HR1 0x4
441
442 #define IWL_CFG_NO_160 0x1
443 #define IWL_CFG_160 0x0
444
445 #define IWL_CFG_CORES_BT 0x0
446 #define IWL_CFG_CORES_BT_GNSS 0x5
447
448 #define IWL_CFG_NO_CDB 0x0
449 #define IWL_CFG_CDB 0x1
450
451 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
452 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
453 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
454
455 struct iwl_dev_info {
456 u16 device;
457 u16 subdevice;
458 u16 mac_type;
459 u16 rf_type;
460 u8 mac_step;
461 u8 rf_id;
462 u8 no_160;
463 u8 cores;
464 u8 cdb;
465 const struct iwl_cfg *cfg;
466 const char *name;
467 };
468
469 /*
470 * This list declares the config structures for all devices.
471 */
472 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
473 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;
474 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg;
475 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;
476 extern const struct iwl_cfg_trans_params iwl_qnj_trans_cfg;
477 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;
478 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg;
479 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;
480 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
481 extern const struct iwl_cfg_trans_params iwl_snj_trans_cfg;
482 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;
483 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;
484 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;
485 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;
486 extern const char iwl9162_name[];
487 extern const char iwl9260_name[];
488 extern const char iwl9260_1_name[];
489 extern const char iwl9270_name[];
490 extern const char iwl9461_name[];
491 extern const char iwl9462_name[];
492 extern const char iwl9560_name[];
493 extern const char iwl9162_160_name[];
494 extern const char iwl9260_160_name[];
495 extern const char iwl9270_160_name[];
496 extern const char iwl9461_160_name[];
497 extern const char iwl9462_160_name[];
498 extern const char iwl9560_160_name[];
499 extern const char iwl9260_killer_1550_name[];
500 extern const char iwl9560_killer_1550i_name[];
501 extern const char iwl9560_killer_1550s_name[];
502 extern const char iwl_ax200_name[];
503 extern const char iwl_ax203_name[];
504 extern const char iwl_ax201_name[];
505 extern const char iwl_ax101_name[];
506 extern const char iwl_ax200_killer_1650w_name[];
507 extern const char iwl_ax200_killer_1650x_name[];
508 extern const char iwl_ax201_killer_1650s_name[];
509 extern const char iwl_ax201_killer_1650i_name[];
510 extern const char iwl_ax210_killer_1675w_name[];
511 extern const char iwl_ax210_killer_1675x_name[];
512 extern const char iwl9560_killer_1550i_160_name[];
513 extern const char iwl9560_killer_1550s_160_name[];
514 extern const char iwl_ax211_name[];
515 extern const char iwl_ax221_name[];
516 extern const char iwl_ax231_name[];
517 extern const char iwl_ax411_name[];
518 extern const char iwl_bz_name[];
519 #if IS_ENABLED(CONFIG_IWLDVM)
520 extern const struct iwl_cfg iwl5300_agn_cfg;
521 extern const struct iwl_cfg iwl5100_agn_cfg;
522 extern const struct iwl_cfg iwl5350_agn_cfg;
523 extern const struct iwl_cfg iwl5100_bgn_cfg;
524 extern const struct iwl_cfg iwl5100_abg_cfg;
525 extern const struct iwl_cfg iwl5150_agn_cfg;
526 extern const struct iwl_cfg iwl5150_abg_cfg;
527 extern const struct iwl_cfg iwl6005_2agn_cfg;
528 extern const struct iwl_cfg iwl6005_2abg_cfg;
529 extern const struct iwl_cfg iwl6005_2bg_cfg;
530 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
531 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
532 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
533 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
534 extern const struct iwl_cfg iwl1030_bgn_cfg;
535 extern const struct iwl_cfg iwl1030_bg_cfg;
536 extern const struct iwl_cfg iwl6030_2agn_cfg;
537 extern const struct iwl_cfg iwl6030_2abg_cfg;
538 extern const struct iwl_cfg iwl6030_2bgn_cfg;
539 extern const struct iwl_cfg iwl6030_2bg_cfg;
540 extern const struct iwl_cfg iwl6000i_2agn_cfg;
541 extern const struct iwl_cfg iwl6000i_2abg_cfg;
542 extern const struct iwl_cfg iwl6000i_2bg_cfg;
543 extern const struct iwl_cfg iwl6000_3agn_cfg;
544 extern const struct iwl_cfg iwl6050_2agn_cfg;
545 extern const struct iwl_cfg iwl6050_2abg_cfg;
546 extern const struct iwl_cfg iwl6150_bgn_cfg;
547 extern const struct iwl_cfg iwl6150_bg_cfg;
548 extern const struct iwl_cfg iwl1000_bgn_cfg;
549 extern const struct iwl_cfg iwl1000_bg_cfg;
550 extern const struct iwl_cfg iwl100_bgn_cfg;
551 extern const struct iwl_cfg iwl100_bg_cfg;
552 extern const struct iwl_cfg iwl130_bgn_cfg;
553 extern const struct iwl_cfg iwl130_bg_cfg;
554 extern const struct iwl_cfg iwl2000_2bgn_cfg;
555 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
556 extern const struct iwl_cfg iwl2030_2bgn_cfg;
557 extern const struct iwl_cfg iwl6035_2agn_cfg;
558 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
559 extern const struct iwl_cfg iwl105_bgn_cfg;
560 extern const struct iwl_cfg iwl105_bgn_d_cfg;
561 extern const struct iwl_cfg iwl135_bgn_cfg;
562 #endif /* CONFIG_IWLDVM */
563 #if IS_ENABLED(CONFIG_IWLMVM)
564 extern const struct iwl_cfg iwl7260_2ac_cfg;
565 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
566 extern const struct iwl_cfg iwl7260_2n_cfg;
567 extern const struct iwl_cfg iwl7260_n_cfg;
568 extern const struct iwl_cfg iwl3160_2ac_cfg;
569 extern const struct iwl_cfg iwl3160_2n_cfg;
570 extern const struct iwl_cfg iwl3160_n_cfg;
571 extern const struct iwl_cfg iwl3165_2ac_cfg;
572 extern const struct iwl_cfg iwl3168_2ac_cfg;
573 extern const struct iwl_cfg iwl7265_2ac_cfg;
574 extern const struct iwl_cfg iwl7265_2n_cfg;
575 extern const struct iwl_cfg iwl7265_n_cfg;
576 extern const struct iwl_cfg iwl7265d_2ac_cfg;
577 extern const struct iwl_cfg iwl7265d_2n_cfg;
578 extern const struct iwl_cfg iwl7265d_n_cfg;
579 extern const struct iwl_cfg iwl8260_2n_cfg;
580 extern const struct iwl_cfg iwl8260_2ac_cfg;
581 extern const struct iwl_cfg iwl8265_2ac_cfg;
582 extern const struct iwl_cfg iwl8275_2ac_cfg;
583 extern const struct iwl_cfg iwl4165_2ac_cfg;
584 extern const struct iwl_cfg iwl9260_2ac_cfg;
585 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;
586 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;
587 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
588 extern const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg;
589 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
590 extern const struct iwl_cfg iwl_qu_b0_hr1_b0;
591 extern const struct iwl_cfg iwl_qu_c0_hr1_b0;
592 extern const struct iwl_cfg iwl_quz_a0_hr1_b0;
593 extern const struct iwl_cfg iwl_qu_b0_hr_b0;
594 extern const struct iwl_cfg iwl_qu_c0_hr_b0;
595 extern const struct iwl_cfg iwl_ax200_cfg_cc;
596 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
597 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
598 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
599 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
600 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
601 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
602 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
603 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
604 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
605 extern const struct iwl_cfg killer1650x_2ax_cfg;
606 extern const struct iwl_cfg killer1650w_2ax_cfg;
607 extern const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg;
608 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0;
609 extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0;
610 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
611 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long;
612 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
613 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
614 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
615 extern const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0;
616 extern const struct iwl_cfg iwlax211_cfg_snj_gf_a0;
617 extern const struct iwl_cfg iwl_cfg_snj_hr_b0;
618 extern const struct iwl_cfg iwl_cfg_snj_a0_jf_b0;
619 extern const struct iwl_cfg iwl_cfg_ma_a0_hr_b0;
620 extern const struct iwl_cfg iwl_cfg_ma_a0_gf_a0;
621 extern const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0;
622 extern const struct iwl_cfg iwl_cfg_ma_a0_mr_a0;
623 extern const struct iwl_cfg iwl_cfg_ma_a0_fm_a0;
624 extern const struct iwl_cfg iwl_cfg_snj_a0_mr_a0;
625 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
626 extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0;
627 extern const struct iwl_cfg iwl_cfg_bz_a0_hr_b0;
628 extern const struct iwl_cfg iwl_cfg_bz_a0_gf_a0;
629 extern const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0;
630 extern const struct iwl_cfg iwl_cfg_bz_a0_mr_a0;
631 #endif /* CONFIG_IWLMVM */
632
633 #endif /* __IWL_CONFIG_H__ */
634