1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 */
6
7 #ifndef __ASM_IRQFLAGS_ARCOMPACT_H
8 #define __ASM_IRQFLAGS_ARCOMPACT_H
9
10 /* vineetg: March 2010 : local_irq_save( ) optimisation
11 * -Remove explicit mov of current status32 into reg, that is not needed
12 * -Use BIC insn instead of INVERTED + AND
13 * -Conditionally disable interrupts (if they are not enabled, don't disable)
14 */
15
16 #include <asm/arcregs.h>
17
18 /* status32 Reg bits related to Interrupt Handling */
19 #define STATUS_E1_BIT 1 /* Int 1 enable */
20 #define STATUS_E2_BIT 2 /* Int 2 enable */
21 #define STATUS_A1_BIT 3 /* Int 1 active */
22 #define STATUS_A2_BIT 4 /* Int 2 active */
23 #define STATUS_AE_BIT 5 /* Exception active */
24
25 #define STATUS_E1_MASK (1<<STATUS_E1_BIT)
26 #define STATUS_E2_MASK (1<<STATUS_E2_BIT)
27 #define STATUS_A1_MASK (1<<STATUS_A1_BIT)
28 #define STATUS_A2_MASK (1<<STATUS_A2_BIT)
29 #define STATUS_AE_MASK (1<<STATUS_AE_BIT)
30 #define STATUS_IE_MASK (STATUS_E1_MASK | STATUS_E2_MASK)
31
32 /* Other Interrupt Handling related Aux regs */
33 #define AUX_IRQ_LEV 0x200 /* IRQ Priority: L1 or L2 */
34 #define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
35 #define AUX_IRQ_LV12 0x43 /* interrupt level register */
36
37 #define AUX_IENABLE 0x40c
38 #define AUX_ITRIGGER 0x40d
39 #define AUX_IPULSE 0x415
40
41 #define ISA_INIT_STATUS_BITS STATUS_IE_MASK
42
43 #ifndef __ASSEMBLY__
44
45 /******************************************************************
46 * IRQ Control Macros
47 *
48 * All of them have "memory" clobber (compiler barrier) which is needed to
49 * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
50 * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
51 *
52 * Noted at the time of Abilis Timer List corruption
53 * Orig Bug + Rejected solution : https://lkml.org/lkml/2013/3/29/67
54 * Reasoning : https://lkml.org/lkml/2013/4/8/15
55 *
56 ******************************************************************/
57
58 /*
59 * Save IRQ state and disable IRQs
60 */
arch_local_irq_save(void)61 static inline long arch_local_irq_save(void)
62 {
63 unsigned long temp, flags;
64
65 __asm__ __volatile__(
66 " lr %1, [status32] \n"
67 " bic %0, %1, %2 \n"
68 " and.f 0, %1, %2 \n"
69 " flag.nz %0 \n"
70 : "=r"(temp), "=r"(flags)
71 : "n"((STATUS_E1_MASK | STATUS_E2_MASK))
72 : "memory", "cc");
73
74 return flags;
75 }
76
77 /*
78 * restore saved IRQ state
79 */
arch_local_irq_restore(unsigned long flags)80 static inline void arch_local_irq_restore(unsigned long flags)
81 {
82
83 __asm__ __volatile__(
84 " flag %0 \n"
85 :
86 : "r"(flags)
87 : "memory");
88 }
89
90 /*
91 * Unconditionally Enable IRQs
92 */
93 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
94 extern void arch_local_irq_enable(void);
95 #else
arch_local_irq_enable(void)96 static inline void arch_local_irq_enable(void)
97 {
98 unsigned long temp;
99
100 __asm__ __volatile__(
101 " lr %0, [status32] \n"
102 " or %0, %0, %1 \n"
103 " flag %0 \n"
104 : "=&r"(temp)
105 : "n"((STATUS_E1_MASK | STATUS_E2_MASK))
106 : "cc", "memory");
107 }
108 #endif
109
110 /*
111 * Unconditionally Disable IRQs
112 */
arch_local_irq_disable(void)113 static inline void arch_local_irq_disable(void)
114 {
115 unsigned long temp;
116
117 __asm__ __volatile__(
118 " lr %0, [status32] \n"
119 " and %0, %0, %1 \n"
120 " flag %0 \n"
121 : "=&r"(temp)
122 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
123 : "memory");
124 }
125
126 /*
127 * save IRQ state
128 */
arch_local_save_flags(void)129 static inline long arch_local_save_flags(void)
130 {
131 unsigned long temp;
132
133 __asm__ __volatile__(
134 " lr %0, [status32] \n"
135 : "=&r"(temp)
136 :
137 : "memory");
138
139 return temp;
140 }
141
142 /*
143 * Query IRQ state
144 */
arch_irqs_disabled_flags(unsigned long flags)145 static inline int arch_irqs_disabled_flags(unsigned long flags)
146 {
147 return !(flags & (STATUS_E1_MASK
148 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
149 | STATUS_E2_MASK
150 #endif
151 ));
152 }
153
arch_irqs_disabled(void)154 static inline int arch_irqs_disabled(void)
155 {
156 return arch_irqs_disabled_flags(arch_local_save_flags());
157 }
158
159 #else
160
161 #ifdef CONFIG_TRACE_IRQFLAGS
162
163 .macro TRACE_ASM_IRQ_DISABLE
164 bl trace_hardirqs_off
165 .endm
166
167 .macro TRACE_ASM_IRQ_ENABLE
168 bl trace_hardirqs_on
169 .endm
170
171 #else
172
173 .macro TRACE_ASM_IRQ_DISABLE
174 .endm
175
176 .macro TRACE_ASM_IRQ_ENABLE
177 .endm
178
179 #endif
180
181 .macro IRQ_DISABLE scratch
182 lr \scratch, [status32]
183 bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
184 flag \scratch
185 TRACE_ASM_IRQ_DISABLE
186 .endm
187
188 .macro IRQ_ENABLE scratch
189 TRACE_ASM_IRQ_ENABLE
190 lr \scratch, [status32]
191 or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
192 flag \scratch
193 .endm
194
195 #endif /* __ASSEMBLY__ */
196
197 #endif
198