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/Documentation/arm/samsung/
Dclksrc-change-registers.awk89 mask=""
105 } else if (line ~ /\.mask/) {
106 mask = extract_value(line)
122 printf "mask '" mask "'\n" > "/dev/stderr"
128 generated = mask
135 printf "/* mask " mask " */\n"
149 printf ".shift = " dmask[mask,1] ", "
150 printf ".size = " dmask[mask,0] ", "
/Documentation/devicetree/bindings/leds/
Dregister-bit-led.txt18 - mask : bit mask for the bit controlling this LED in the register
38 mask = <0x01>;
46 mask = <0x02>;
54 mask = <0x04>;
62 mask = <0x08>;
69 mask = <0x10>;
76 mask = <0x20>;
83 mask = <0x40>;
90 mask = <0x80>;
/Documentation/devicetree/bindings/sound/
Dtdm-slot.txt8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
29 does not do anything, if either mask is set non zero value.
Damlogic,axg-sound-card.txt28 - dai-tdm-slot-rx-mask-{0,1,2,3}: Receive direction slot masks
29 - dai-tdm-slot-tx-mask-{0,1,2,3}: Transmit direction slot masks
30 When omitted, mask is assumed to have to no
32 least one these mask should be provided with
36 mask provided.
53 - dai-tdm-slot-tx-mask : Please refer to tdm-slot.txt.
54 - dai-tdm-slot-rx-mask : Please refer to tdm-slot.txt.
94 dai-tdm-slot-tx-mask-2 = <1 1>;
95 dai-tdm-slot-tx-mask-3 = <1 1>;
96 dai-tdm-slot-rx-mask-1 = <1 1>;
/Documentation/devicetree/bindings/mtd/
Ddavinci-nand.txt27 - ti,davinci-mask-ale: mask for ALE. Needed for executing address
33 - ti,davinci-mask-cle: mask for CLE. Needed for executing command
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
83 ti,davinci-mask-ale = <0>;
84 ti,davinci-mask-cle = <0>;
85 ti,davinci-mask-chipsel = <0>;
/Documentation/devicetree/bindings/hwmon/
Dmax6697.txt30 - alert-mask
31 Alert bit mask. Alert disabled for bits set.
34 - over-temperature-mask
35 Over-temperature bit mask. Over-temperature reporting disabled for
44 specified as boolean, otherwise as per bit mask specified.
49 For MAX6581 only. Two values; first is bit mask, second is ideality
62 alert-mask = <0x72>;
63 over-temperature-mask = <0x7f>;
/Documentation/usb/
Dusbdevfs-drop-permissions.c19 void drop_privileges(int fd, uint32_t mask) in drop_privileges() argument
23 res = ioctl(fd, USBDEVFS_DROP_PRIVILEGES, &mask); in drop_privileges()
58 uint32_t mask, caps; in main() local
102 scanf("%x", &mask); in main()
103 drop_privileges(fd, mask); in main()
/Documentation/devicetree/bindings/regulator/
Dti-abb-regulator.txt25 - ti,tranxdone-status-mask: Mask to the int-register to write-to-clear mask
50 - ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override
52 - ti,ldovbb-override-mask - Required if ldo-address is set, mask for LDO
60 + efuse maps to RBB mask. Set to 0 to ignore this.
63 + efuse maps to FBB mask (valid only if RBB mask does not match)
66 efuse the value to set in 'ti,ldovbb-vset-mask' at ldo-address.
76 ti,tranxdone-status-mask = <0x4000000>;
96 ti,tranxdone-status-mask = <0x4000000>;
119 ti,tranxdone-status-mask = <0x8000000>;
121 ti,ldovbb-override-mask = <0x400>;
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Darm,versatile-fpga-irq.txt15 - clear-mask: a u32 number representing the mask written to clear all IRQs
17 - valid-mask: a u32 number representing a bit mask determining which of
29 clear-mask = <0xffffffff>;
30 valid-mask = <0x003fffff>;
Dbrcm,bcm7120-l2-intc.txt61 - brcm,int-map-mask: 32-bits bit mask describing how many and which interrupts
71 - brcm,int-fwd-mask: if present, a bit mask to configure the interrupts which
86 brcm,int-map-mask = <0xeb8>, <0x140>;
87 brcm,int-fwd-mask = <0x7>;
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-single.txt15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
24 more than one pin, for which "pinctrl-single,function-mask" property specifies
25 position mask of pin.
29 current and drive strength mask.
31 /* drive strength current, mask */
37 /* input, enabled pullup bits, disabled pullup bits, mask */
43 /* input, enabled pulldown bits, disabled pulldown bits, mask */
60 /* input schmitt value, mask */
66 /* input, enable bits, disable bits, mask */
73 /* low power mode value, mask */
[all …]
/Documentation/devicetree/bindings/cpufreq/
Dnvidia,tegra20-cpufreq.txt13 1. CPU process ID mask
14 2. SoC speedo ID mask
17 1. CPU process ID mask
18 2. CPU speedo ID mask
/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt47 - bit-shift : number of bits to shift the bit-mask
48 - bit-mask : arbitrary bitmask for programming the mux
60 bit-mask = <1>;
69 - bit-shift : number of bits to shift the bit-mask
70 - bit-mask : arbitrary bitmask for programming the divider
82 bit-mask = <8>;
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dgpio.txt17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
21 one as described by the fsl,cpm1-gpio-irq-mask property. There should be as
22 many interrupts as number of ones in the mask property. The first interrupt in
23 the list corresponds to the most significant bit of the mask.
45 fsl,cpm1-gpio-irq-mask = <0x0fff>;
Dnetwork.txt85 - fsl,tx-timeslot-mask
86 - fsl,rx-timeslot-mask
89 Definition : time slot mask for TDM operation. Indicates which time
116 fsl,tx-timeslot-mask = <0xfffffffe>;
117 fsl,rx-timeslot-mask = <0xfffffffe>;
/Documentation/ABI/testing/
Dima_policy25 base: [[func=] [mask=] [fsmagic=] [fsuuid=] [uid=]
37 mask:= [[^]MAY_READ] [[^]MAY_WRITE] [[^]MAY_APPEND]
99 measure func=FILE_MMAP mask=MAY_EXEC
100 measure func=FILE_CHECK mask=MAY_READ uid=0
118 measure subj_user=system_u func=FILE_CHECK mask=MAY_READ
119 measure subj_role=system_r func=FILE_CHECK mask=MAY_READ
123 measure subj_user=_ func=FILE_CHECK mask=MAY_READ
/Documentation/devicetree/bindings/thermal/
Dbrcm,sr-thermal.txt8 - brcm,tmon-mask: A one cell bit mask of valid TMON sources.
14 in correspond with brcm,tmon-mask.
27 brcm,tmon-mask = <0x3f>;
/Documentation/firmware-guide/acpi/
Ddebug.rst28 The "debug_layer" is a mask that selects components of interest, e.g., a
32 You can set the debug_layer mask at boot-time using the acpi.debug_layer
38 Reading /sys/module/acpi/parameters/debug_layer shows the supported mask values::
58 The "debug_level" is a mask that selects different types of messages, e.g.,
66 You can set the debug_level mask at boot-time using the acpi.debug_level
71 /sys/module/acpi/parameters/debug_level shows the supported mask values,
/Documentation/devicetree/bindings/pci/
Dmvebu-pci.txt73 - interrupt-map-mask and interrupt-map, standard PCI properties to
140 interrupt-map-mask = <0 0 0 0>;
160 interrupt-map-mask = <0 0 0 0>;
176 interrupt-map-mask = <0 0 0 0>;
192 interrupt-map-mask = <0 0 0 0>;
208 interrupt-map-mask = <0 0 0 0>;
224 interrupt-map-mask = <0 0 0 0>;
240 interrupt-map-mask = <0 0 0 0>;
256 interrupt-map-mask = <0 0 0 0>;
272 interrupt-map-mask = <0 0 0 0>;
[all …]
Dmediatek-pcie.txt42 - interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
67 - interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
95 interrupt-map-mask = <0xf800 0 0 0>;
121 interrupt-map-mask = <0 0 0 0>;
131 interrupt-map-mask = <0 0 0 0>;
141 interrupt-map-mask = <0 0 0 0>;
169 interrupt-map-mask = <0 0 0 7>;
201 interrupt-map-mask = <0 0 0 7>;
240 interrupt-map-mask = <0 0 0 7>;
278 interrupt-map-mask = <0 0 0 7>;
/Documentation/networking/device_drivers/qlogic/
Dqlge.rst20 mask = a - 1
21 return (x+ mask) & ~mask
47 .mask = (__le16)26637,
/Documentation/arm64/
Dasymmetric-32bit.rst71 affinity mask contains 64-bit-only CPUs. In this situation, the kernel
72 determines the new affinity mask as follows:
74 1. If the 32-bit-capable subset of the affinity mask is not empty,
76 mask is saved. This saved mask is inherited over ``fork(2)`` and
91 invalidate the affinity mask saved in (1) and attempt to restore the CPU
92 affinity of the task using the saved mask if it was previously valid.
98 the 32-bit-capable CPUs of the requested affinity mask. On success, the
99 affinity for the task is updated and any saved mask from a prior
/Documentation/devicetree/bindings/bus/
Dbrcm,gisb-arb.txt18 - brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB
21 masters. Should match the number of bits set in brcm,gisb-master-mask and
32 brcm,gisb-arb-master-mask = <0x7>;
/Documentation/userspace-api/media/rc/
Dlirc-set-transmitter-mask.rst20 ``int ioctl(int fd, LIRC_SET_TRANSMITTER_MASK, __u32 *mask)``
28 ``mask``
42 When an invalid bit mask is given, i.e. a bit is set, even though the device
/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic-msgr.txt25 - mpic-msgr-receive-mask: Specifies what registers in the containing block
26 are allowed to receive interrupts. The value is a bit mask where a set
53 mpic-msgr-receive-mask = <0x5>;
62 mpic-msgr-receive-mask = <0x5>;

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