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Searched refs:ARCH_LBR_CTL_LBREN (Results 1 – 2 of 2) sorted by relevance

/arch/x86/include/asm/
Dmsr-index.h227 #define ARCH_LBR_CTL_LBREN BIT(0) macro
/arch/x86/events/intel/
Dlbr.c168 wrmsrl(MSR_ARCH_LBR_CTL, lbr_select | ARCH_LBR_CTL_LBREN); in __intel_pmu_lbr_enable()