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Searched refs:CKSEG1 (Results 1 – 14 of 14) sorted by relevance

/arch/mips/dec/prom/
Dmemory.c45 for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE; in pmax_setup_memory_region()
46 mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000; in pmax_setup_memory_region()
52 memblock_add(0, (unsigned long)memory_page - CKSEG1 - CHUNK_SIZE); in pmax_setup_memory_region()
/arch/mips/include/asm/
Daddrspace.h69 #define CKSEG1 _CONST64_(0xffffffffa0000000) macro
74 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
105 #define CKSEG1 0xa0000000 macro
Dtlb.h12 #define UNIQUE_GUEST_ENTRYHI(idx) _UNIQUE_ENTRYHI(CKSEG1, idx)
Dbarrier.h41 : "m" (*(int *)CKSEG1) \
Dbmips.h20 #define BMIPS_GET_CBR() ((void __iomem *)(CKSEG1 | \
/arch/mips/kernel/
Dbmips_vec.S42 li k1, CKSEG1
61 or k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
70 li k1, CKSEG1
Dspram.c171 unsigned int *vp = (unsigned int *)(CKSEG1 | pa); in probe_spram()
/arch/mips/pci/
Dpci-xlr.c342 set_io_port_base(CKSEG1); in pcibios_init()
343 nlm_pci_controller.io_map_base = CKSEG1; in pcibios_init()
Dpci-xlp.c323 set_io_port_base(CKSEG1); in pcibios_init()
324 nlm_pci_controller.io_map_base = CKSEG1; in pcibios_init()
/arch/mips/mm/
Dioremap.c23 #define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
Dc-r4k.c135 *(volatile unsigned long *)CKSEG1; \
/arch/mips/dec/
Dkn01-berr.c105 if (KSEGX(vaddr) == CKSEG0 || KSEGX(vaddr) == CKSEG1) in dec_kn01_be_backend()
/arch/mips/loongson64/
Denv.c51 if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1) in prom_dtb_init_env()
/arch/mips/txx9/rbtx4939/
Dsetup.c470 unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10); in rbtx4939_device_init()