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Searched refs:CTR_EL0_IDC_SHIFT (Results 1 – 3 of 3) sorted by relevance

/arch/arm64/include/asm/
Dcache.h97 if (!(ctr & BIT(CTR_EL0_IDC_SHIFT))) { in read_cpuid_effective_cachetype()
102 ctr |= BIT(CTR_EL0_IDC_SHIFT); in read_cpuid_effective_cachetype()
Dsysreg.h1175 #define CTR_EL0_IDC_SHIFT 28 macro
/arch/arm64/kernel/
Dcpufeature.c401 ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_EL0_IDC_SHIFT, 1, 1),
1532 return ctr & BIT(CTR_EL0_IDC_SHIFT); in has_cache_idc()
1543 if (!(read_cpuid_cachetype() & BIT(CTR_EL0_IDC_SHIFT))) in cpu_emulate_effective_ctr()