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/arch/arm64/boot/dts/cavium/
Dthunder2-99xx.dts19 reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
20 <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-board-base.dtsi23 reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
24 <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
/arch/arm/boot/dts/
Dstm32mp15-pinctrl.dtsi156 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
157 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
158 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
159 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
187 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
188 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
189 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
190 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
207 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
208 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
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Darmada-xp-crs305-1g-4s.dts3 * Device Tree file for MikroTik CRS305-1G-4S+ board
12 model = "MikroTik CRS305-1G-4S+";
Darmada-xp-crs326-24g-2s.dts3 * Device Tree file for MikroTik CRS326-24G-2S+ board
12 model = "MikroTik CRS326-24G-2S+";
Darmada-xp-crs305-1g-4s-bit.dts3 * Device Tree file for MikroTik CRS305-1G-4S+ Bit board
12 model = "MikroTik CRS305-1G-4S+ Bit";
Darmada-xp-crs326-24g-2s-bit.dts3 * Device Tree file for MikroTik CRS326-24G-2S+ Bit board
12 model = "MikroTik CRS326-24G-2S+ Bit";
Dstm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts94 pinmux = <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
103 <STM32_PINMUX('G', 7, AF14)>, /* LTDC_CLK */
104 <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
Dstm32f4-pinctrl.dtsi236 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
237 <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
241 <STM32_PINMUX('G', 11,AF11)>, /* ETH_MII_TX_EN_ETH_RMII_TX_EN */
325 <STM32_PINMUX('G', 7, AF14)>,
337 <STM32_PINMUX('G', 6, AF14)>,
341 <STM32_PINMUX('G', 10, AF9)>,
347 <STM32_PINMUX('G', 11, AF14)>,
355 <STM32_PINMUX('G', 12, AF9)>,
Domap3-igep0030-rev-g.dts3 * Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
12 model = "IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)";
Darmada-xp-crs326-24g-2s.dtsi3 * Device Tree file for CRS326-24G-2S board
24 model = "CRS326-24G-2S+";
Darmada-xp-crs305-1g-4s.dtsi3 * Device Tree file for CRS305-1G-4S board
24 model = "CRS305-1G-4S+";
Dimx6qdl-dhcom-pdk2.dtsi24 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
181 /* 1G ethernet */
278 * G: backlight enable
301 pinctrl_enet_1G: enet-1G-grp {
Drda8810pl-orangepi-2g-iot.dts13 model = "Orange Pi 2G-IoT";
/arch/arm64/boot/dts/nvidia/
Dtegra194-p3668-0000.dtsi17 cd-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
28 gpio = <&gpio TEGRA194_MAIN_GPIO(G, 2) GPIO_ACTIVE_HIGH>;
/arch/x86/kernel/
Didt.c19 #define G(_vector, _addr, _ist, _type, _dpl, _segment) \ macro
32 G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL0, __KERNEL_CS)
36 G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL3, __KERNEL_CS)
44 G(_vector, _addr, _ist + 1, GATE_INTERRUPT, DPL0, __KERNEL_CS)
51 G(_vector, NULL, DEFAULT_STACK, GATE_TASK, DPL0, _gdt << 3)
/arch/arm64/crypto/
Dsha512-armv8.pl103 @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));
239 ldp $G,$H,[$ctx,#6*$SZ]
272 add $G,$G,@X[6]
276 stp $G,$H,[$ctx,#6*$SZ]
458 my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));
678 ldp $G,$H,[$ctx,#24]
724 add $G,$G,$t2
730 stp $G,$H,[$ctx,#24]
/arch/nds32/
DKconfig.cpu202 bool "3G/1G user/kernel split"
204 bool "3G/1G user/kernel split (for full 1G low memory)"
206 bool "2G/2G user/kernel split"
208 bool "1G/3G user/kernel split"
/arch/arm/crypto/
Dsha256-armv4.pl60 $G="r10";
62 @V=($A,$B,$C,$D,$E,$F,$G,$H);
230 ldmia $ctx,{$A,$B,$C,$D,$E,$F,$G,$H}
269 add $G,$G,$t0
271 stmia $t3,{$A,$B,$C,$D,$E,$F,$G,$H}
562 add $G,$G,$t3
/arch/arm64/boot/dts/renesas/
Dr8a779m1.dtsi3 * Device Tree Source for the R-Car H3e-2G (R8A779M1) SoC
Dr8a779m3.dtsi3 * Device Tree Source for the R-Car M3e-2G (R8A779M3) SoC
Dr8a779m3-ulcb-kf.dts3 * Device Tree Source for the M3ULCB Kingfisher board with R-Car M3e-2G
Dr8a779m1-ulcb-kf.dts3 * Device Tree Source for the H3ULCB Kingfisher board with R-Car H3e-2G
/arch/x86/crypto/
Dtwofish-avx-x86_64-asm_64.S104 #define G(gi1, gi2, x, t0, t1, t2, t3) \ macro
119 G(RGI1, RGI2, x1, s0, s1, s2, s3); \
125 G(RGI3, RGI4, y1, s1, s2, s3, s0); \
131 G(RGI1, RGI2, x2, s0, s1, s2, s3); \
135 G(RGI3, RGI4, y2, s1, s2, s3, s0); \
/arch/mips/alchemy/
DKconfig8 bool "4G Systems MTX-1 board"

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