/arch/arm64/boot/dts/bitmain/ |
D | bm1880-sophon-edge.dts | 12 * GPIO name legend: proper name = the GPIO line is used as GPIO 15 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 30 * are the only ones actually used for GPIO. 56 "GPIO-A", /* GPIO0, LSEC pin 23 */ 57 "GPIO-C", /* GPIO1, LSEC pin 25 */ 59 "GPIO-E", /* GPIO3, LSEC pin 27 */ 63 "GPIO-G", /* GPIO7, LSEC pin 29 */ 112 "GPIO-I", /* GPIO50, LSEC pin 31 */ 113 "GPIO-K", /* GPIO51, LSEC pin 33 */ [all …]
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/arch/arm/boot/dts/ |
D | hi3620-hi4511.dts | 71 0x008 0x0 /* GPIO -- eFUSE_DOUT */ 95 0x0f8 0x1 /* GPIO (IOMG61) */ 96 0x0fc 0x1 /* GPIO (IOMG62) */ 107 0x104 0x1 /* GPIO (IOMG96) */ 108 0x108 0x1 /* GPIO (IOMG64) */ 119 0x160 0x1 /* GPIO (IOMG85) */ 120 0x164 0x1 /* GPIO (IOMG86) */ 132 0x168 0x1 /* GPIO (IOMG87) */ 133 0x16c 0x1 /* GPIO (IOMG88) */ 134 0x170 0x1 /* GPIO (IOMG93) */ [all …]
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D | imx6qdl-dhcom-pdk2.dtsi | 24 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */ 60 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */ 61 label = "TA1-GPIO-A"; 69 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */ 70 label = "TA2-GPIO-B"; 78 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */ 79 label = "TA3-GPIO-C"; 87 gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */ 88 label = "TA4-GPIO-D"; 100 * Disable led-5, because GPIO E is [all …]
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D | imx6dl-prtvt7.dts | 36 label = "GPIO Key ESC"; 42 label = "GPIO Key UP"; 48 label = "GPIO Key DOWN"; 54 label = "GPIO Key Enter"; 60 label = "GPIO Key CYCLE"; 66 label = "GPIO Key F1"; 72 label = "GPIO Key F2"; 78 label = "GPIO Key F3"; 84 label = "GPIO Key F4"; 90 label = "GPIO Key F5"; [all …]
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D | imx6qdl-dhcom-drc02.dtsi | 26 * GPIO line, however the i.MX6 UART driver assumes RX happens 32 gpios = <18 0>; /* GPIO Q */ 74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts. 77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */ 80 rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ 86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property 87 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via 88 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1 95 rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
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D | socfpga_cyclone5_mcvevk.dts | 35 &gpio0 { /* GPIO 0 ... 28 */ 39 &gpio1 { /* GPIO 29 ... 57 */ 43 &gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */ 58 irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
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D | ste-hrefv60plus.dtsi | 72 /* Name the GPIO muxed rails on the HREF boards */ 113 /* GPIO 70-77 used for ETM */ 115 /* GPIO 78-81 used for YCBCR */ 216 /* SD card detect GPIO pin, extend default state */ 225 * XENON Flashgun on image processor GPIO (controlled from image 226 * processor firmware), mux in these image processor GPIO lines 0 228 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias 320 /* Audio Amplifier HF enable GPIO */ 341 /* MSP : HDTV INTERFACE GPIO line */ 351 * Display Interface 1 uses GPIO 65 for RST (reset). [all …]
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D | imx6qdl-solidsense.dtsi | 101 /* Nordic Chip 1 SWDIO - GPIO 125 */ 103 /* Nordic Chip 1 SWDCLK - GPIO 59 */ 106 /* Nordic Chip 2 SWDIO - GPIO 81 */ 108 /* Nordic Chip 2 SWCLK - GPIO 82 */ 115 /* Red LED 1 - GPIO 58 */ 117 /* Green LED 1 - GPIO 55 */ 119 /* Red LED 2 - GPIO 57 */ 121 /* Green LED 2 - GPIO 56 */
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D | stm32mp15xx-dhcom-pdk2.dtsi | 42 * so mark this as polled GPIO key. 45 label = "TA1-GPIO-A"; 52 * so mark this as polled GPIO key. 55 label = "TA2-GPIO-B"; 62 * so mark this as polled GPIO key. 65 label = "TA3-GPIO-C"; 75 label = "TA4-GPIO-D"; 213 interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
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D | ste-href-stuib.dtsi | 131 /* Pull up this GPIO pin */ 167 /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */ 181 * ROHM touch screen uses GPIO 143 for 182 * RST1, GPIO 146 for RST2 and 183 * GPIO 67 for interrupts. Pull-up
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D | imx6dl-prtmvt.dts | 62 label = "GPIO Key F1"; 68 label = "GPIO Key F2"; 74 label = "GPIO Key F3"; 80 label = "GPIO Key F4"; 86 label = "GPIO Key F5"; 92 label = "GPIO Key CYCLE"; 98 label = "GPIO Key ESC"; 104 label = "GPIO Key UP"; 110 label = "GPIO Key DOWN"; 116 label = "GPIO Key OK"; [all …]
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D | ste-ux500-samsung-janice.dts | 39 * One GPIO line controls two voltages of 3.3V and 1.8V 73 * Two GPIO lines controls two voltages of 3.3V and 1.8V 137 * This regulator is a GPIO line that drives the Broadcom WLAN 188 /* GPIO 140 */ 190 /* GPIO 141 */ 242 * this panel interface. We have to use GPIO bit-banging instead. 311 /* Interrupt on GPIO 198 */ 349 /* GPIO 31 */ 393 * GPIO-controlled voltage enablement: this drives 460 /* CTS/RTS is not used, CTS is repurposed as GPIO */ [all …]
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D | ste-ux500-samsung-gavini.dts | 58 * One GPIO line controls two voltages of 3.3V and 1.8V 120 * This regulator is a GPIO line that drives the Broadcom WLAN 176 /* GPIO 140 */ 178 /* GPIO 141 */ 351 * GPIO-controlled voltage enablement: this drives 416 /* CTS/RTS is not used, CTS is repurposed as GPIO */ 614 /* GPIO for panel reset control */ 624 /* GPIO that enables the LDO regulator for the eMMC */ 634 /* GPIO that enables the LDO regulator for the touchscreen */ 653 /* GPIO that enables the LDO regulator for the key LED */ [all …]
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D | bcm2837-rpi-3-a-plus.dts | 58 * "FOO" = GPIO line named "FOO" on the schematic 59 * "FOO_N" = GPIO line named "FOO" on schematic, active low 137 * by a single GPIO. We can't give GPIO control to one of the drivers,
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/arch/arm64/boot/dts/hisilicon/ |
D | hi3798cv200-poplar.dts | 108 gpio-line-names = "GPIO-E", "", 110 "", "GPIO-F", 111 "", "GPIO-J"; 116 gpio-line-names = "GPIO-H", "GPIO-I", 117 "GPIO-L", "GPIO-G", 118 "GPIO-K", "", 126 "GPIO-C", "", 127 "", "GPIO-B"; 134 "", "GPIO-D", 142 "", "GPIO-A",
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D | hi3670-hikey970.dts | 75 * Legend: proper name = the GPIO line is used as GPIO 78 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 95 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 96 * ones actually used for GPIO. 119 "GPIO-I", /* LSEC pin 31: GPIO_013_CAM0_RST_N */ 127 "GPIO-G", /* LSEC pin 29: GPIO_016_LCD_TE0 */ 145 "GPIO-H", /* LSEC pin 30: GPIO_029_LCD_RST_N */ 147 "GPIO-L"; /* LSEC pin 34: GPIO_031 */ 153 "GPIO-K", /* LSEC pin 33: GPIO_032_CAM1_RST_N */ 188 "GPIO-D", /* LSEC pin 26 */ [all …]
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D | hi6220-hikey.dts | 117 /* WLAN_EN GPIO */ 348 * Legend: proper name = the GPIO line is used as GPIO 350 * "[PER]" = pin is muxed for peripheral (not GPIO) 368 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 369 * ones actually used for GPIO. 384 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 385 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */ 386 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */ 387 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */ 388 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */ [all …]
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D | hi3660-hikey960.dts | 80 label = "GPIO Power"; 203 * Legend: proper name = the GPIO line is used as GPIO 206 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 225 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 226 * ones actually used for GPIO. 257 "GPIO-J", /* LSEC pin 32: GPIO_019 */ 259 "GPIO-L", /* LSEC pin 34: GPIO_021 */ 261 "GPIO-G"; /* LSEC pin 29: LCD_TE0 */ 266 /* The rail from pin BK36 is named LCD_TE0, we assume to be muxed as GPIO for GPIO-G */ 291 "GPIO-H", /* LSEC pin 30: GPIO_040_LCD_RST_N */ [all …]
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/arch/arm64/boot/dts/qcom/ |
D | qrb5165-rb5.dts | 994 "GPIO-MM", 995 "GPIO-NN", 996 "GPIO-OO", 997 "GPIO-PP", 998 "GPIO-A", 999 "GPIO-C", 1000 "GPIO-E", 1001 "GPIO-D", 1004 "GPIO-TT", /* GPIO_10 */ 1008 "GPIO-X", [all …]
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D | apq8016-sbc.dts | 576 * GPIO name legend: proper name = the GPIO line is used as GPIO 579 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 595 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 596 * ones actually used for GPIO. 613 "GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */ 614 "GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */ 621 "HDMI_HPD_N", /* GPIO 20 */ 625 "GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */ 626 "GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */ 629 "GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */ [all …]
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D | apq8096-db820c.dts | 18 * GPIO name legend: proper name = the GPIO line is used as GPIO 21 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 40 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 41 * ones actually used for GPIO. 273 "GPIO-H", /* GPIO_8, LCD0_RESET_N, LSEC pin 30 */ 275 "GPIO-G", /* GPIO_10, MDP_VSYNC_P, LSEC pin 29 */ 288 "GPIO-K", /* GPIO_23, CAM2_RST_N, LSEC pin 33 */ 289 "GPIO-D", /* GPIO_24, LSEC pin 26 */ 290 "GPIO-I", /* GPIO_25, CAM0_RST_N, LSEC pin 31 */ 291 "GPIO-J", /* GPIO_26, CAM0_STANDBY_N, LSEC pin 32 */ [all …]
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/arch/arm64/boot/dts/actions/ |
D | s900-bubblegum-96.dts | 68 * GPIO name legend: proper name = the GPIO line is used as GPIO 71 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 88 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 89 * are the only ones actually used for GPIO. 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ [all …]
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/arch/powerpc/boot/dts/ |
D | wii.dts | 171 GPIO: gpio@d8000c0 { label 201 gpios = <&GPIO 15 0 202 &GPIO 14 0>; 222 * requires refactoring the PIC1, GPIO and OTP nodes 246 gpios = <&GPIO 5 GPIO_ACTIVE_HIGH>; 256 gpios = <&GPIO 0 GPIO_ACTIVE_HIGH>; 262 gpios = <&GPIO 6 GPIO_ACTIVE_HIGH>;
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/arch/mips/boot/dts/mscc/ |
D | jaguar2_pcb111.dts | 65 // GPIO 49 == SI_nCS13 70 // GPIO 50 == SI_nCS14 75 // GPIO 51 == SI_nCS15
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/arch/arm/mach-omap1/ |
D | ams-delta-fiq-handler.S | 106 cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt? 118 gpio: @ GPIO bank interrupt handler 119 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank 121 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask 143 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input 159 @ Mask other GPIO line interrupts till key done 168 @ r8 still contains GPIO input bits
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