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Searched refs:ID_AA64ISAR0_EL1_SM3_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dsysreg.h771 #define ID_AA64ISAR0_EL1_SM3_SHIFT 36 macro
/arch/arm64/kernel/
Dcpufeature.c201 ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_EL1_SM3_SHIFT, 4, 0),
2674 …HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_SM3_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_…