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Searched refs:ID_AA64MMFR0_EL1_BIGEND_SHIFT (Results 1 – 3 of 3) sorted by relevance

/arch/arm64/include/asm/
Dcpufeature.h598 return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_BIGEND_SHIFT) == 0x1 || in id_aa64mmfr0_mixed_endian_el0()
739 ID_AA64MMFR0_EL1_BIGEND_SHIFT); in system_supports_mixed_endian()
Dsysreg.h941 #define ID_AA64MMFR0_EL1_BIGEND_SHIFT 8 macro
/arch/arm64/kernel/
Dcpufeature.c354 ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_EL1_BIGEND_SHIFT, 4, 0),