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Searched refs:ID_AA64PFR0_EL1_AMU_SHIFT (Results 1 – 4 of 4) sorted by relevance

/arch/arm64/include/asm/
Del2_setup.h223 ubfx x1, x1, #ID_AA64PFR0_EL1_AMU_SHIFT, #4
Dassembler.h494 ubfx \tmpreg, \tmpreg, #ID_AA64PFR0_EL1_AMU_SHIFT, #4
Dsysreg.h848 #define ID_AA64PFR0_EL1_AMU_SHIFT 44 macro
/arch/arm64/kernel/
Dcpufeature.c249 ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_AMU_SHIFT, 4, 0),
2260 .field_pos = ID_AA64PFR0_EL1_AMU_SHIFT,