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Searched refs:MSR_CORE_C6_RESIDENCY (Results 1 – 3 of 3) sorted by relevance

/arch/x86/include/asm/
Dmsr-index.h350 #define MSR_CORE_C6_RESIDENCY 0x000003fd macro
/arch/x86/events/intel/
Dcstate.c177 [PERF_CSTATE_CORE_C6_RES] = { MSR_CORE_C6_RESIDENCY, &group_cstate_core_c6, test_msr },
/arch/x86/kvm/vmx/
Dvmx.c170 MSR_CORE_C6_RESIDENCY,
7026 vmx_disable_intercept_for_msr(vcpu, MSR_CORE_C6_RESIDENCY, MSR_TYPE_R); in vmx_create_vcpu()