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Searched refs:MSR_P4_IQ_ESCR0 (Results 1 – 2 of 2) sorted by relevance

/arch/x86/include/asm/
Dmsr-index.h917 #define MSR_P4_IQ_ESCR0 0x000003ba macro
/arch/x86/events/intel/
Dp4.c1161 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IQ_ESCR0),